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Endace DAG 3.8S User Manual

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  • Page 2 EDM01-09v7 DAG 3.8S Card User Guide Published by: ® Endace Measurement Systems Building 7 17 Lambie Drive PO Box 76802 Manukau City 1702 New Zealand Phone: +64 9 262 7260 Fax: +64 9 262 7261 support@endace.com www.endace.com International Locations New Zealand Americas Europe, Middle East &...
  • Page 3 Disclaimer Whilst every effort has been made to ensure accuracy, neither Endace Measurement Systems Limited nor any employee of the company, shall be liable on any ground whatsoever to any party in respect of decisions or actions they may make as a result of using this information.

  • Page 4: Table Of Contents

    1.5 DAG 3.8S Card System Requirements Error! Bookmark not defined. Chapter 2: Installation 2.1 Installation of Operating System and Endace Software 2.2 Insert DAG 3.8S Card into PC 2.3 DAG 3.8S Card Port Connectors 2.4 DAG 3.8S Card Pluggable Optical Transceivers Chapter 3: Setting Optical Power 3.1 DAG 3.8S Card Optical Power Input...
  • Page 5 EDM01-09v7 DAG 3.8S Card User Guide ©2005 Version 9: May 2006...

  • Page 6: Chapter 1: Introduction

    EDM01-09v7 DAG 3.8S Card User Guide Chapter 1: Introduction Introduction The installation of the Endace DAG 3.8S card on a PC begins with installing the operating system and the Endace software. This is followed by fitting the card and connecting the ports.

  • Page 7: Dag 3.8S Card Product Description

    The DAG 3.8S card is also capable of transmitting packets at 100% line rate on both ports while simultaneously receiving packets at 100% line rate on both ports.

  • Page 8: Dag 3.8S Card Architecture

    Figure 1-2. DAG 3.8S Card Major Components and Data Flow. 1.4 DAG 3.8S Card Extended Functions Description The functionality of the DAG 3.8S can can be extended in many ways. The framers are normally set up to map STM-1, STS-3c, STM-4c and STS-12c payloads, but other mappings are possible.
  • Page 9 Packets presented to the host include the rule-match identifier in the record header. Coprocessor The DAG 3.8S card is equipped with a coprocessor which can be used as ATM AAL5 a data processing tool with the optional Endace DAG Coprocessor.
  • Page 10 EDM01-09v7 DAG 3.8S Card User Guide Operating For convenience, a Debian 3.1 [Sarge] Linux system is included on the system Endace Software Install CD. Endace currently supports Windows XP, Windows Server 2000, Windows Server 2003, FreeBSD, RHEL 3.0, and Debian Linux operating systems. Different...
  • Page 11 EDM01-09v7 DAG 3.8S Card User Guide ©2005 Version 9: May 2006...

  • Page 12: Chapter 2: Installation

    66MHz, including any other devices sharing the bus. The DAG 3.8S should be the only device on the PCI-X bus if possible. The DAG 3.8S will not operate in 32 or 64-bit PCI slots.

  • Page 13: Dag 3.8S Card Port Connectors

    2.4 DAG 3.8S Card Pluggable Optical Transceivers Description Some newer versions of the DAG 3.8S cards are available with pluggable optics. To provide compatibility with the broadest possible range of optical parameters, Endace offers the industry standard Small Form-factor Pluggable [SFP] optical transceiver on the DAG 3.8S card.
  • Page 14 EDM01-09v7 DAG 3.8S Card User Guide Figure 2-1. Pluggable Optical Transceivers. ©2005 Version 9: May 2006...
  • Page 15 EDM01-09v7 DAG 3.8S Card User Guide ©2005 Version 9: May 2006...

  • Page 16: Chapter 3: Setting Optical Power

    Input power The DAG 3.8S card is set up to measure the optical power at the receiver, and to make sure that it is well within the specified power range.

  • Page 17: Splitter Losses

    EDM01-09v7 DAG 3.8S Card User Guide 3.2 Splitter Losses Description Splitters have the insertion losses marked on packaging or in accompanying documentation. • A 50:50 splitter will have an insertion loss of between 3 dB and 4 dB on each output •...

  • Page 18: Chapter 4:Confidence Testing

    Reporting Problems 4.1 Interpreting DAG 3.8S Card LED Status Description The DAG 3.8S has a 8 status LEDs, one blue, three green, two orange, and two red. When a DAG 3.8S series card is powered up the LED 1 should always come on indicating the FPGA is successfully programmed.
  • Page 19 LED 8 PPS In: Pulse Per Second In – indicates the card is receiving an external clock synchronization signal. Figure 4-2. LED State for DAG 3.8S Card Without Optical Input. ©2005 Version 9: May 2006...

  • Page 20: Dag 3.8S Card Configuration

    Because of its flexibility, the correct link layer configuration needs to be supplied to the card for it to function as expected. A successful DAG 3.8S card capture session is accomplished by receiver ports optical signal levels and checking the card is locked to stream data.
  • Page 21 EDM01-09v7 DAG 3.8S Card User Guide Step 3. Check Card is Locked to Data Stream. Configure card according to local settings. Check through physical layer statistics that the card is locked to data stream. tool is supplied for both configuration and statistics of DAG dagthree 3.8S SONIC framers...

  • Page 22: Configuration In Wysycc Style

    Running the command ' alone shows the current configuration. dagthree' Each of the items displayed can be changed as follows: Process Follow these steps configure the DAG 3.8S card in what you see can change style. Step 1. Configure to ATM Type:...

  • Page 23: Dag 3.8S Card Configuration Options

    EDM01-09v7 DAG 3.8S Card User Guide 4.4 DAG 3.8S Card Configuration Options Description There are many DAG 3.8S card configuration options supported. Description Set framer into ATM cell receive mode Set framer into Packet-over-SONET (PoS) mode Not supported Not supported...
  • Page 24 EDM01-09v7 DAG 3.8S Card User Guide Inspect Once the card has been configured as expected, the interface statistics interface should be inspected to see if the card is locked to the data stream. statistics dag@endace:~$ dagthree -d dag0 -si Status bits...
  • Page 25 EDM01-09v7 DAG 3.8S Card User Guide Status bits display (continued) Loss of frame. If set, had been asserted for more than 3 milliseconds. Loss of signal If set the framer has not detected any 0 to 1 transitions for 20 microseconds.
  • Page 26 EDM01-09v7 DAG 3.8S Card User Guide ATM cell An example for an ATM cell stream at OC 12c is: stream example bip3 bip2 bip1 label Sync Port statistics Statistics for each port are printed on alternate lines each second. To view statistics for one port only, use the –a or –b flags to dagthree.

  • Page 27: Verify Dag 3.8S Card Configuration

    EDM01-09v7 DAG 3.8S Card User Guide Card set to An example of a card set to OC12 PoS while the line carries OC3 PoS is: OC12 PoS bip3 bip2 bip1 label No error bits are raised in if the card is configured to PoS dagthree –si...

  • Page 28: General Purpose Counters

    EDM01-09v7 DAG 3.8S Card User Guide Procedure (continued) Step 4. Check Path Label Ensure path label is correct as per the payload Step 5. Check ATM Setting Ensure ATM lcd is off and sync set. Step 6. Check PoS Settings Ensure PoS scrambling and CRC settings are correct.
  • Page 29 EDM01-09v7 DAG 3.8S Card User Guide , continued Description Trace file If tests provide a satisfactory status, a test trace is taken. A 10 seconds trace file is undertaken by passing option , along with -s 10 dagsnap option for more user information.

  • Page 30: Reporting Problems

    EDM01-09v7 DAG 3.8S Card User Guide 4.8 Reporting Problems Description If there are unresolved problems with a DAG card or supplied software, contact Endace Technical Support via the email address support@endace.com. Supplying sufficient information in an email enables effective response. Problem...
  • Page 31 EDM01-09v7 DAG 3.8S Card User Guide ©2005 Version 9: May 2006...

  • Page 32: Chapter 5 Running Data Capture Software

    For a typical measurement session, ensure the driver is loaded, the firmware has been downloaded, and the card is configured. The integrity of the DAG 3.8S card’s physical layer is then set and checked. Process Starting a data capture session is described in the following process.
  • Page 33 EDM01-09v7 DAG 3.8S Card User Guide Process,continued Process Description Setting fixed length In fixed length mode, packets longer than the selected slen mode. are truncated to slen. Packets shorter than slen produce records are padded out to the slen length.

  • Page 34: High Load Performance

    EDM01-09v7 DAG 3.8S Card User Guide 5.2 High Load Performance Description As the DAG 3.8S card captures packets from the network link, it writes a record for each packet into a large buffer in the host PC’s main memory. Avoiding...

  • Page 35: Dag 3.8S Card Packet Transmission Capabilities

    5.3 DAG 3.8S Card Packet Transmission Capabilities Description The firmware included with the DAG 3.8S card allows the card to transmit as well as receive packets, however the DAG card does not appear as a network interface to the operating system.
  • Page 36 EDM01-09v7 DAG 3.8S Card User Guide Process,continued Process Description Convert trace files. It is also possible to convert trace files that have been captured without the option. align64 This can be done with the command: dagconvert -v -i in.erf -o out.erf -A8...
  • Page 37 EDM01-09v7 DAG 3.8S Card User Guide Process,continued Process Description Configuring DAG card If the card is to be used for both transmitting for transmission. and receiving, the option can be used. rxtx [Continued] This allocates 16MB of memory to each transmit stream, and divides the remaining memory between the receive streams.

  • Page 38: Chapter 6: Synchronizing Clock Time

    Common synchronization sources include GPS or CDMA (Cellular telephone) time receivers. Endace produces the TDS 2 Time Distribution Server modules and the TDS 6 units that enable multiple DAG cards to be connected to a single GPS or CDMA unit.

  • Page 39: Configuration Tool Usage

    EDM01-09v7 DAG 3.8S Card User Guide 6.1 Configuration Tool Usage Description The DUCK is very flexible, and can be used in several ways, with or without an external time reference source. It can accept synchronization from several input sources, and can also be made to drive its synchronization output from one of several sources.

  • Page 40: Time Synchronization Configurations

    EDM01-09v7 DAG 3.8S Card User Guide 6.2 Time Synchronization Configurations Description The DUCK is very flexible, and can be used in several ways, with or without an external time reference source. The use includes a single card with no reference, two cards with no reference, and a card with reference.

  • Page 41: Two Cards No Reference Time Synchronization

    EDM01-09v7 DAG 3.8S Card User Guide 6.2.2 Two Cards no Reference Time Synchronization Description When two DAG cards are used in a single host PC with no reference clock, the cards are to be synchronized in some way if timestamps between the two cards are to be compared.

  • Page 42: Card With Reference Time Synchronization

    [PPS] signal from external sources. sources This is derived directly from a reference source, or distributed through the Endace TDS 2 [Time Distribution Server] module which allows two DAG cards to use a single receiver. More cards can be accommodated by daisy-chaining TDS-6 expansion units to the TDS-2 unit, each providing outputs for an additional 6 DAG cards.
  • Page 43 EDM01-09v7 DAG 3.8S Card User Guide Using external To use an external clock reference source, the host PC’s clock must be reference accurate to UTC to within one second. This is used to initialise the source DUCK. The external time reference allows high accuracy time synchronization.

  • Page 44: Synchronization Connector Pin-Outs

    EDM01-09v7 DAG 3.8S Card User Guide 6.3 Synchronization Connector Pin-outs Description DAG cards have an 8-pin RJ45 connector with two bi-directional RS422 differential circuits, A and B. The PPS signal is carried on circuit A, and the serial packet is connected to the B circuit.
  • Page 45 EDM01-09v7 DAG 3.8S Card User Guide ©2005 Version 9: May 2006...

  • Page 46: Chapter 7: Data Formats Overview

    7.1 Data Formats Description The DAG 3.8S card uses the ERF types 1 and 3 timestamps. Timestamps are in little-endian [Pentium native] byte order. All other fields are in big- endian [network] byte order. All payload data is captured as a byte stream, no byte re-ordering is applied.
  • Page 47 EDM01-09v7 DAG 3.8S Card User Guide Data format (continued) Data Format Description flags: This byte is divided into 2 parts, the interface identifier, and the capture offset. 1-0: capture interface 0-3 2: varying record lengths present 3: truncated record [insufficient buffer space]...

  • Page 48: Timestamps

    EDM01-09v7 DAG 3.8S Card User Guide 7.2 Timestamps Description The ERF format incorporates a hardware generated timestamp of the packet’s arrival. The format of this timestamp is a single little-endian 64-bit fixed point number, representing seconds since midnight on the first of January 1970.

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