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Endace DAG 7.1S User Manual

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Summary of Contents for Endace DAG 7.1S

  • Page 2 EDM 01-17 DAG 7.1S Card User Guide Published by: ® Endace Measurement Systems Building 7 17 Lambie Drive PO Box 76802 Manukau City 1702 New Zealand Phone: +64 9 262 7260 Fax: +64 9 262 7261 support@endace.com www.endace.com International Locations...
  • Page 3 Disclaimer Whilst every effort has been made to ensure accuracy, neither Endace Measurement Systems Limited nor any employee of the company, shall be liable on any ground whatsoever to any party in respect of decisions or actions they may make as a result of using this information.

  • Page 5: Table Of Contents

    EDM 01-17 DAG 7.1S Card User Guide Table of Contents Chapter 1: Introduction Overview Purpose of this User Guide System Requirements Card Description Card Architecture Extended Functions TCP/IP Filtering and Classification AAL5/AAL3 Reassembly Chapter 2: Installation Introduction DAG Driver Device...
  • Page 6 EDM 01-17 DAG 7.1S Card User Guide Chapter 6: Data Formats Overview Generic Header Generic Header (cont.) Type-5 Record Type-7 Record Type-9 Record Type-12 Record Chapter 7 Troubleshooting Reporting Problems Version 2: May 2006 ©2006...

  • Page 7: Chapter 1: Introduction

    Introduction Overview Endace DAG 7.1S card provides the means to transfer data at the full speed of the network into the memory of the host PC, with zero packet loss guaranteed in even worst-case conditions. Further, unlike a NIC, Endace products actively manage the movement of network data into memory without consuming any of the host PC's resources.

  • Page 8: System Requirements

    EDM 01-17 DAG 7.1S Card User Guide System General Requirements The minimum system requirements for the DAG 7.1S card are : • PC, at least Intel Xeon 1.8GHz or faster • Minimum of 256 MB RAM • At least one free PCI-Express slot supporting at least one lane •...

  • Page 9: Card Description

    The DAG 7.1S SDH/SONET Network Monitoring Card provides either four STM-1 (OC3) or two STM-2 (OC12) interfaces supporting concatenated or Description channelised ATM or Packet Over Sonet (POS) networks. The DAG 7.1S has four optical transceivers which can be operated simultaneously. The key features of the card are: •...

  • Page 10: Card Architecture

    EDM 01-17 DAG 7.1S Card User Guide Card Serial SONET/SDH optical data is received by four optical interfaces, and passed through deserializers. Architecture The network data feeds immediately into two physical layer FPGAs. The SONET/SDH payload data is then sent to the main FPGA.

  • Page 11: Extended Functions

    EDM 01-17 DAG 7.1S Card User Guide In addition to standard packet capture the DAG 7.1S card also provides Extended the following additional functionality: Functions TCP/IP Filtering and Classification This feature allows you to classify packets into arbitrary categories with then drop, retransmit or capture a packet to the host based upon the result.
  • Page 12 EDM 01-17 DAG 7.1S Card User Guide Version 2: May 2006 ©2006...

  • Page 13: Chapter 2: Installation

    1.8GB/s for both receive and transmit. You can run multiple DAG 7.1S cards on one bus. By default, the DAG driver supports up to four DAG cards in one system. The DAG device driver must be installed before you install the DAG card DAG Driver itself.

  • Page 14: Port Connectors

    EDM 01-17 DAG 7.1S Card User Guide Port The DAG 7.1S re has 4 SFP socket connectors. Each connector consists of an optical fibre transmitter and receiver. Connectors The upper connector of each pair is used for the transmit signal. These can be connected to daisy-chain systems if you have facility loopback (fcl) set on the card.
  • Page 15 1 mW. The most sensitive devices can work at power levels down as low as –30dBm or 1µW. The DAG 7.1S card optical power module configuration for Multi Mode Fibre (MMF)) and Single Mode Fibre (SMF) is shown below:...
  • Page 16 EDM 01-17 DAG 7.1S Card User Guide Version 2: May 2006 ©2006...

  • Page 17: Chapter 3: Configuring The Card

    EDM 01-17 DAG 7.1S Card User Guide Chapter 3: Configuring the Card Introduction Configuring the DAG card for data capture involves the following steps: • Loading an image and programming the FPGA, • Setting the link, • Checking the link, •...

  • Page 18: Concatenated Configuration

    Overview Concatenated Configuration The DAG 7.1S card uses four integrated SONET/SDH ATM/PoS physical layer interface devices to support capturing of ATM cells or HDLC encoded Packet-over-SONET data frames. The card supports unchannelized POS/ATM; OC-3c, OC-12c, STM-1c and STM-4c standards for transmit and receive.
  • Page 19 504 x VC-12 (E1) STM-4 Bit-HDLC 672 x VC-11 (T1) The DAG 7.1S card has four optical transceivers which can be operated simultaneously. The integrated embedded processor can be used for PoS packet filtering or AAL2/AAL5 segmentation and reassembly. ©2006...
  • Page 20 EDM 01-17 DAG 7.1S Card User Guide Display Card Configuration Running the dagconfig tool without arguments displays the card configuration dagconfig -d dag0 SFP A: laser detect nosignal nosfppwr SFP B: laser detect nosignal nosfppwr SFP C: laser detect nosignal nosfppwr...
  • Page 21 EDM 01-17 DAG 7.1S Card User Guide Verify Optical Signal is Received Those ports which receive a valid optical signal are indicated on dagconfig output. To have a valid optical signal, both ends of the link must use the same type of optical transceivers. Also the optical fiber used must match the optical transceiver requirements and must be in good condition.

  • Page 22: Configuration Options

    EDM 01-17 DAG 7.1S Card User Guide Configuration Options There are many DAG 7.1S card configuration options supported. Set concatenating mapper/demapper into ATM cell receive mode Set concatenating mapper/demapper into Packet-over- SONET (PoS) mode reset Reset the link Set framer to OC-3 receive mode...
  • Page 23 EDM 01-17 DAG 7.1S Card User Guide [no]align64 Generate records with 64-bit alignment [default 32-bit] mem=X:Y configure memory allocated to streams 0, 1,….. rxonly Assign all buffer memory to receive streams. txonly Assign all buffer memory to transmit streams. rxtx Assign buffer memory to transmit and receive streams.

  • Page 24: Configuration In Wysycc Style

    EDM 01-17 DAG 7.1S Card User Guide Overview Configuration in WYSYCC Configuration in WYSYCC is the 'What You See You Can Change' style. Style Running the command ' alone shows the current dagconfig' configuration. Each of the items displayed can be changed as shown...
  • Page 25 EDM 01-17 DAG 7.1S Card User Guide pscramble crc32 atm pscramble crc32 atm pscramble crc32 atm varlen slen=128 align64 PCI Burst Manager 33Mhz buffer size = 32 rx_streams = 1 tx_streams = 1 mem=16:16 PoS Configuration To configure the card to PoS mode use the following parameters. Replace to match the network configuration.
  • Page 26 EDM 01-17 DAG 7.1S Card User Guide pscramble crc32 pos pscramble crc32 pos GPP: varlen slen=48 align64 PCI Burst Manager 33Mhz buffer size = 256 rx_streams = 1 tx_streams = 1 mem=240:16 Version 2: May 2006 ©2006...

  • Page 27: Inspect Interface Statistics

    EDM 01-17 DAG 7.1S Card User Guide Once the card has been configured as expected, the interface statistics Inspect should be inspected to see if the card is locked to the data stream. Interface dag@endace:~$ dagconfig -d dag0 –s1 Statistics...
  • Page 28 EDM 01-17 DAG 7.1S Card User Guide PoS OC12 Stream Example An example for a card locked to a PoS OC-12 stream is on ports C and D, ports A and B are unused: Port 0xe800 0xe800 0xcf00 valid 0xcf00...

  • Page 29: Verify Configuration

    EDM 01-17 DAG 7.1S Card User Guide Network is PoS If network is PoS, the: • C2 label should be 16 for PPP or cf for HDLC • PTR should be valid • Rest of the statistics should be It is still necessary to set the card mode correctly using dagconfig in order...
  • Page 30 EDM 01-17 DAG 7.1S Card User Guide Version 2: May 2006 ©2006...

  • Page 31: Chapter 4: Capturing Data

    • Load the appropriate driver, • Then load the appropriate FPGA image to each DAG card. For example, for ATM or PoS capture with one DAG 7.1S card installed use: dagrom -rvp –d dag0 -f xilinx????????????? • Set the integrity of the card’s physical layer and check the integrity of the physical layer to each DAG card.

  • Page 32: Enabling/Disabling Ports

    EDM 01-17 DAG 7.1S Card User Guide Variable/Fixed Length The DAG card is able to capture packets in two ways. They are: • Variable length capture ( varlen • Fixed length capture ( novarlen) In variable length ( ) mode the whole packet will be captured...

  • Page 33: High Load Performance

    Overview High Load Performance As the DAG 7.1S card captures packets from the network link, it writes a record for each packet into a large buffer in the host PC’s main memory. Avoiding Packet Loss To avoid packet loss, the user application reading the record, such as...

  • Page 34: Increasing Buffer Size

    890MB. The DAG 7.1S is able to transmit as well as receive packets and it is Transmitting possible to . However the DAG card does not appear as a network interface to the operating system.

  • Page 35: Configuring For Transmission

    EDM 01-17 DAG 7.1S Card User Guide Configuring for Transmission. To configure the DAG card for transmission, you must allocate some memory to a transmit stream. In the output, indicates that n mebibytes of memory dagconfig buf=nMB has been allocated to the DAG card in total. You can split this allocation...
  • Page 36 EDM 01-17 DAG 7.1S Card User Guide Version 2: May 2006 ©2006...

  • Page 37: Chapter 5: Synchronizing Clock Time

    Common synchronisation sources include GPS or CDMA (cellular telephone) time receivers. Endace also provides the TDS 2 Time Distribution Server modules and the TDS 6 units that enable you to connect multiple DAG cards to a single GPS or CDMA unit.

  • Page 38: Timestamps

    EDM 01-17 DAG 7.1S Card User Guide ERF files contains a hardware generated timestamp of each packet’s arrival. Timestamps The arrival time can be either the point at which the start of the packet arrives (head) or the point at which the end of the packet arrives (tail).

  • Page 39: Configuration Tools

    EDM 01-17 DAG 7.1S Card User Guide The DUCK is very flexible, and can be used with or without an external time Configuration reference. It can accept synchronisation from several input sources, and also Tools be made to drive its synchronisation output from one of several sources.

  • Page 40: Card With Reference

    The DAG time synchronisation connector supports an RS-422 (PPS) signal from an external source. This is derived directly from an external reference source, or distributed through the Endace TDS 2 (Time Distribution Server) module which allows two DAG cards to use a single receiver. It is also possible for more than two cards to use a single receiver by “daisy-chaining”...

  • Page 41: Single Card No Reference

    EDM 01-17 DAG 7.1S Card User Guide When a single card is used with no external reference, the card can be Single Card No synchronised to the host PC clock. Most PC clocks are not very accurate by Reference themselves, but the DUCK drifts smoothly at the same rate as the PC clock.
  • Page 42 EDM 01-17 DAG 7.1S Card User Guide Two Cards No Synchronising with Each Other Reference Although the master card’s clock will drift against UTC, the cards will still be locked together. This is achieved by connecting the time synchronisation (cont.) connectors of both cards using a standard RJ-45 Ethernet cross-over cable.

  • Page 43: Connector Pin-Outs

    EDM 01-17 DAG 7.1S Card User Guide Overview Connector Pin-outs DAG cards have an 8-pin RJ45 connector with two bi-directional RS422 differential circuits, A and B. The PPS signal is carried on circuit A, and the serial packet is connected to the B circuit.
  • Page 44 EDM 01-17 DAG 7.1S Card User Guide Version 2: May 2006 ©2006...

  • Page 45: Chapter 6: Data Formats

    DAG Cards produce trace files in their own native format called ERF (Extensible Record Format). The ERF type depends upon the type of connection you are using to capture data. The DAG 7.1S supports the following ERF Types: ERF Type Description...

  • Page 46: Generic Header (Cont.)

    EDM 01-17 DAG 7.1S Card User Guide Generic Header (cont.) The generic ERF header for channelised links is shown below: Byte 3 Byte 2 Byte 1 Byte 0 timestamp timestamp type flags rlen lctr wlen MCH (Multichannel header) (rlen - 20) bytes of packet timestamp The time of arrival of the cell, an ERF 64-bit timestamp.

  • Page 47: Type-5 Record

    EDM 01-17 DAG 7.1S Card User Guide lctr Depending upon the ERF type this 16 bit field is either a loss counter of colour field. The loss counter records the number of packets lost between the DAG card and the memory hole due to overloading on the PCI bus.

  • Page 48: Type-7 Record

    EDM 01-17 DAG 7.1S Card User Guide Type-7 Record The format of the multichannel header for channelized links used for TYPE_MC_ATM is shown below: This header is divided into several bit fields as follows: 0-9: Connection number (0-1023) or IMA group ID...

  • Page 49: Type-12 Record

    EDM 01-17 DAG 7.1S Card User Guide The format of the multichannel header for channelized links used for Type-12 TYPE_MC_AAL2 is shown below: Record This header is divided into several bit fields as follows: 0-9: Connection number (0-1023) 10-12: Reserved (possible extra connection numbers)
  • Page 50 EDM 01-17 DAG 7.1S Card User Guide Version 2: May 2006 ©2006...

  • Page 51: Chapter 7 Troubleshooting

    EDM 01-17 DAG 7.1S Card User Guide Chapter 7 Troubleshooting Reporting If you have problems with a DAG card or Endace supplied software which you are unable to resolve, please contact Endace Customer Support at Problems support@endace.com. Supplying as much information as possible enables Endace Customer Support to be more effective in their response to you.

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