National Instruments AT-MIO-16D User Manual
National Instruments AT-MIO-16D User Manual

National Instruments AT-MIO-16D User Manual

Multifunction i/o board for the pc at
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AT-MIO-16D
User Manual
Multifunction I/O Board for the PC AT
March 1995 Edition
Part Number 320489-01
© Copyright 1992, 1995 National Instruments Corporation.
All Rights Reserved.

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Summary of Contents for National Instruments AT-MIO-16D

  • Page 1 AT-MIO-16D User Manual Multifunction I/O Board for the PC AT March 1995 Edition Part Number 320489-01 © Copyright 1992, 1995 National Instruments Corporation. All Rights Reserved.
  • Page 2 National Instruments Corporate Headquarters 6504 Bridge Point Parkway Austin, TX 78730-5039 (512) 794-0100 Technical support fax: (800) 328-2203 (512) 794-5678 Branch Offices: Australia (03) 879 9422, Austria (0662) 435986, Belgium 02/757.00.20, Canada (Ontario) (519) 622-9310, Canada (Québec) (514) 694-8521, Denmark 45 76 26 00, Finland (90) 527 2321, France (1) 48 14 24 24,...
  • Page 3 Limited Warranty The AT-MIO-16D is warranted against defects in materials and workmanship for a period of one year from the date of shipment, as evidenced by receipts or other documentation. National Instruments will, at its option, repair or replace equipment that proves to be defective during the warranty period. This warranty includes parts and labor.
  • Page 4 Any use or application of National Instruments products for or involving medical or clinical treatment must be performed by properly trained and qualified medical personnel, and all traditional medical safeguards, equipment, and procedures that are appropriate in the particular situation to prevent serious injury or death should always continue to be used when National Instruments products are being used.
  • Page 5 Preface This manual describes the electrical and mechanical aspects of the AT-MIO-16D and contains information concerning its operation and programming. The AT-MIO-16D, a member of the National Instruments AT Series of expansion boards for the IBM PC AT and compatible computers, combines the functionality of two popular National Instruments boards, the AT-MIO-16 and the PC-DIO-24.
  • Page 6 AT-MIO-16D. • Appendix G, Customer Communication, contains forms for you to complete to facilitate communication with National Instruments concerning our products. • The Index alphabetically lists topics covered in this manual, including the page where the topic can be found.
  • Page 7 Am9513A/Am9513 System Timing Controller technical manual Customer Communication National Instruments wants to receive your comments on our products and manuals. We are interested in the applications you develop with our products, and we want to help if you have problems with them. To make it easy for you to contact us, this manual contains comment and configuration forms for you to complete.
  • Page 8: Table Of Contents

    Two's Complement Mode (Factory Setting)......2-17 Unipolar Output Selection ..............2-18 RTSI Bus Clock Selection .....................2-18 Hardware Installation.....................2-20 Signal Connections ......................2-20 AT-MIO-16D I/O Connector Pin Description...........2-21 MIO-16 I/O Connector Pin Description.............2-22 MIO-16 Signal Connection Descriptions............2-23 Analog Input Signal Connections ..............2-25 Types of Signal Sources..................2-26 Floating Signal Sources .................2-26...
  • Page 9 Analog Output Range..................3-11 Analog Output Data Coding ................3-11 MIO-16 Digital I/O Circuitry..................3-11 Timing I/O Circuitry ......................3-13 RTSI Bus Interface Circuitry ..................3-15 DIO-24 Functional Overview ..................3-17 DIO-24 Interrupt Control Circuitry................3-17 DIO-24 Circuitry I/O Connector..................3-18 AT-MIO-16D User Manual © National Instruments Corporation...
  • Page 10 DIO-24 PORTB Register...............4-38 DIO-24 PORTC Register...............4-39 DIO-24 CNFG Register .................4-40 MIO-16 Programming Considerations................4-41 Register Programming Considerations ..............4-41 Initializing the MIO-16 Circuitry of the AT-MIO-16D Board......4-41 Initializing the Am9513A ..............4-42 Initializing the Analog Output Circuitry..........4-43 © National Instruments Corporation AT-MIO-16D User Manual...
  • Page 11 Programming the Analog Output Circuitry ............4-71 Programming the MIO-16 Digital I/O Circuitry..........4-72 Programming the Am9513A Counter/Timer .............4-73 RTSI Bus Trigger Line Programming Considerations ........4-73 AT-MIO-16D RTSI Signal Connection Considerations......4-74 Programming the RTSI Switch..............4-75 Programming DMA Operations.................4-76 Interrupt Programming..................4-77 DIO-24 Circuitry Programming Considerations............4-78 DIO-24 Circuitry Register Descriptions ............4-78...
  • Page 12 MIO-16 I/O Connector ......................B-1 MIO-16 Signal Connection Descriptions...............B-2 Appendix C DIO-24 I/O Connector .......................C-1 DIO-24 Signal Connection Descriptions ...............C-2 Appendix D AT-MIO-16D I/O Connector ..................D-1 Appendix E AMD Am9513A Data Sheet .....................E-1 Appendix F Oki MSM82C55A Data Sheet ..................F-1 Appendix G Customer Communication ....................G-1...
  • Page 13 (Factory Setting) ....................2-19 Figure 2-22. Receive RTSI Bus Clock Signal...............2-19 Figure 2-23. Drive RTSI Bus Clock Signal with Onboard Oscillator........2-20 Figure 2-24. AT-MIO-16D I/O Connector Pin Assignments..........2-21 Figure 2-25. MIO-16 I/O Connector Pin Assignments ............2-22 Figure 2-26. AT-MIO-16D Instrumentation Amplifier............2-26 Figure 2-27.
  • Page 14 AT-MIO-16D I/O Connector................D-1 Tables Table 2-1. AT Bus Interface Factory Settings ..............2-1 Table 2-2. Default Settings of Other National Instruments Products for the PC....2-3 Table 2-3. Switch Settings with Corresponding Base I/O Address and Base I/O Address Space....................2-5 Table 2-4.
  • Page 15: Chapter 1 Introduction

    (expandable with SCXI and the AMUX-64T), and programmable gains of 1, 10, 100, and 500 or 1, 2, 4, and 8. The AT-MIO-16D has a 9-µsec converter, guaranteed transfer rates of up to 100 ksamples/sec, and a 512-word A/D FIFO buffer to obtain the highest possible data acquisition rate.
  • Page 17: What Your Kit Should Contain

    181965-11 The board part number is printed on your board along the top edge on the component side. You can identify which version of the AT-MIO-16D board you have by looking up the part number in the preceding table. In addition to the board, each version of the AT-MIO-16D kit contains the following components.
  • Page 18: Optional Software

    Normally, however, you should not need to read the low-level programming details in the user manual because the NI-DAQ software package for controlling the AT-MIO-16D is included with the board. Using NI-DAQ is quicker and easier than and as flexible as using the low-level programming described in Chapter 4, Programming.
  • Page 19: Optional Equipment

    BNC-2080 BNC adapter board without cable 776579-90 Digital signal conditioning modules SSR Series mounting rack and 1.0 m cable 24-channel without cable 776290-924 16-channel without cable 776290-916 8-channel without cable 776290-908 8-channel with SC-205X cable 776290-18 © National Instruments Corporation AT-MIO-16D User Manual...
  • Page 20: Custom Cables

    Introduction Chapter 1 Custom Cables The AT-MIO-16D I/O connector is a 100-pin male ribbon cable header. The manufacturer part number National Instruments uses for this header is as follows: • Robinson Nugent (part number P50E-100P1-SR1-TG) The mating connector for the board is a 100-position, polarized, ribbon socket connector. This connector breaks out into two 50-pin female connectors with 50-conductor ribbon cables via a cable assembly.
  • Page 21: Unpacking

    T&B Ansley Corporation (part number 609-0005) Unpacking Your AT-MIO-16D board is shipped in an antistatic plastic bag to prevent electrostatic damage to the board. Several components on the board can be damaged by electrostatic discharge. To avoid such damage in handling the board, take the following precautions: •...
  • Page 22: Configuration And Installation

    AT Bus Interface The AT-MIO-16D is configured at the factory to a base I/O address of hex 220, to use DMA channels 6 and 7, to use interrupt level 10 for the MIO-16 circuitry, and to use interrupt enable line PC4 with interrupt level 5 for the DIO-24 circuitry.
  • Page 24: Base I/O Address Selection

    Configuration and Installation Base I/O Address Selection The base I/O address for the AT-MIO-16D is determined by the switches at position U61 as shown in Figure 2-1. The switches are set at the factory for the base I/O address hex 220. This factory setting is used as the default base I/O address value by National Instruments software packages for use with the AT-MIO-16D.
  • Page 25: Figure 2-2. Example Base I/O Address Switch Settings

    Make a note of the new AT-MIO-16D base I/O address for use when configuring the AT-MIO-16D software (a form is provided for you in Appendix G, Customer Communication). Table 2-3 lists the possible switch settings, the corresponding base I/O address, and the base I/O address space used for that setting.
  • Page 26: Dma Channel Selection

    The DMA channel used by the AT-MIO-16D is selected by jumpers on W12 as shown in Figure 2-1. The AT-MIO-16D is set at the factory to use DMA channels 6 and 7 for dual DMA mode. These are the default DMA channels used by the AT-MIO-16D software handler. Verify that these DMA channels are not also used by equipment already installed in your computer.
  • Page 27: Figure 2-3. Dma Jumper Settings For Dma Channels 6 And 7 (Factory Setting)

    Configuration and Installation Chapter 2 Table 2-4. DMA Channels for the AT-MIO-16D Channel Acknowledge Request DACK5 (A5) DRQ5 (R5) DACK6 (A6) DRQ6 (R6) DACK7 (A7) DRQ7 (R7) Two jumpers must be installed to select a DMA channel. The DMA Acknowledge and DMA Request lines selected must have the same number suffix for proper operation.
  • Page 28: Interrupt Selection

    Figure 2-5. DMA Jumper Settings for Disabling DMA Transfers Interrupt Selection The AT-MIO-16D board can connect to any of the 11 interrupt lines of the PC AT I/O channel. The interrupt lines for the MIO-16 and DIO-24 circuitry are selected by jumpers on one of the rows of pins located above the I/O slot edge connector on the AT-MIO-16D (refer to Figure 2-1).
  • Page 29: Dio-24 Circuitry Interrupt Enable Settings

    Chapter 2 If you do not want to use interrupts, place the jumpers on W13 in the position shown in Figure 2-7. This setting disables the AT-MIO-16D from asserting an interrupt line on the PC AT I/O channel. MIO IRQ 9 10 11 12 14 15 •...
  • Page 30: Table 2-5. Analog I/O Jumper Settings

    Two's complement digital-to-analog converter (DAC) input modes • AT-MIO-16D clock signal set to 10 MHz Table 2-5 lists all the available analog I/O jumper configurations for the AT-MIO-16D with the factory settings noted. Table 2-5. Analog I/O Jumper Settings Configuration...
  • Page 31: Analog Input Configuration

    The signal and its reference are each assigned an input channel. With this input configuration, the AT-MIO-16D can monitor eight different analog input signals. You select the DIFF analog input configuration by setting jumpers W6 and W9 as...
  • Page 32: Rse Analog Input (16 Channels)

    RSE input means that all input signals are referenced to a common ground point that is also tied to the analog input ground of the AT-MIO-16D board. The negative (-) input of the differential input amplifier is tied to the analog ground. This configuration is useful when measuring floating signal sources.
  • Page 33: Nrse Analog Input (16 Channels)

    Bipolar input means that the analog input voltage range is between -V . The AT-MIO-16D also has two input ranges–10 V input range and a 20 V input range. The selection of input polarity and range are combined into three possible configurations as shown in Table 2-7.
  • Page 34: Figure 2-12. 0 To +10 V Input Configuration

    Figure 2-13. -5 to +5 V Input Configuration ADC Range 20 V 10 V A B C A B C ADC Mode Figure 2-14. Factory -10 to +10 V Analog Input Configuration © National Instruments Corporation 2-13 AT-MIO-16D User Manual...
  • Page 35: Considerations For Selecting Analog Input Ranges

    (below 0 V), a unipolar input is best. However, if the signal does go negative, inaccurate readings will occur. Software-programmable gain on the AT-MIO-16D increases overall flexibility by matching input signal ranges to those accommodated by the AT-MIO-16D analog-to-digital converter (ADC).
  • Page 36: Analog Output Configuration

    Table 2-5. The following paragraphs describe in detail each of the analog output configurations. Analog Output Reference Selection Each DAC can be connected to the AT-MIO-16D internal reference of 10 V or to the external reference signal connected to the EXTREF pin on the I/O connector. This signal applied to EXTREF must be between -10 V and +10 V.
  • Page 37: Analog Output Polarity Selection

    Analog Output Channel 1: A - B This configuration is shown in Figure 2-17. A B C A B C DAC 0 DAC 1 Channel 0 Channel 1 Figure 2-17. Factory Bipolar Output Configuration AT-MIO-16D User Manual 2-16 © National Instruments Corporation...
  • Page 38: Straight Binary Mode

    W11 A - B This configuration is shown in Figure 2-19. DAC 0 DAC 1 A B C A B C Channel 0 Channel 1 Figure 2-19. Two's Complement Mode (Factory Setting) © National Instruments Corporation 2-17 AT-MIO-16D User Manual...
  • Page 39: Unipolar Output Selection

    Each AT Series board with a RTSI bus interface has an onboard 10-MHz oscillator. Thus, one board can drive the RTSI bus clock signal, and the other boards can receive this signal or disconnect from it. AT-MIO-16D User Manual 2-18 © National Instruments Corporation...
  • Page 40: Figure 2-21. Disconnect From Rtsi Bus Clock; Use Onboard Oscillator (Factory Setting)

    Figures 2-21, 2-22, and 2-23 show the jumper positions for each of the configurations described above. • • Figure 2-21. Disconnect from RTSI Bus Clock; Use Onboard Oscillator (Factory Setting) • • Figure 2-22. Receive RTSI Bus Clock Signal © National Instruments Corporation 2-19 AT-MIO-16D User Manual...
  • Page 41: Hardware Installation

    2. Remove the top cover or access port to the I/O channel. 3. Remove the expansion slot cover on the back panel of the computer. 4. Insert the AT-MIO-16D into a 16-bit slot. It may be a tight fit, but do not force the board into place.
  • Page 42: At-Mio-16D I/O Connector Pin Description

    Connections that exceed any of the maximum ratings of input or output signals on the AT-MIO-16D can result in damage to the AT-MIO-16D board and to the PC AT. Maximum input ratings for each signal are given in this chapter under the discussion of that signal.
  • Page 43: Mio-16 I/O Connector Pin Description

    Configuration and Installation Chapter 2 MIO-16 I/O Connector Pin Description Figure 2-25 shows the pin assignments for the MIO-16 I/O connector of the AT-MIO-16D. AI GND AI GND ACH0 ACH8 ACH1 ACH9 ACH2 ACH10 ACH3 ACH11 ACH4 ACH12 ACH5 ACH13...
  • Page 44: Mio-16 Signal Connection Descriptions

    EXTSTROBE* DIGGND External Strobe – Writing to the EXTSTROBE* Register results in a minimum 200 nsec low pulse on this pin. © National Instruments Corporation 2-23 AT-MIO-16D User Manual...
  • Page 45 The signals on the connector can be classified as analog input signals, analog output signals, digital I/O signals, digital power connections, or timing I/O signals. Signal connection guidelines for each of these groups are given as follows. AT-MIO-16D User Manual 2-24 © National Instruments Corporation...
  • Page 46: Analog Input Signal Connections

    GND signal pins. AI GND is an analog input common signal that is routed directly to the ground tie point on the AT-MIO-16D. These pins can be used for a general analog power ground tie point to the AT-MIO-16D if necessary. Pin 19 is the AI SENSE pin. In single-ended mode, this pin is connected internally to the negative (-) input of the AT-MIO-16D instrumentation amplifier.
  • Page 47: Types Of Signal Sources

    All signals must be referenced to ground somewhere, either at the source device or at the AT-MIO-16D. If you have a floating source, you must use a ground-referenced input connection at the AT-MIO-16D. If you have a grounded source, you must use a nonreferenced input connection at the AT-MIO-16D.
  • Page 48: Ground-Referenced Signal Sources

    Input Configurations The AT-MIO-16D can be configured for one of three input modes–NRSE, RSE, or DIFF. The following sections discuss the use of single-ended and differential measurements, and considerations for measuring both floating and ground-referenced signal sources. Table 2-10 summarizes the recommended input configuration for both types of signal sources.
  • Page 49: Differential Connections For Grounded Signal Sources

    Differential Connections for Grounded Signal Sources Figure 2-27 shows how to connect a ground-referenced signal source to an AT-MIO-16D board configured for DIFF input. Configuration instructions are included under the Analog Input Configuration section earlier in this chapter.
  • Page 50: Differential Connections For Floating Signal Sources

    Figure 2-27). Differential Connections for Floating Signal Sources Figure 2-28 shows how to connect a floating signal source to an AT-MIO-16D board configured for DIFF input. Configuration instructions are included under the Analog Input Configuration section earlier in this chapter.
  • Page 51: Single-Ended Connection Considerations

    RSE configuration and NRSE configuration. Use the RSE configuration for floating signal sources; in this case, the AT-MIO-16D provides the reference ground point for the external signal. Use the NRSE configuration for ground-referenced signal sources; in this case, the external signal supplies its own reference ground point and the AT-MIO-16D should not supply one.
  • Page 52: Single-Ended Connections For Grounded Signal Sources (Nrse Configuration)

    (+) and negative (-) inputs of the instrumentation amplifier and this difference is rejected by the amplifier. On the other hand, if the input circuitry of the AT-MIO-16D is referenced to ground, such as in the RSE configuration, this difference in ground potentials appears as an error in the measured voltage.
  • Page 53: Common-Mode Signal Rejection Considerations

    Figures 2-27 and 2-30, located earlier in this chapter, show connections for signal sources that are already referenced to some ground point with respect to the AT-MIO-16D. In these cases, the instrumentation amplifier can reject any voltage due to ground potential differences between the signal source and the AT-MIO-16D.
  • Page 54: Analog Output Signal Connections

    (-) input of the instrumentation amplifier. If the input signal common-mode range exceeds ±7 V with respect to the AT-MIO-16D ground, you need to limit the amount of floating that occurs between the signal ground and the AT-MIO-16D ground.
  • Page 55: Digital I/O Signal Connections

    Pins 24 through 32 of the MIO-16 I/O connector are digital I/O signal pins associated with the MIO-16 circuitry of the AT-MIO-16D board. Pins 25, 27, 29, and 31 are connected to the digital lines ADIO<3..0> for digital I/O port A. Pins 26, 28, 30, and 32 are connected to the digital lines BDIO<3..0>...
  • Page 56: Figure 2-32. Digital I/O Connections

    Figure 2-32 depicts signal connections for three typical digital I/O applications. +5 V Port A ADIO<3..0> Port B TTL Signal BDIO<3..0> +5 V Switch DIG GND MIO-16 I/O Connector AT-MIO-16D Board Figure 2-32. Digital I/O Connections © National Instruments Corporation 2-35 AT-MIO-16D User Manual...
  • Page 57: Power Connections

    These +5 V power pins should not be directly connected to analog or digital ground or to any other voltage source on the AT-MIO-16D or any other device. Doing so can damage the AT-MIO-16D and the PC AT. National Instruments is not liable for damages resulting from such a connection.
  • Page 58: Figure 2-34. Extconv* Signal Timing

    The data acquisition operation is initiated by the high-to-low edge of the applied pulse. Figure 2-35 shows the timing requirements for the START TRIG* signal. © National Instruments Corporation 2-37 AT-MIO-16D User Manual...
  • Page 59: General-Purpose Timing Signal Connections

    50 nsec before going low. The START TRIG* signal is one LS TTL load and is pulled up to +5 V through a 4.7-kΩ resistor. The STOP TRIG pin is used during AT-MIO-16D pretriggered data acquisition operations. In pretriggered mode, data is acquired but no sample counting occurs until a rising edge is applied to the STOP TRIG pin.
  • Page 60: Figure 2-37. Event-Counting Application With External Switch Gating

    GATE input is either high or low. If the counter is programmed to count an internal timebase, then the pulse width is equal to the counter value multiplied by the timebase period. © National Instruments Corporation 2-39 AT-MIO-16D User Manual...
  • Page 61: Figure 2-38. Frequency Measurement Application

    Am9513A input and output pins to the I/O connector. In addition, the GATE, SOURCE, and OUT1 pins are pulled up to +5 V through a 4.7-kΩ resistor. The input and output ratings and timing specifications for the Am9513A signals are given below. AT-MIO-16D User Manual 2-40 © National Instruments Corporation...
  • Page 62: Figure 2-39. General-Purpose Timing Signals

    OUT output signals of the Am9513A. SOURCE GATE 145 nsec minimum 70 nsec minimum 100 nsec minimum 10 nsec minimum 145 nsec minimum 300 nsec maximum Figure 2-39. General-Purpose Timing Signals © National Instruments Corporation 2-41 AT-MIO-16D User Manual...
  • Page 63 In addition to the signals applied to the SOURCE and GATE inputs, the Am9513A generates five internal timebase clocks from the clock signal supplied by the AT-MIO-16D. This clock signal is selected by the W5 jumper and then divided by 10. The factory default value is 1 MHz into the Am9513A (10-MHz clock signal on the AT-MIO-16D).
  • Page 64: Dio-24 I/O Connector Pin Description

    Warning: Connections that exceed any of the maximum ratings of input or output signals on the AT-MIO-16D may result in damage to the AT-MIO-16D board and to the PC. Maximum ratings for each signal are given in this chapter under the discussion of that signal.
  • Page 65: Dio-24 Signal Connection Descriptions

    This +5-V power pin should not be directly connected to analog or digital ground or to any other voltage source on the AT-MIO-16D or any other device. Doing so can damage the AT-MIO-16D and the PC AT. National Instruments is not liable for damages resulting from such a connection.
  • Page 66: Timing Specifications

    INTR output Interrupt Request This signal becomes high when the 82C55A is requesting service during a data transfer. The appropriate DIO interrupt enable bits must be set to generate this signal. © National Instruments Corporation 2-45 AT-MIO-16D User Manual...
  • Page 67 This signal is the write signal generated from the control lines of the DATA bidirectional Data Lines at the Selected Port This signal indicates when the data on the data lines at a selected port is or should be available. AT-MIO-16D User Manual 2-46 © National Instruments Corporation...
  • Page 68: Dio-24 Mode 1 Input Timing

    STB* = 1 to INTR = 1 – Data after STB* = 1 – RD* = 0 to INTR = 0 – RD* = 1 to IBF = 0 – All timing values are in nanoseconds. © National Instruments Corporation 2-47 AT-MIO-16D User Manual...
  • Page 69: Dio-24 Mode 1 Output Timing

    WR* = 1 to OBF* = 0 – ACK* = 0 to OBF* = 1 – ACK* Pulse Width – ACK* = 1 to INTR = 1 – All timing values are in nanoseconds. AT-MIO-16D User Manual 2-48 © National Instruments Corporation...
  • Page 70: Dio-24 Mode 2 Bidirectional Timing

    ACK* = 0 to OBF = 1 – ACK* Pulse Width – ACK* = 0 to Output – ACK* = 1 to Output Float RD* = 1 to IBF = 0 – All timing values are in nanoseconds. © National Instruments Corporation 2-49 AT-MIO-16D User Manual...
  • Page 71: Cabling And Field Wiring

    Use individually shielded, twisted-pair wires to connect analog input signals to the AT-MIO-16D. With this type of wire, the signals attached to the CH+ and CH- inputs are twisted together and then covered with a shield. This shield is then connected only at one point to the signal source ground.
  • Page 72: Dio-24 Cabling Considerations

    DIO-24 Cabling Considerations The DIO-24 circuitry of the AT-MIO-16D can be interfaced to a wide range of printers, plotters, test instruments, I/O racks and modules, screw terminal panels, and almost any device with a parallel interface. The DIO-24 circuitry I/O connector is a standard 50-pin header connector. The pin assignments are compatible with the standard 24-channel I/O module mounting racks (such as those manufactured by Opto 22 and Gordos).
  • Page 73 T&B/Ansley Corporation part number 171-50 If you plan to use the DIO section of the AT-MIO-16D for a communications application, you may need shielded cables to meet FCC requirements. The DIO-section I/O bracket has been designed so that the shield of the I/O cable can be grounded through the computer chassis when a...
  • Page 74: Chapter 3 Theory Of Operation

    Chapter 3 Theory of Operation This chapter contains a functional overview of the AT-MIO-16D and explains the operation of each functional unit making up the AT-MIO-16D. MIO-16 Functional Overview The block diagram in Figure 3-1 is a functional overview of the MIO-16 circuitry of the AT-MIO-16D board.
  • Page 75: Pc At I/O Channel Interface Circuitry

    PC AT I/O Channel Interface Circuitry The AT-MIO-16D board is a full-size 16-bit PC AT I/O channel adapter. The PC AT I/O channel consists of a 24-bit address bus, a 16-bit data bus, a direct memory access (DMA) arbitration bus, interrupt lines, and several control and support signals.
  • Page 76: Figure 3-2. Pc At I/O Channel Interface Circuitry Block Diagram

    AT-MIO-16D multiple function circuitry. The PC AT I/O channel has 24 address lines; the AT-MIO-16D uses 10 of these lines to decode the board address. Therefore, the board address range is hex 000 to 3FF. SA5 through SA9 are used to generate the board enable signal.
  • Page 77: Analog Input And Data Acquisition Circuitry

    The interrupt control circuitry routes any enabled interrupt requests to the selected interrupt request line. The interrupt requests are tristate output signals allowing the AT-MIO-16D board to share the interrupt lines with other devices. Eleven interrupt request lines are available for use by the AT-MIO-16D: IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, IRQ9, IRQ10, IRQ11, IRQ12, IRQ14, and IRQ15.
  • Page 78: Figure 3-3. Analog Input And Data Acquisition Circuitry Block Diagram

    Chapter 3 Theory of Operation Figure 3-3. Analog Input and Data Acquisition Circuitry Block Diagram © National Instruments Corporation AT-MIO-16D User Manual...
  • Page 79: Analog Input Circuitry

    (+) input of the instrumentation amplifier. The negative (-) input of the instrumentation amplifier is tied to the AT-MIO-16D ground for RSE input or to the analog return of the input signals via the AI SENSE input on the I/O connector for NRSE input.
  • Page 80: A/D Converter

    The A/D FIFO generates a signal that indicates when it contains A/D conversion data. You can read the state of this signal from the AT-MIO-16D Status Register. You can use this signal to generate a DMA request signal or to generate an interrupt. Sign-extension circuitry at the A/D FIFO output adds four most significant bits (MSBs), bits 15 through 12, to the 12-bit FIFO output (bits 11 through 0) to produce a 16-bit result.
  • Page 81: Single Conversions

    You can initiate single A/D conversions by applying an active low pulse to the EXTCONV* input on the I/O connector or by writing to the Start Convert Register on the AT-MIO-16D board. During data acquisition, the onboard sample-interval counter (Counter 3 of the Am9513A Counter/Timer) generates pulses that initiate A/D conversions.
  • Page 82: Single-Channel Data Acquisition

    Both the multiplexer counter and the mux-gain memory can be directly written to through AT-MIO-16D registers. For writing purposes, the multiplexer counter serves as a pointer to the mux-gain memory. The counter can be loaded with any 4-bit value to point to any mux-gain memory location.
  • Page 83: Analog Output Circuitry

    20 ksamples/sec Analog Output Circuitry The AT-MIO-16D provides two channels of 12-bit digital-to-analog (D/A) output. Each analog output channel provides options such as unipolar or bipolar output and internal or external reference voltage selection. Figure 3-4 shows a block diagram of the analog output circuitry.
  • Page 84: Analog Output Range

    ) multiplied by the digital code loaded into the DAC. Each DAC can be loaded with a 12-bit digital code by writing to registers on the AT-MIO-16D board. The output op-amps convert the DAC current output to a voltage output provided at the AT-MIO-16D I/O connector DAC0 OUT and DAC1 OUT pins.
  • Page 85: Figure 3-5. Digital I/O Circuitry Block Diagram

    I/O line. When the ports are not enabled, the digital I/O lines act as high-impedance inputs. The external strobe signal EXTSTROBE*, shown in Figure 3-5, is a general-purpose strobe signal. Writing to an address location on the AT-MIO-16D board generates an active-low 200-nsec AT-MIO-16D User Manual 3-12 ©...
  • Page 86: Timing I/O Circuitry

    Theory of Operation pulse on this output pin. EXTSTROBE* is not necessarily part of the digital I/O circuitry but is shown here because it can be used to latch digital output from the AT-MIO-16D into an external device. Timing I/O Circuitry The AT-MIO-16D uses an Am9513A Counter/Timer for data acquisition timing and for general- purpose timing I/O functions.
  • Page 87 The SOURCE, GATE, and OUT pins for Counters 1, 2, and 5 of the onboard Am9513A are located on the AT-MIO-16D I/O connector. A rising edge signal on the STOP TRIG pin of the I/O connector sets the flip-flop output signal connected to the GATE4 input of the Am9513A and can be used as an additional gate input.
  • Page 88: Rtsi Bus Interface Circuitry

    4-bit programmed value and provides the divided down signal at the FOUT pin. RTSI Bus Interface Circuitry The AT-MIO-16D is interfaced to the National Instrument RTSI bus. The RTSI bus has seven trigger lines and a system clock line. All National Instruments AT Series boards with RTSI bus connectors can be wired together inside the PC AT and share these signals.
  • Page 89 AT-MIO-16D general-purpose and data acquisition timing to be controlled over the RTSI bus as well as externally and allow the AT-MIO-16D and the I/O connector to provide timing signals to other AT boards connected to the RTSI bus.
  • Page 90: Dio-24 Functional Overview

    Figure 3-9. AT-MIO-16D DIO-24 Block Diagram DIO-24 Interrupt Control Circuitry The interrupt level used by the DIO-24 circuitry of the AT-MIO-16D is selected by the onboard jumper W13. Another onboard jumper, W14, is used to enable interrupts from the DIO-24 circuitry.
  • Page 91: Dio-24 Circuitry I/O Connector

    See Chapter 2, Configuration and Installation, for additional information. 82C55A Programmable Peripheral Interface The 82C55A PPI is the heart of the AT-MIO-16D DIO-24 circuitry. This chip has 24 programmable I/O pins that represent three 8-bit ports: PA, PB, and PC. Each port can be programmed as an input or an output port.
  • Page 92: Mode 1

    Any of the eight bits of Port C can be set or reset with one control word. This feature generates status and control for Port A and Port B when operating in Mode 1 or Mode 2. © National Instruments Corporation 3-19...
  • Page 93: Programming

    Register Map The register map for the AT-MIO-16D is shown in Table 4-1. This table gives the register name, the register offset address, the size of the register in bits, and the type of the register (read-only, write-only, or read-and-write). The actual register address is computed by adding the individual offset address to the board base address.
  • Page 94: Register Sizes

    The IBM PC AT and compatibles support two different transfer sizes for read-and-write operations: byte (8-bit) and word (16-bit). Table 4-1 shows the size of each AT-MIO-16D register. For example, reading the A/D FIFO Register requires a 16-bit (word) read operation at the specified address, whereas writing to the RTSI Strobe Register requires an 8-bit (byte) write operation at the specified address.
  • Page 95: Register Description Format

    The bit map field for some write-only registers states not applicable, no bits used. Writing to these registers generates a strobe in the AT-MIO-16D. These strobes are used to cause some onboard event to occur. For example, they can be used to clear the analog input circuitry or to start a data acquisition operation.
  • Page 96: Command Register 1

    Programming Chapter 4 Command Register 1 Command Register 1 contains ten bits that control AT-MIO-16D interrupts, direct memory access (DMA), and some analog input and output modes. Address: Base address + 0 (hex) Type: Write-only Word Size: 16-bit Bit Map:...
  • Page 97 If 2SCADC* is cleared, a 16-bit two's complement mode is used and the data read from the ADC ranges from -2,048 to +2,047 decimal (F800 to 07FF hex). This mode is useful if a bipolar input range is used. © National Instruments Corporation AT-MIO-16D User Manual...
  • Page 98: Status Register

    Programming Chapter 4 Status Register The Status Register contains 16 bits of AT-MIO-16D hardware status information, including interrupt and analog input status. Address: Base address + 0 (hex) Type: Read-only Word Size: 16-bit Bit Map: GINT DAQSTOPINT CONVAVAIL OUT2INT DAQPROG DMATCINT OVERFLOW...
  • Page 99 1 is connected to the positive (+) input of the instrumentation amplifier. In DIFF mode, multiplexer 1 is always enabled. In this mode, the output of multiplexer 1 is connected to the negative (-) input of the instrumentation amplifier. © National Instruments Corporation AT-MIO-16D User Manual...
  • Page 100 MA<2..0> if MUX0EN is set and by the value of MA<2..0> + 8 if MUX1EN is set. In DIFF mode, two analog input channels are selected simultaneously. The two channels are MA<2..0> and MA<2..0> + 8. AT-MIO-16D User Manual © National Instruments Corporation...
  • Page 101: Command Register 2

    Chapter 4 Programming Command Register 2 Command Register 2 contains 10 bits that control AT-MIO-16D interrupts, digital output drivers, and scan modes used by the data acquisition circuitry. Address: Base address + 2 (hex) Type: Write-only Word Size: 16-bit Bit Map:...
  • Page 102 RTSI bus trigger lines. If A2DRV is set, pin A2 of the RTSI switch is driven by OUT2. If A2DRV is cleared, pin A2 is not driven. AT-MIO-16D User Manual 4-10 © National Instruments Corporation...
  • Page 103: The Event Strobe Register Group

    The Event Strobe Register Group The Event Strobe Register Group consists of four registers that, when written to, cause the occurrence of certain events on the AT-MIO-16D board, such as clearing flags and starting A/D conversions. Descriptions of the four registers making up the Event Strobe Register Group are given on the following pages.
  • Page 104: Start Convert Register

    40 of the I/O connector should be in a high-impedance or high state, and the A0 pin of the RTSI bus switch should be configured as an input pin. AT-MIO-16D User Manual 4-12 © National Instruments Corporation...
  • Page 105: Start Daq Register

    Writing to the Start DAQ Register location initiates a multiple A/D conversion data acquisition operation. Note: Several other pieces of AT-MIO-16D circuitry must be set up before a data acquisition run can occur. See the Programming Multiple A/D Conversions on a Single Input Channel section later in this chapter.
  • Page 106: A/D Clear Register

    • Any pending DMATCINT interrupt is cleared. • Any pending DMA request is cleared. Address: Base address + C (hex) Type: Write-only Word Size: 16-bit Bit Map: Not applicable, no bits used AT-MIO-16D User Manual 4-14 © National Instruments Corporation...
  • Page 107: External Strobe Register

    (from the digital output port, for example). Address: Base address + E (hex) Type: Write-only Word Size: 16-bit Bit Map: Not applicable, no bits used © National Instruments Corporation 4-15 AT-MIO-16D User Manual...
  • Page 108: Analog Output Register Group

    The third register in the Analog Output Register Group is the INT2CLR Register. The AT-MIO-16D can be programmed to interrupt when it detects a rising edge signal on the OUT2 pin of the Am9513A Counter/Timer. This interrupt can be cleared by writing to the INT2CLR Register.
  • Page 109: Dac0 Register

    OUT2 pulse. See the Programming the Analog Output Circuitry section later in this chapter for Table 4-5 and 4-6, both of which map digital values to output voltage. © National Instruments Corporation 4-17 AT-MIO-16D User Manual...
  • Page 110: Dac1 Register

    OUT2 pulse. See the Programming the Analog Output Circuitry section later in this chapter for Tables 4-5 and 4-6, both of which map digital values to output voltage. AT-MIO-16D User Manual 4-18 © National Instruments Corporation...
  • Page 111: Int2Clr Register

    Writing to INT2CLR clears the interrupt request asserted when an OUT2 pulse is detected. Address: Base address + 14 (hex) Type: Write-only Word Size: 16-bit Bit Map: Not applicable, no bits used © National Instruments Corporation 4-19 AT-MIO-16D User Manual...
  • Page 112: Analog Input Register Group

    A/D conversion results. Writing to the DMA TC INT Clear Register clears the interrupt request generated by a DMA terminal count pulse. Bit descriptions for the registers making up the Analog Input Register Group are given on the following pages. AT-MIO-16D User Manual 4-20 © National Instruments Corporation...
  • Page 113: Mux-Counter Register

    4 and addresses mux-gain memory location 4. The analog circuitry is then controlled by the multiplexer address and gain settings in mux-gain memory location 4 (see the Mux-Gain Register description later in this chapter). © National Instruments Corporation 4-21 AT-MIO-16D User Manual...
  • Page 114: Mux-Gain Register

    GAIN<1..0> This 2-bit field controls the gain setting of the input instrumentation amplifier. The actual amplifier gains depend on the type of AT-MIO-16D board. The following gains can be selected on the AT-MIO-16DH board: GAIN<1..0> Actual Gain The following gains can be selected on the AT-MIO-16DL board: GAIN<1..0>...
  • Page 115 The multiplexer counter is written to in order to address a specific location in the mux-gain memory. Any subsequent value written to the Mux-Gain Register is then stored in that memory location as well as applied to the analog input multiplexer and gain circuitry. © National Instruments Corporation 4-23 AT-MIO-16D User Manual...
  • Page 116: A/D Fifo Register

    D15. Values read, therefore, range from -2,048 to +2,047 decimal (F800 to 7FF hex). Two's complement mode is useful for bipolar analog input readings because the values read reflect the polarity of the input signal. AT-MIO-16D User Manual 4-24 © National Instruments Corporation...
  • Page 117: Dma Tc Int Clear Register

    Writing to the DMA TC INT Clear Register clears the interrupt request asserted when a DMA terminal count pulse is detected. Address: Base address + 16 (hex) Type: Write-only Word Size: 16-bit Bit Map: Not applicable, no bits used © National Instruments Corporation 4-25 AT-MIO-16D User Manual...
  • Page 118: Am9513A Counter/Timer Register Group

    These internal registers are accessed through the Am9513A Data Register. A detailed register description of all Am9513A registers is included in Appendix E, Am9513A Data Sheet. Bit descriptions for the Am9513A Counter/Timer Register Group registers are given in the following pages. AT-MIO-16D User Manual 4-26 © National Instruments Corporation...
  • Page 119: Am9513A Data Register

    These 16 bits are loaded into the Am9513A Internal Register currently selected. See Appendix E, Am9513A Data Sheet, for the detailed bit descriptions of the 18 registers accessed through the Am9513A Data Register. © National Instruments Corporation 4-27 AT-MIO-16D User Manual...
  • Page 120: Am9513A Command Register

    These bits must always be set when writing to the Am9513A Command Register. C<7..0> These eight bits are loaded into the Am9513A Command Register. See Appendix E, Am9513A Data Sheet, for the detailed bit description of the Am9513A Command Register. AT-MIO-16D User Manual 4-28 © National Instruments Corporation...
  • Page 121: Am9513A Status Register

    Counter 4 is at a logic high state. BYTEPTR This bit represents the state of the Am9513A Byte Pointer Flip- Flop. This bit has no significance for AT-MIO-16D operation because the Am9513A should always be used in 16-bit mode on the AT-MIO-16D.
  • Page 122: Mio-16 Digital I/O Register Group

    The two registers making up the MIO-16 Digital I/O Register Group monitor and control the AT-MIO-16D digital I/O lines. The MIO-16 Digital Input Register returns the digital state of the eight digital I/O lines. A pattern written to the MIO-16 Digital Output Register is driven onto the digital I/O lines when the digital output drivers are enabled (see the description for Command Register 2).
  • Page 123: Mio-16 Digital Input Register

    Chapter 4 Programming MIO-16 Digital Input Register The MIO-16 Digital Input Register, when read, returns the logic state of the eight AT-MIO-16D digital I/O lines at the MIO-16 I/O connector. Address: Base address + 1C (hex) Type: Read-only Word Size:...
  • Page 124: Mio-16 Digital Output Register

    Chapter 4 MIO-16 Digital Output Register Writing to the MIO-16 Digital Output Register controls the eight AT-MIO-16D digital I/O lines. The MIO-16 Digital Output Register controls both ports A and B. When either digital port is enabled, the pattern contained in the MIO-16 Digital Output Register is driven onto the lines of the digital port at the MIO-16 I/O connector.
  • Page 125: The Rtsi Switch Register Group

    Programming The RTSI Switch Register Group The two registers making up the RTSI Switch Register Group allow the AT-MIO-16D RTSI switch to be programmed for routing of signals on the RTSI bus trigger lines to and from several AT-MIO-16D signal lines. The RTSI switch is programmed by shifting a 56-bit routing pattern into the RTSI switch and then loading the internal RTSI Switch Control Register.
  • Page 126: Rtsi Switch Shift Register

    RTSI switch. Each time the RTSI Switch Shift Register is written to, the value of this bit is shifted into the RTSI switch. See the Programming the RTSI Switch section later in this chapter for more information. AT-MIO-16D User Manual 4-34 © National Instruments Corporation...
  • Page 127: Rtsi Switch Strobe Register

    The RTSI Switch Strobe Register is written to after shifting the 56-bit routing pattern into the RTSI Switch Shift Register. Address: Base address + 1F (hex) Type: Write-only Word Size: 8-bit Bit Map: Not applicable, no bits used © National Instruments Corporation 4-35 AT-MIO-16D User Manual...
  • Page 128: Dio-24 Register Group

    The DIO-24 Register Group contains the following four registers: DIO-24 PORTA Register, DIO-24 PORTB Register, DIO-24 PORTC Register, and DIO-24 CNFG Register. Bit descriptions for the registers in the DIO-24 Register Group are given on the following pages. AT-MIO-16D User Manual 4-36 © National Instruments Corporation...
  • Page 129: Dio-24 Porta Register

    Port A for input or output. Address: Base address + 0x00 (hex) Type: Read-and-write Word Size: 8-bit Bit Map: Name Description D<7..0> These eight bits are written to or read from Port A. © National Instruments Corporation 4-37 AT-MIO-16D User Manual...
  • Page 130: Dio-24 Portb Register

    Port B for input or output. Address: Base address + 0x01 (hex) Type: Read-and-write Word Size: 8-bit Bit Map: Name Description D<7..0> These eight bits are written to or read from Port B. AT-MIO-16D User Manual 4-38 © National Instruments Corporation...
  • Page 131: Dio-24 Portc Register

    DIO-24 PORTC Register. Address: Base address + 0x02 (hex) Type: Read-and-write Word Size: 8-bit Bit Map: Name Description D<7..0> These eight bits are written to or read from Port C. © National Instruments Corporation 4-39 AT-MIO-16D User Manual...
  • Page 132: Dio-24 Cnfg Register

    DIO-24 CNFG Register. Address: Base address + 0x03 (hex) Type: Write-only Word Size: 8-bit Bit Map: Name Description CW<7..0> These eight bits are written to or read from the DIO-24 CNFG Register. AT-MIO-16D User Manual 4-40 © National Instruments Corporation...
  • Page 133: Mio-16 Programming Considerations

    MIO-16 Programming Considerations This chapter contains programming instructions for operating the MIO-16 circuitry on the AT-MIO-16D board. Programming the AT-MIO-16D involves writing to and reading from the various registers on the board. The programming instructions list the sequence of steps to take.
  • Page 134: Initializing The Am9513A

    0000 to the Am9513A Data Register (instead of 0004) when ctr = 4. Writing 0000 to the Am9513A Data Register causes the output of Counter 4 to be low and therefore prevents improper termination of the data acquisition operation. AT-MIO-16D User Manual 4-42 © National Instruments Corporation...
  • Page 135: Initializing The Analog Output Circuitry

    Programming Initializing the Analog Output Circuitry The AT-MIO-16D powers up with the analog output circuitry at an unknown voltage. For most applications, the analog output circuitry should be initialized to 0 V. If the analog output channel is configured for unipolar operation, write 0 to the DAC Register (16-bit write) for that channel.
  • Page 136: A/D Fifo Output Binary Formats

    A/D conversion value for straight binary format and 0 to +10 V input range. Table 4-3 shows input voltage versus A/D conversion value for two's complement format for both -5 to +5 V and -10 to +10 V input ranges. AT-MIO-16D User Manual 4-44 © National Instruments Corporation...
  • Page 137: Clearing The Analog Input Circuitry

    2,048 Gain Clearing the Analog Input Circuitry The analog input circuitry can be cleared by writing to the A/D Clear Register. This operation leaves the analog input circuitry in the following state: © National Instruments Corporation 4-45 AT-MIO-16D User Manual...
  • Page 138: Programming Multiple A/D Conversions On A Single Input Channel

    To clear the analog input circuitry and the A/D FIFO, write 0 to the A/D Clear Register. Programming Multiple A/D Conversions on a Single Input Channel The AT-MIO-16D board can be programmed to execute a multiple A/D conversion sequence with the following options: •...
  • Page 139 Write 2 to the Am9513A Data Register to store the Counter 3 load value. e. Write FF44 to the Am9513A Command Register to load Counter 3. f. Write FFF3 to the Am9513A Command Register to step Counter 3 down to 1. © National Instruments Corporation 4-47 AT-MIO-16D User Manual...
  • Page 140 After you complete this programming sequence, Counter 4 is configured to count A/D conversion pulses generated by Counter 3 and turns off the data acquisition operation when Counter 4 decrements to zero. AT-MIO-16D User Manual 4-48 © National Instruments Corporation...
  • Page 141 Before you start the data acquisition operation, you must empty the A/D FIFO to clear out any old A/D conversion results. This emptying must be done after the counters are programmed in © National Instruments Corporation 4-49 AT-MIO-16D User Manual...
  • Page 142 To initiate the data acquisition operation through hardware, apply an active low pulse to the START TRIG* pin on the AT-MIO-16D I/O connector. See the Data Acquisition Timing Connections section in Chapter 2, Configuration and Installation, for START TRIG* signal specifications.
  • Page 143: External Timing Considerations For Multiple A/D Conversions

    In this case, the sample-interval counter starts counting when a rising edge signal is applied to the STOP TRIG input on the AT-MIO-16D I/O connector. You program the sample counter for active high level gating on Gate 4. The data acquisition operation is initiated by writing to the Start DAQ Register or by a pulse on the START TRIG* input.
  • Page 144 If the desired sample count is 65,536 or less, only Counter 4 needs to be used, making Counter 5 available for general-purpose timing applications. If the desired sample count is greater than 65,536, both Counters 4 and 5 must be used. AT-MIO-16D User Manual 4-52 © National Instruments Corporation...
  • Page 145 If the least significant 16 bits are all zeros, write FFFF. Write FF48 to the Am9513A Command Register to load Counter 4. Write 0 to the Am9513A Data Register to store 0 into the Load Register for Counter 4 reloading. © National Instruments Corporation 4-53 AT-MIO-16D User Manual...
  • Page 146 To initiate the data acquisition operation through hardware, apply an active low pulse to the START TRIG* pin on the AT-MIO-16D I/O connector. See the Data Acquisition Timing Connections section in Chapter 2, Configuration and Installation, for START TRIG* signal specifications.
  • Page 147: Controlling Multiple A/D Conversions With The Extconv* Signal

    OVERRUN bit in the Status Register is set. The maximum recommended single- channel data acquisition rate for the AT-MIO-16D is 100 ksamples/sec. Both the OVERFLOW and OVERRUN bits in the Status Register are cleared by writing to the A/D Clear Register.
  • Page 148 (sample rate is too high). An overrun condition has occurred if the OVERRUN bit in the Status Register is set. The maximum recommended single- channel data acquisition rate for the AT-MIO-16D is 100 ksamples/sec. AT-MIO-16D User Manual 4-56 ©...
  • Page 149: Programming Multiple A/D Conversions With Channel Scanning

    Programming Multiple A/D Conversions with Channel Scanning The data acquisition programming sequences described earlier program the AT-MIO-16D for multiple A/D conversion on a single input channel. You can also program the AT-MIO-16D for scanning analog input channels and switching gain settings during the data acquisition operation.
  • Page 150 Selects 10-kHz clock 8E25 – Selects 1-kHz clock 8F25 – Selects 100-Hz clock 8525 – Selects signal at SOURCE5 input as clock (counts the rising edge of the signal, 6 MHz maximum) AT-MIO-16D User Manual 4-58 © National Instruments Corporation...
  • Page 151 Write FF28 to the Am9513A Command Register to arm Counter 4. h. Clear the 16*/32 CNT bit in Command Register 1 to notify the hardware that only Counter 4 will be used as the sample counter. © National Instruments Corporation 4-59 AT-MIO-16D User Manual...
  • Page 152 Counter 3, and Counter 5 increments every time Counter 4 reaches zero. The data acquisition operation terminates when both Counters 4 and 5 reach zero and the last entry in the mux-gain memory is served. AT-MIO-16D User Manual 4-60 © National Instruments Corporation...
  • Page 153 To initiate the data acquisition operation through hardware, apply an active low pulse to the START TRIG* pin on the AT-MIO-16D I/O connector. See the Data Acquisition Timing Connections section in Chapter 2, Configuration and Installation, for START TRIG* signal specifications.
  • Page 154: Multiple A/D Conversions With Interval Channel Scanning (Pseudo-Simultaneous)

    Be sure that the scan-interval counter allows enough time for all conversions in a scan sequence to occur so that conversions are not missed. AT-MIO-16D User Manual 4-62 © National Instruments Corporation...
  • Page 155 Selects 10-kHz clock 8E25 – Selects 1-kHz clock 8F25 – Selects 100-Hz clock 8525 – Selects signal at SOURCE5 input as clock (counts the rising edge of the signal, 6 MHz maximum) © National Instruments Corporation 4-63 AT-MIO-16D User Manual...
  • Page 156 Write FF28 to the Am9513A Command Register to arm Counter 4. h. Clear the 16*/32 CNT bit in Command Register 1 to notify the hardware that only Counter 4 will be used as the sample counter. AT-MIO-16D User Manual 4-64 © National Instruments Corporation...
  • Page 157 Counter 3, and Counter 5 increments every time Counter 4 reaches zero. The data acquisition operation is terminated when both Counters 4 and 5 reach zero and the last entry in the mux-gain memory is served. © National Instruments Corporation 4-65 AT-MIO-16D User Manual...
  • Page 158 Write FF22 to the Am9513A Command Register to arm Counter 2. After you complete this programming sequence, Counter 2 is configured to assign a time interval to scan sequences once the trigger to enable A/D conversions is detected. AT-MIO-16D User Manual 4-66 © National Instruments Corporation...
  • Page 159 To initiate the data acquisition operation through hardware, apply an active low pulse to the START TRIG* pin on the AT-MIO-16D I/O connector. See the Data Acquisition Timing Connections section in Chapter 2, Configuration and Installation, for START TRIG* signal specifications.
  • Page 160: External Timing Considerations For Scanned Data Acquisition

    After a data acquisition operation is complete, if no errors occurred and the sample count was less than or equal to 10000 hex, then the AT-MIO-16D is left in the same state as it was at the beginning of the data acquisition operation. The counters do not need to be reprogrammed;...
  • Page 161: Resetting Counter 2

    6. Write FF44 to the Am9513A Command Register to load Counter 3. 7. Write FF44 to the Am9513A Command Register a second time to load Counter 3 again to guarantee that Counter 3 is not left in a terminal count state. © National Instruments Corporation 4-69 AT-MIO-16D User Manual...
  • Page 162: Resetting Counter 4

    Counter 5 is not left in a terminal count state. After resetting the counters, write 0 to the A/D Clear Register to clear all error conditions and to empty the A/D FIFO. AT-MIO-16D User Manual 4-70 © National Instruments Corporation...
  • Page 163: Programming The Analog Output Circuitry

    The voltage at the analog output circuitry output pins (pins DAC0 OUT and DAC1 OUT on the AT-MIO-16D MIO-16 I/O connector) is controlled by loading the DAC in the analog output channel with a 12-bit digital code. This DAC is loaded by writing the digital code to the DAC0 and DAC1 Registers.
  • Page 164: Programming The Mio-16 Digital I/O Circuitry

    The digital input circuitry is controlled and monitored using the MIO-16 Digital Input Register, the MIO-16 Digital Output Register, and the two bits DOUT0EN and DOUT1EN in Command Register 2. See the register bit descriptions earlier in this chapter for more information. AT-MIO-16D User Manual 4-72 © National Instruments Corporation...
  • Page 165: Programming The Am9513A Counter/Timer

    Channel section earlier in this chapter. RTSI Bus Trigger Line Programming Considerations The RTSI switch connects signals on the AT-MIO-16D to the seven RTSI bus trigger lines. The RTSI switch has seven pins labeled A<6..0> connected to AT-MIO-16D signals and seven pins labeled B<6..0>...
  • Page 166: At-Mio-16D Rtsi Signal Connection Considerations

    AT-MIO-16D RTSI Signal Connection Considerations The AT-MIO-16D board has a total of nine signals connected to the seven A-side pins of the RTSI switch. These same signals also appear at the AT-MIO-16D I/O connector. As shown in Table 4-8, two AT-MIO-16D signals are connected to pin A2, and two signals are connected to pin A4.
  • Page 167: Programming The Rtsi Switch

    1011, the signal connected to pin A5 appears at pin B4. This arrangement allows Trigger Line 4 to be driven by the AT-MIO-16D OUT1 signal. In this way, boards connected via the RTSI bus can send signals to each other over the RTSI bus trigger lines.
  • Page 168: Programming Dma Operations

    Register is used. The higher-order bits are ignored. Programming DMA Operations The AT-MIO-16D can be programmed so that the A/D FIFO generates a DMA request signal every time one or more A/D conversion values are stored in the A/D FIFO. There are two DMA modes–single-channel transfer and dual-channel transfer.
  • Page 169: Interrupt Programming

    Register 1 and the INTEN bit in Command Register 2. If these bits are set, if an interrupt occurs from the AT-MIO-16D board, and if the DMATC bit in the Status Register is set, then a DMA terminal count interrupt has occurred. Writing to the DMA TC INT Clear Register or to the A/D Clear Register clears this interrupt condition.
  • Page 170: Dio-24 Circuitry Programming Considerations

    (that is, Mode 0, Mode 1, or Mode 2). When the Control Word Flag is 0, bits 3 through 0 determine the bit set/reset format of Port C. AT-MIO-16D User Manual 4-78...
  • Page 171 Table 4-8 shows the control words for setting or resetting each bit in Port C. Notice that bit 7 of the control word is cleared when programming the set/reset option for the bits of Port C. © National Instruments Corporation 4-79...
  • Page 172: 82C55A Modes Of Operation

    Outputs are latched, but inputs are not latched. The 16 possible Mode 0 I/O configurations are shown in Table 4-9. Notice that bit 7 of the control word is set when programming the mode of operation for each port. AT-MIO-16D User Manual 4-80 © National Instruments Corporation...
  • Page 173: Mode 0 Programming Example

    /* Variable to store data read from a port */ Calculate register addresses. */ porta = BASE_ADDRESS + PORTAoffset; portb = BASE_ADDRESS + PORTBoffset; portc = BASE_ADDRESS + PORTCoffset; cnfg = BASE_ADDRESS + CNFGoffset; © National Instruments Corporation 4-81 AT-MIO-16D User Manual...
  • Page 174: Mode 1-Strobed Input

    Bits PC6 and PC7 of Port C can be used as extra input or output lines. Port C bits PC6 and PC7 1 = input 0 = output AT-MIO-16D User Manual 4-82 © National Instruments Corporation...
  • Page 175 At the digital I/O connector, Port C has the following pin assignments when in Mode 1 input. Notice that the status of STBA* and STBB* are not included in the Port C status word. © National Instruments Corporation 4-83 AT-MIO-16D User Manual...
  • Page 176: Mode 1 Input Programming Example

    The control word written to the DIO-24 CNFG Register to configure Port A for output in Mode 1 is shown as follows. Bits PC4 and PC5 of Port C can be used as extra input or output lines when Port A uses Mode 1 output. AT-MIO-16D User Manual 4-84 © National Instruments Corporation...
  • Page 177 Port B. INTRB Interrupt request status for Port B. When INTEB is high and OBFB* is high, this bit is high, indicating that a DIO interrupt request is asserted. © National Instruments Corporation 4-85 AT-MIO-16D User Manual...
  • Page 178: Mode 1 Output Programming Example

    /* Port B is an output in Mode 1.*/ while (!(inp(portc) & 0x02)); /* Wait until OBFB* is set, indicating that the data last written to Port B has been read.*/ outp(portb,0x34); /* Write the data to Port B. */ AT-MIO-16D User Manual 4-86 © National Instruments Corporation...
  • Page 179: Mode 2-Bidirectional Bus

    The following are the Port C status-word bit definitions for bidirectional data path (Port A only): OBFA* INTE1 IBFA INTE2 INTRA Name Description OBFA* Output buffer full. Low indicates that the CPU has written data to Port A. (continues) © National Instruments Corporation 4-87 AT-MIO-16D User Manual...
  • Page 180: Mode 2 Programming Example

    /* Variable to store data read from a port */ Calculate register addresses. */ porta = BASE_ADDRESS + PORTAoffset; portb = BASE_ADDRESS + PORTBoffset; portc = BASE_ADDRESS + PORTCoffset; cnfg = BASE_ADDRESS + CNFGoffset; AT-MIO-16D User Manual 4-88 © National Instruments Corporation...
  • Page 181: Single Bit Set/Reset Feature

    */ outp(cnfg,0xB0); /* Port A is an input in Mode 1. */ outp(cnfg,0x09); /* Set PC4 to enable interrupts from 82C55A. */ outp(cnfg,0x0C); /* Clear PC6 to enable interrupts. */ © National Instruments Corporation 4-89 AT-MIO-16D User Manual...
  • Page 182: Dio-24 Interrupt Handling

    /* Clear PC2 to enable interrupts. */ DIO-24 Interrupt Handling A jumper setting on the AT-MIO-16D selects the signal that is used for the DIO-24 interrupt enable signal. If jumper W14 is set to N/C, interrupts are disabled. Jumper W14 can be used to select PC2, PC4, or PC6 as the active low interrupt enable signal.
  • Page 183: Table 4-10. Dio-24 Interrupt Enable Signals For All Mode Combinations

    DIO-24 circuitry. An external signal can be used to interrupt the AT-MIO-16D when Port A or Port B is in Mode 0. Select PC2, PC4, or PC6 as the interrupt enable bit and clear the selected bit to enable interrupts.
  • Page 184: Calibration Procedures

    This chapter discusses the calibration procedures for the AT-MIO-16D analog input and analog output circuitry. The AT-MIO-16D is calibrated at the factory before shipment. To maintain the 12-bit accuracy of the AT-MIO-16D analog input and analog output circuitry, recalibration at six-month intervals is recommended.
  • Page 186: Analog Input Calibration

    -10 to +10 V -10 V +9.99512 V 4.88 mV 2.44 mV -5 to +5 V -5 V +4.99756 V 2.44 mV 1.22 mV 0 to 10 V +9.99756 V 2.44 mV 1.22 mV © National Instruments Corporation AT-MIO-16D User Manual...
  • Page 187: Board Configuration

    (-10 to +10 V and -5 to +5 V), and one for the unipolar input configuration (0 to +10 V). The calibration procedures presented here assume that your AT-MIO-16D board is configured for DIFF input. If necessary, reconfigure your board for DIFF input before using the following calibration procedures.
  • Page 188: Unipolar Input Calibration Procedure

    1. Adjust the amplifier input offset. To adjust the amplifier input offset, follow these steps: a. Connect both ACH0 (pin 3 on the I/O connector) and ACH8 (pin 4) to AI SENSE (pin 19). © National Instruments Corporation AT-MIO-16D User Manual...
  • Page 189: Analog Output Calibration

    D/A setting. To correct this offset gain error, set the D/A to negative full scale and adjust a trimpot until the output voltage is the negative full-scale value ± LSB. AT-MIO-16D User Manual © National Instruments Corporation...
  • Page 190: Board Configuration

    For analog output channel 0: a. Connect the voltmeter between DAC0 OUT (pin 20 on the I/O connector) and AOGND (pin 23). b. Set the analog output channel to -10 V by writing -2,048 to the DAC. © National Instruments Corporation AT-MIO-16D User Manual...
  • Page 191: Unipolar Output Calibration Procedure

    Adjust the analog output offset by measuring the output voltage generated with the DAC set at zero. This output voltage should be V -fs ± 1 /2 LSB. For unipolar output, V -fs = 0 V, and 1 /2 LSB = 1.22 mV. AT-MIO-16D User Manual © National Instruments Corporation...
  • Page 192 Set the analog output channel to +9.99756 V by writing 4,095 to the DAC. c. Adjust trimpot R4 until the output voltage read is +9.99756 V ±1.22 mV, that is, between 9.99634 and 9.99878 V. © National Instruments Corporation AT-MIO-16D User Manual...
  • Page 193: Appendix A Specifications

    Appendix A Specifications This appendix lists the specifications for the AT-MIO-16D. These are typical at 25° C unless otherwise stated. The operating temperature range is 0° to 70° C. MIO-16 Circuitry Specifications Analog Input Number of input channels 16 single-ended, 8 differential...
  • Page 194: Explanation Of Analog Input Specifications

    ±1 LSB; thus, the ADC would have a relative accuracy of that amount. National Instruments tests its boards to ensure that they meet all three linearity specifications defined in this appendix; specifications for integral nonlinearity are included primarily to maintain compatibility with a convention of specifications used by other board manufacturers.
  • Page 195: Analog Data Acquisition Rates

    (0.01%) is added to the conversion time of the ADC. The sample-and-hold amplifier in the AT-MIO-16D takes 1 µsec typical and 1.5 µsec maximum to settle to 0.01% for a 10 V step. The data acquisition rates shown in the preceding table are the best rates for single-channel acquisition.
  • Page 196: Analog Output

    A specification of ±1 LSB differential nonlinearity ensures that the code width is always greater than 0 LSBs (guaranteeing monotonicity) and is always less than 2 LSBs. AT-MIO-16D User Manual © National Instruments Corporation...
  • Page 197: Digital I/O (Mio-16 I/O Connector Only

    -0.5 to +7.0 V with respect to GND Input Signal Specifications Minimum Maximum Input logic–high voltage 2.0 V 5.25 V Input logic–low voltage 0.0 V 0.8 V -10.0 µA 10.0 µA Input current (0 < I in < 5 V) © National Instruments Corporation AT-MIO-16D User Manual...
  • Page 198: Output Signal Specifications

    100-pin male, separable into two 50-pin female ribbon-cable connectors Operating Environment Component temperature 0° to 70° C Relative humidity 5% to 90% noncondensing Storage Environment Temperature -55° to 150° C Relative humidity 5% to 90% noncondensing AT-MIO-16D User Manual © National Instruments Corporation...
  • Page 199: Appendix Bmio-16 I/O Connector

    ADIO2 BDIO2 ADIO3 BDIO3 DIG GND +5 V +5 V SCANCLK EXTSTROBE* START TRIG* STOP TRIG EXTCONV* SOURCE1 GATE1 OUT1 SOURCE2 GATE2 OUT2 SOURCE5 GATE5 OUT5 FOUT Figure B-1. AT-MIO-16D MIO-16 I/O Connector © National Instruments Corporation AT-MIO-16D User Manual...
  • Page 200 EXTSTROBE* DIGGND External Strobe – Writing to the EXTSTROBE* Register results in a minimum 200 nsec low pulse on this pin. AT-MIO-16D User Manual © National Instruments Corporation...
  • Page 201 GATE5 – This pin is from the Am9513A Counter 5 signal. OUT5 DIGGND OUT5 – This pin is from the Am9513A Counter 5 signal. FOUT DIGGND Frequency Output – This pin is from the Am9513A FOUT signal. © National Instruments Corporation AT-MIO-16D User Manual...
  • Page 202: Appendix Cdio-24 I/O Connector

    Appendix C DIO-24 I/O Connector This appendix describes the pinout and signal names for the DIO-24 50-pin I/O connector of the AT-MIO-16D. +5 V Figure C-1. AT-MIO-16D DIO-24 I/O Connector © National Instruments Corporation AT-MIO-16D User Manual...
  • Page 203 39, 41, 43, PA7 is the MSB, PA0 the LSB. 45, 47 +5 V DIGGND This pin provides +5 VDC. All even- DIGGND These signals are connected to the PC ground numbered signal. pins AT-MIO-16D User Manual © National Instruments Corporation...
  • Page 204: Appendix Dat-Mio-16D I/O Connector

    Appendix D AT-MIO-16D I/O Connector This appendix describes the pinout and signal names for the AT-MIO-16D 100-pin I/O connector. AI GND AI GND ACH0 ACH8 ACH1 ACH9 ACH2 ACH10 ACH3 ACH11 ACH4 ACH12 ACH5 ACH13 ACH6 ACH14 ACH7 ACH15 AI SENSE...
  • Page 205: Appendix Eamd Am9513A Data Sheet

    AMD Am9513A Data Sheet This appendix contains the manufacturer data sheet for the Am9513A System Controller integrated circuit (Advanced Micro Devices, Inc.). This device is used on the AT-MIO-16D. Copyright © Advanced Micro Devices, Inc. 1989. Reprinted with permission of copyright owner.
  • Page 245: Oki Msm82C55A Data Sheet

    Oki MSM82C55A Data Sheet This appendix contains the manufacturer data sheet for the MSM82C55A CMOS Programmable Peripheral Interface (Oki Semiconductor). This device is used on the AT-MIO-16D. Copyright © Oki Semiconductor. 1990. Reprinted with permission of copyright owner. All rights reserved.
  • Page 262: Customer Communication

    Filling out a copy of the Technical Support Form before contacting National Instruments helps us help you better and faster. National Instruments provides comprehensive technical assistance around the world. In the U.S. and Canada, applications engineers are available Monday through Friday from 8:00 a.m. to 6:00 p.m.
  • Page 263 National Instruments for technical support helps our applications engineers answer your questions more efficiently. If you are using any National Instruments hardware or software products related to this problem, include the configuration forms from their user manuals. Include additional pages if necessary.
  • Page 264 Completing this form accurately before contacting National Instruments for technical support helps our applications engineers answer your questions more efficiently.
  • Page 265 Documentation Comment Form National Instruments encourages you to comment on the documentation supplied with our products. This information helps us provide quality products to meet your needs. Title: AT-MIO-16D User Manual Edition Date: March 1995 Part Number: 320489-01 Please comment on the completeness, clarity, and organization of the manual.
  • Page 266: Index

    (DIO-24), 4-80 to 4-89 interrupt programming examples, 4-89 to 4-90 Mode 0 basic I/O, 4-80 to 4-81 possible configurations, 4-81 programming example, 4-81 to 4-82 Mode 1Ðstrobed input, 4-82 to 4-84 pin assignments, 4-84 © National Instruments Corporation Index-1 AT-MIO-16D User Manual...
  • Page 267 Am9513A Command Register, 4-28 Am9513A Data Register, 4-27 Am9513A Status Register, 4-29 register map, 4-2 Am9513A System Timing Controller alarm registers and comparators, E-11 block diagram, E-2 bus transfer switching waveforms, E-38 AT-MIO-16D User Manual Index-2 © National Instruments Corporation...
  • Page 268 E-12 mode waveforms, E-15 to E-26 ordering information, E-3 to E-5 output control, E-26 to E-28 output control logic, E-27 pin description, E-6 prefetch circuit, E-10 programming, 4-73 register access, E-9 © National Instruments Corporation Index-3 AT-MIO-16D User Manual...
  • Page 269 3-6 to 3-7 analog input configuration analog I/O jumper settings, 2-8 to 2-9 DIFF (differential) input, 2-10 to 2-11 factory settings, 2-8 to 2-9 input mode, 2-10 input polarity and range, 2-12 to 2-14 AT-MIO-16D User Manual Index-4 © National Instruments Corporation...
  • Page 270 RTSI bus clock selection, 2-18 to 2-20 Analog Output Register Group DAC0 Register, 4-17 DAC1 Register, 4-18 INT2Clear Register, 4-19 register map, 4-1 analog output signal connections, 2-33 to 2-34 analog output specifications explanation of, A-4 © National Instruments Corporation Index-5 AT-MIO-16D User Manual...
  • Page 271 Index list of, A-4 AO GND signal, 2-23, 2-33 to 2-34 applying a trigger. See trigger, applying. AT-MIO-16D. See also specifications; theory of operation. block diagram, 3-1 definition of, v description of, 1-1 to 1-3 illustration of, 1-2 interface with other AT series boards, 1-2 to 1-3...
  • Page 272 OBFB*, 4-85 OUT<5..1>, 4-29 OUT2INT, 4-6 OVERFLOW, 4-7 OVERRUN, 4-7 RSI, 4-34 SCANDIV, 4-5 SCANEN, 4-5 SCN2, 4-10 TCINTEN, 4-4 board configuration. See calibration procedures; configuration. cables and cabling custom cables, 1-6 © National Instruments Corporation Index-7 AT-MIO-16D User Manual...
  • Page 273 DIO-24 cabling, 2-51 to 2-52 field wiring, 2-50 MIO-16 cabling, 2-50 to 2-51 default settings for National Instrument products, 2-3 DMA channel selection, 2-5 to 2-7 field wiring considerations, 2-50 interrupt selection, 2-7 to 2-8 AT-MIO-16D User Manual Index-8 © National Instruments Corporation...
  • Page 274 3-5 definition of, 3-7 maximum recommended data acquisition rates, 3-10 multiple-channel (scanned) data acquisition, 3-9 rates of data acquisition, 3-9 sample counter, 3-8 sample-interval timer, 3-8 © National Instruments Corporation Index-9 AT-MIO-16D User Manual...
  • Page 275 82C55A modes of operation, 4-80 to 4-89 interrupt programming examples, 4-89 to 4-90 Mode 0 basic I/O, 4-80 to 4-81 possible configurations, 4-81 programming example, 4-81 to 4-82 Mode 1Ðstrobed input, 4-82 to 4-84 pin assignments, 4-84 AT-MIO-16D User Manual Index-10 © National Instruments Corporation...
  • Page 276 See data acquisition, programming. equipment, optional, 1-5 to 1-7 © National Instruments Corporation Index-11 AT-MIO-16D User Manual...
  • Page 277 See theory of operation. fuse +5 V power supply, 2-23, 2-36, 2-44, 3-18, A-6, B-2 GATE, OUT, and SOURCE timing signals, 2-38 to 2-42, 3-14 to 3-15, 3-16 GATE1 signal, 2-24 AT-MIO-16D User Manual Index-12 © National Instruments Corporation...
  • Page 278 2-14 jumper settings, 2-13 to 2-14 input signal specifications, DIO-24 circuitry, A-5 installation. See also configuration. hardware installation, 2-20 unpacking the AT-MIO-16, 1-5 to 1-7 instrumentation amplifier, 2-26, 3-6 INT2Clear Register, 4-19 © National Instruments Corporation Index-13 AT-MIO-16D User Manual...
  • Page 279 RTSI bus clock selection, 2-18 to 2-20 straight binary mode, 2-17 switch settings with base I/O address and address space, 2-5 two's complement mode, 2-17 unipolar output selection, 2-18 LabWindows software, 1-4 AT-MIO-16D User Manual Index-14 © National Instruments Corporation...
  • Page 280 4-56 to 4-57 overflow and overrun conditions, 4-55 pretriggering with STOP TRIG signal applying a trigger, 4-54 clearing A/D circuitry, 4-54 sample counter, programming, 4-52 to 4-54 sample-interval counter, programming, 4-52 © National Instruments Corporation Index-15 AT-MIO-16D User Manual...
  • Page 281 2-50 system noise, A-3 nonreferenced single-ended (NRSE) input configuration, 2-12 definition of, 2-10 single-ended connections for grounded signal sources, 2-31 to 2-32 NRSE input. See nonreferenced single-ended (NRSE) input. AT-MIO-16D User Manual Index-16 © National Instruments Corporation...
  • Page 282 Mode 1Ðstrobed input, 4-84 Mode 1Ðstrobed output, 4-86 Mode 2Ðbidirectional bus, 4-88 Am9513A System Timing Controller, E-6 AT-MIO-16D I/O connector, 2-21, D-1 DIO-24 I/O connector, 2-43, C-1 MIO-16 I/O connector, 2-22, B-1 polarity bipolar input calibration procedure, 5-4 to 5-5...
  • Page 283 A/D FIFO output binary formats, 4-44 to 4-45 clearing analog input circuitry, 4-46 to 4-46 initiating A/D conversions, 4-43 reading A/D conversion results, 4-44 selecting analog input channel and gain, 4-43 straight binary mode A/D conversion values, 4-45 AT-MIO-16D User Manual Index-18 © National Instruments Corporation...
  • Page 284 STOP TRIG signal, 4-51 to 4-55 applying a trigger, 4-54 clearing A/D circuitry, 4-54 sample counter, programming, 4-52 to 4-54 sample-interval counter, programming, 4-52 selecting analog input channel and gain, 4-51 servicing data acquisition operation, 4-55 © National Instruments Corporation Index-19 AT-MIO-16D User Manual...
  • Page 285 Mux-Gain Register, 4-22 to 4-23 Analog Output Register Group, 4-16 to 4-19 DAC0 Register, 4-17 DAC1 Register, 4-18 INT2Clear Register, 4-19 Configuration and Status Register Group, 4-3 to 4-10 Command Register 1, 4-4 to 4-5 AT-MIO-16D User Manual Index-20 © National Instruments Corporation...
  • Page 286 4-73 to 4-76 procedure for, 4-76 RTSI switch control pattern, 4-75 signal connections, 4-74 RTSI Switch Register Group, 4-33 to 4-35 register map, 4-2 RTSI Switch Shift Register, 4-34 RTSI Switch Strobe Register, 4-35 © National Instruments Corporation Index-21 AT-MIO-16D User Manual...
  • Page 287 2-27 to 2-28 grounded signal sources, 2-28 to 2-29 floating signals, 2-26 recommended configurations for ground-referenced and floating signal sources, 2-27 single-ended connections floating signal (RSE) sources, 2-30 to 2-31 general considerations, 2-30 AT-MIO-16D User Manual Index-22 © National Instruments Corporation...
  • Page 288 Index grounded signal (NRSE) sources, 2-31 to 2-32 MIO-16 signal descriptions, 2-23 to 2-24 pin assignments AT-MIO-16D I/O connector, 2-21, D-1 DIO-24 I/O connector, 2-43, C-1 MIO-16 I/O connector, 2-22, B-1 power connections, MIO-16 I/O connector, 2-36 RTSI switch, 4-74...
  • Page 289 3-6 mode selection, 3-6 analog output circuitry, 3-10 to 3-11 block diagram, 3-10 data coding, 3-11 output range, 3-11 AT-MIO-16D block diagram, 3-1 data acquisition timing circuitry, 3-7 to 3-10 AT-MIO-16D User Manual Index-24 © National Instruments Corporation...
  • Page 290 Mode 2 bidirectional timing, 2-49 signals, 2-45 to 2-46 transfer rate specifications, DIO-24 circuitry, A-6 trigger, applying continuous channel scanning (round robin), 4-61 interval channel scanning (pseudo-simultaneous), 4-67 pretriggering multiple A/D conversions, 4-54 © National Instruments Corporation Index-25 AT-MIO-16D User Manual...
  • Page 291 A/D conversion values, 4-45 factory settings, 2-17 unipolar input calibration procedure, 5-5 to 5-6 unipolar output analog output circuitry, 3-11 calibration procedure, 5-8 configuration, 2-18 unpacking the AT-MIO-16, 1-7 AT-MIO-16D User Manual Index-26 © National Instruments Corporation...

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