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National Instruments PC-DIO-96/PnP User Manual

National Instruments PC-DIO-96/PnP User Manual

Digital i/o board for isa
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PC-DIO-96/PnP
User Manual
Digital I/O Board for ISA
September 1996 Edition
Part Number 320289C-01
© Copyright 1990, 1996 National Instruments Corporation. All Rights Reserved.

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Summary of Contents for National Instruments PC-DIO-96/PnP

  • Page 1 PC-DIO-96/PnP User Manual Digital I/O Board for ISA September 1996 Edition Part Number 320289C-01 © Copyright 1990, 1996 National Instruments Corporation. All Rights Reserved.
  • Page 2 Norway 32 84 84 00, Singapore 2265886, Spain 91 640 0085, Sweden 08 730 49 70, Switzerland 056 200 51 51, Taiwan 02 377 1200, U.K. 01635 523545 National Instruments Corporate Headquarters 6504 Bridge Point Parkway Austin, TX 78730-5039 Tel: (512) 794-0100...
  • Page 3 Important Information Warranty The PC-DIO-96/PnP is warranted against defects in materials and workmanship for a period of one year from the date of shipment, as evidenced by receipts or other documentation. National Instruments will, at its option, repair or replace equipment that proves to be defective during the warranty period.

  • Page 4: Table Of Contents

    Related Documentation ....................xiii Customer Communication .................... xiii Chapter 1 Introduction About the PC-DIO-96/PnP ................... 1-1 What You Need to Get Started ..................1-2 Software Programming Choices ................... 1-3 LabVIEW and LabWindows/CVI Application Software ......1-3 NI-DAQ Driver Software ................1-3 Register-Level Programming .................
  • Page 5 Digital I/O Connector ....................4-4 Appendix A Specifications Appendix B OKI 82C55A Data Sheet Appendix C OKI 82C53 Data Sheet Appendix D Register-Level Programming Appendix E Using Your PC-DIO-96 (Non-PnP) Board Appendix F Customer Communication PC-DIO-96/PnP User Manual © National Instruments Corporation...
  • Page 6 Digital I/O Connector Pin Assignments ..........3-2 Figure 3-2. Cable Assembly Connector Pin Assignments for Pins 1 through 50 of the PC-DIO-96/PnP I/O Connector ..........3-5 Figure 3-3. Cable Assembly Connector Pin Assignments for Pins 51 through 100 of the PC-DIO-96/PnP I/O Connector ..........3-6 Figure 3-4.
  • Page 7 Tables Table 3-1. Port C Signal Assignments ..............3-4 Table 3-2. Timing Signal Descriptions ..............3-13 Table D-1. PC-DIO-96/PnP Address Map ..............D-2 Table D-2. Port C Set/Reset Control Words ............D-6 Table D-3. Mode 0 I/O Configurations ..............D-12 Table E-1. Comparison of Characteristics ..............E-1 Table E-2.

  • Page 8: About This Manual

    This manual describes the mechanical and electrical aspects of the PC-DIO-96/PnP and contains information concerning its operation and programming. The PC-DIO-96PnP is a member of the National Instruments PC Series of I/O channel expansion boards for ISA computers. These boards are designed for high-performance data acquisition and control for applications in laboratory testing, production testing, and industrial process monitoring and control.

  • Page 9: Conventions Used In This Manual

    Semiconductor). This circuit is used on the PC-DIO-96/PnP board. • Appendix D, Register-Level Programming, describes in detail the address and function of each of the PC-DIO-96/PnP control and status registers. This appendix also includes important information about register-level programming the PC-DIO-96/PnP along with program examples written in C and assembly language.
  • Page 10 NI-DAQ refers to the NI-DAQ software for PC compatibles unless otherwise noted. PC-DIO-96/PnP PC-DIO-96/PnP refers to both the Plug and Play and non-Plug and Play compatible versions of the board. PC-DIO-96PnP PC-DIO-96PnP refers to the Plug and Play version of the PC-DIO-96/PnP.

  • Page 11: National Instruments Documentation

    About This Manual National Instruments Documentation The PC-DIO-96/PnP User Manual is one piece of the documentation set for your data acquisition (DAQ) system. You could have any of several types of manuals, depending on the hardware and software in your system. Use the different types of manuals you have as follows: •...

  • Page 12: Related Documentation

    Plug and Play ISA Specification Customer Communication National Instruments wants to receive your comments on our products and manuals. We are interested in the applications you develop with our products, and we want to help if you have problems with them. To make it easy for you to contact us, this manual contains comment and configuration forms for you to complete.

  • Page 13: Introduction

    Appendix E, Using Your PC-DIO-96 (Non-PnP) Board, for the differences between the PnP version and the non-PnP version. You can use the PC-DIO-96/PnP in a wide range of digital I/O applications. With the PC-DIO-96/PnP, you can interface any PC to any of the following: •...

  • Page 14: What You Need To Get Started

    DIO-23F or MIO Series board with appropriate connections (for example, SC-205X and cables). With the PC-DIO-96/PnP, a PC can serve as a digital I/O system controller for laboratory testing, production testing, and industrial process monitoring and control.

  • Page 15: Software Programming Choices

    Chapter 1 Introduction Software Programming Choices There are several options to choose from when programming your National Instruments DAQ and SCXI hardware. You can use LabVIEW, LabWindows/CVI, NI-DAQ, or register-level programming. NI-DAQ version 4.6.1 or earlier supports LabWindows for DOS.

  • Page 16: Figure 1-1. The Relationship Between The Programming Environment, Ni-Daq, And Your Hardware

    An example of a low- level function is writing directly to registers on the DAQ device. NI-DAQ does not sacrifice the performance of National Instruments DAQ devices because it lets multiple devices operate at their peak performance.

  • Page 17: Register-Level Programming

    You can interface the PC-DIO-96/PnP to a wide range of printers, plotters, test instruments, I/O racks and modules, screw terminal panels, and almost any device with a parallel interface. The PC-DIO-96/PnP digital I/O connector is a standard, 100-pin header connector.
  • Page 18 Opto 22 and Gordos). The CB-100 cable termination accessory is available from National Instruments for use with the PC-DIO-96/PnP board. This kit includes two 50-conductor, flat-ribbon cables and a connector block. You can attach signal input and output wires to screw terminals on the connector block and therefore connect signals to the PC-DIO-96/PnP I/O connector.

  • Page 19: Unpacking

    • T&B/Ansley Corporation (part number 171-50) Unpacking Your PC-DIO-96/PnP board is shipped in an antistatic package to prevent electrostatic damage to the board. Electrostatic discharge can damage several components on the board. To avoid such damage in handling the board, take the following precautions: •...

  • Page 20: Installation And Configuration

    You should install your driver software before installing your hardware. Refer to your NI-DAQ release notes for software installation instructions. 1 Serial Number 2 W1 3 F1 Figure 2-1. PC-DIO-96PnP Parts Locator Diagram © National Instruments Corporation PC-DIO-96/PnP User Manual...
  • Page 21 5. Screw the mounting bracket of the PC-DIO-96PnP board to the back panel rail of the computer. 6. Visually verify your installation. 7. Replace the cover. 8. Plug in and turn on your computer. Your PC-DIO-96PnP is now installed. PC-DIO-96/PnP User Manual © National Instruments Corporation...

  • Page 22: Hardware Configuration

    The PC-DIO-96PnP can use interrupt channels 3, 4, 5, 6, 7, and 9. Non-Plug and Play To configure the non-Plug and Play PC-DIO-96 board, refer to Appendix E, Using Your PC-DIO-96 (Non-PnP) Board. © National Instruments Corporation PC-DIO-96/PnP User Manual...

  • Page 23: Signal Connections

    PC-DIO-96/PnP I/O connector. Warning: Connections that exceed any of the maximum ratings of input or output signals on the PC-DIO-96/PnP can damage the board and the computer. The description of each signal in this section includes information about maximum input ratings.

  • Page 24: Figure 3-1. Digital I/O Connector Pin Assignments

    BPA5 DPA5 APA4 CPA4 BPA4 DPA4 APA3 CPA3 BPA3 DPA3 APA2 CPA2 BPA2 DPA2 APA1 CPA1 BPA1 DPA1 APA0 CPA0 BPA0 DPA0 +5 V +5 V Figure 3-1. Digital I/O Connector Pin Assignments PC-DIO-96/PnP User Manual © National Instruments Corporation...

  • Page 25: I/O Connector Signal Connection Descriptions

    +5 VDC supply. 50, 100 Ground—These pins are connected to the computer’s ground signal. Note: Pins 49 and 99 are connected to the +5 V PC power supply via a 1 A self-resetting fuse. © National Instruments Corporation PC-DIO-96/PnP User Manual...

  • Page 26: Port C Pin Assignments

    1 through 50 and the other is connected to pins 51 through 100 of the PC-DIO-96/PnP I/O connector. The cable with the label on it is connected to pins 1 through 50. Figures 3-2 and 3-3 show the pin assignments for the 50-pin connectors on the cable assembly.

  • Page 27: Figure 3-2. Cable Assembly Connector Pin Assignments For Pins 1 Through 50

    43 44 APA2 BPA2 45 46 BPA1 APA1 47 48 BPA0 APA0 49 50 +5 V Figure 3-2. Cable Assembly Connector Pin Assignments for Pins 1 through 50 of the PC-DIO-96/PnP I/O Connector © National Instruments Corporation PC-DIO-96/PnP User Manual...

  • Page 28: Figure 3-3. Cable Assembly Connector Pin Assignments For Pins 51 Through 100

    43 44 CPA2 DPA2 45 46 DPA1 CPA1 47 48 DPA0 CPA0 49 50 +5 V Figure 3-3. Cable Assembly Connector Pin Assignments for Pins 51 through 100 of the PC-DIO-96/PnP I/O Connector PC-DIO-96/PnP User Manual © National Instruments Corporation...

  • Page 29: Digital I/O Signal Connections

    Output current 2.5 mA min — at V = 0.5 V Output current 2.5 mA min — at V = 2.7 V Figure 3-4 depicts signal connections for three typical digital I/O applications. © National Instruments Corporation PC-DIO-96/PnP User Manual...

  • Page 30: Figure 3-4. Digital I/O Connections

    TTL signals and sensing external device states such as the state of the switch in Figure 3-4. Digital output applications include sending TTL signals and driving external devices such as the LED shown in Figure 3-4. PC-DIO-96/PnP User Manual © National Instruments Corporation...

  • Page 31: Power Connections

    Power rating Warning: Under no circumstances should these +5 V power pins be connected directly to ground or to any other voltage source on the PC-DIO-96/PnP or any other device. Doing so may damage the PC-DIO-96/PnP and the PC. National Instruments is liable for damage resulting from such a connection.

  • Page 32: Figure 3-5. Dio Channel Configured For High Dio Power-Up State With External Load

    The 7.1 kΩ resistor reduces the amount of a logic high source current by 0.4 mA with a 2.8 V output. PC-DIO-96/PnP User Manual 3-10 © National Instruments Corporation...

  • Page 33: Low Dio Power-Up State

    TTL high level of 2.8 VDC. PC-DIO-96/PnP +5 V 82C55 Digital I/O Line 100 kΩ Figure 3-6. DIO Channel Configured for Low DIO Power-up State with External Load © National Instruments Corporation 3-11 PC-DIO-96/PnP User Manual...

  • Page 34: Timing Specifications

    0.8 mA with a 0.4 V output. Timing Specifications This section lists the timing specifications for handshaking with the PC-DIO-96/PnP. The handshaking lines STB* and IBF synchronize input transfers. The handshaking lines OBF* and ACK* synchronize output transfers.

  • Page 35: Table 3-2. Timing Signal Descriptions

    Acknowledge Input—A low signal on this handshaking line indicates that the data written to the port has been accepted. This signal is a response from the external device indicating that it has received the data from the PC-DIO-96/PnP. OBF* Output Output Buffer Full—A low signal on this handshaking line...

  • Page 36: Mode 1 Input Timing

    STB* = 1 to INTR = 1 – Data after STB* = 1 – RD* = 0 to INTR = 0 – RD* = 1 to IBF = 0 – All timing values are in nanoseconds. PC-DIO-96/PnP User Manual 3-14 © National Instruments Corporation...

  • Page 37: Mode 1 Output Timing

    WR* = 1 to OBF* = 0 – ACK* = 0 to OBF* = 1 – ACK* pulse width – ACK* = 1 to INTR = 1 – All timing values are in nanoseconds. © National Instruments Corporation 3-15 PC-DIO-96/PnP User Manual...

  • Page 38: Mode 2 Bidirectional Timing

    ACK* = 0 to OBF = 1 – ACK* pulse width – ACK* = 0 to output – ACK* = 1 to output float RD* = 1 to IBF = 0 – All timing values are in nanoseconds. PC-DIO-96/PnP User Manual 3-16 © National Instruments Corporation...

  • Page 39: Theory Of Operation

    Plug and Play 82C55A PPI Port C PC I/O Interrupt Port A Address Circuitry Port B 82C55A PPI Port C Interrupt 82C53 Timer Control Circuitry +5 VDC 1 A Fuse Figure 4-1. PC-DIO-96PnP Block Diagram © National Instruments Corporation PC-DIO-96/PnP User Manual...

  • Page 40: Data Transceivers

    The interrupt channel used by the PC-DIO-96PnP is selected by the Plug and Play circuitry. Two software-controlled registers determine which devices, if any, generate interrupts. Each of the four 82C55A devices has two interrupt lines, PC3 and PC0, connected to the interrupt circuitry. PC-DIO-96/PnP User Manual © National Instruments Corporation...

  • Page 41: 82C55A Programmable Peripheral Interface

    PC-DIO-96PnP uses two of the counters to generate interrupt requests; the third counter is not used and is not accessible to the user. Refer to Appendix D, Register-Level Programming, or to Appendix C, OKI 82C53 Data Sheet, for more detailed information. © National Instruments Corporation PC-DIO-96/PnP User Manual...

  • Page 42: Digital I/O Connector

    Pins 50 and 100 are connected to ground. See the Optional Equipment section in Chapter 1, Introduction, as well as Chapter 2, Installation and Configuration, and Chapter 3, Signal Connections, for additional information. PC-DIO-96/PnP User Manual © National Instruments Corporation...

  • Page 43: Appendix A Specifications

    Appendix Specifications This appendix lists the specifications of the PC-DIO-96/PnP. These specifications are typical at 25° C, unless otherwise stated. The operating temperature range is 0° to 70° C. Digital I/O Number of channels ......96 I/O Compatibility ........TTL Absolute max voltage rating ....-0.5 to +5.5 V with respect to Handshaking ........Requires 1 port...
  • Page 44 The upper limit on maximum transfer rates is constrained primarily by the software and operating system rather than hardware interface for non-DMA boards such as the PC-DIO-96/PnP. The maximum transfer rate listed here was obtained using inline assembly C code on a 90 MHz Pentium-based computer.
  • Page 45 This appendix contains the manufacturer data sheet for the OKI 82C55A* (OKI Semiconductor) CMOS programmable peripheral interface. This interface is used on the PC-DIO-96/PnP board. Copyright © OKI Semiconductor 1993. Reprinted with permission of copyright owner. All rights reserved. OKI Semiconductor Data Book Microprocessor, Seventh Edition, March 1993.
  • Page 62 (OKI Semiconductor). This circuit is used on the PC-DIO-96/PnP board. Copyright © OKI Semiconductor 1995. Reprinted with permission of copyright owner. All rights reserved. OKI Semiconductor Data Book Microprocessor, Eighth Edition, January 1995. © National Instruments Corporation PC-DIO-96/PnP User Manual...
  • Page 74 Note: You can configure your PC-DIO-96/PnP board to use base addresses in the range of 100 to 3E0 hex. Your PC-DIO-96/PnP board occupies 16 bytes of address space and must be located on a 16-byte boundary. Therefore, valid addresses include 100, 110, 120..., 3E0 hex. The base I/O address is software configured and does not require you to manually change any settings on the board.

  • Page 75: Pc-Dio-96/Pnp Address Map

    The configuration bits for these registers are defined in the Register Description for the Interrupt Control Registers section later in this appendix. Register Map The following table lists the address map for the PC-DIO-96/PnP. Table D-1. PC-DIO-96/PnP Address Map Register Name...

  • Page 76: Table

    Appendix D Register-Level Programming Table D-1. PC-DIO-96/PnP Address Map (Continued) Register Name Offset Address Size Type (Hex) PPI C PORTA Register 8-bit Read-and-write PORTB Register 8-bit Read-and-write PORTC Register 8-bit Read-and-write CNFG Register 8-bit Write-only PPI D PORTA Register 8-bit...
  • Page 77 Appendix D Register-Level Programming Register Descriptions The register descriptions for the devices on the PC-DIO-96/PnP, including the 82C55A, the 82C53, and each of the interrupt control registers, are given on the pages that follow. Register Description for the 82C55A Figure D-1 shows the two control word formats used to completely program the 82C55A.

  • Page 78: Figure D-1. Control Word Formats For The 82C55A

    Figure D-1. Control Word Formats for the 82C55A Warning: During programming, note that each time a port is configured, output ports A and C are reset to 0, and output port B is undefined. © National Instruments Corporation PC-DIO-96/PnP User Manual...

  • Page 79: Port C Set/Reset Control Words

    Bits 5 and 4 select the mode by which the count data is written to and read from the selected counter. Bits 3, 2, and 1 select the mode for the selected counter. Bit 0 selects whether the counter counts in binary or BCD format. PC-DIO-96/PnP User Manual © National Instruments Corporation...

  • Page 80: Figure D-2. Control Word Format For The 82C53

    Figure D-2. Control Word Format for the 82C53 Register Description for the Interrupt Control Registers There are two interrupt control registers on the PC-DIO-96/PnP. One of these registers has individual enable bits for the two interrupt lines from each of the 82C55A devices. The other register has a master interrupt enable bit and two bits for the timed interrupt circuitry.
  • Page 81 PPI B sends an interrupt, INTRB, to the host computer. If this bit is cleared, PPI B does not send the interrupt INTRB to the host computer, regardless of the setting of INTEN. PC-DIO-96/PnP User Manual © National Instruments Corporation...
  • Page 82 PPI A sends an interrupt, INTRA, to the host computer. If this bit is cleared, PPI A does not send the interrupt INTRA to the host computer, regardless of the setting of INTEN. © National Instruments Corporation PC-DIO-96/PnP User Manual...
  • Page 83 Don’t Care Bit. INTEN Global Interrupt Enable Bit—If this bit is set, the PC-DIO-96/PnP can interrupt the host computer. If this bit is cleared, the PnP version of this board cannot interrupt the host computer. With the non-PnP version, the interrupt line is put into high-impedance mode, so other devices can use the interrupt channel selected by jumper W1.
  • Page 84 The 8-bit data ports can be either input or output, both of which are latched. • The 4-bit ports are used for control and status of the 8-bit data ports. • Interrupt generation and enable/disable functions are available. © National Instruments Corporation D-11 PC-DIO-96/PnP User Manual...

  • Page 85: Mode 0 I/O Configurations

    Input Output 10000011 Output Output Input Input 10001000 Output Input Output Output 10001001 Output Input Output Input 10001010 Output Input Input Output 10001011 Output Input Input Input 10010000 Input Output Output Output PC-DIO-96/PnP User Manual D-12 © National Instruments Corporation...
  • Page 86 /* Variable to store data read from a port */ Calculate register addresses */ porta = BASE_ADDRESS + APORTAoffset; portb = BASE_ADDRESS + APORTBoffset; portc = BASE_ADDRESS + APORTCoffset; cnfg = BASE_ADDRESS + ACNFGoffset; © National Instruments Corporation D-13 PC-DIO-96/PnP User Manual...
  • Page 87 The control word written to the CNFG Register to configure port A for input in mode 1 is shown as follows. Bits PC6 and PC7 of port C can be used as extra input or output lines. PC-DIO-96/PnP User Manual D-14 © National Instruments Corporation...
  • Page 88 A of the 82C55A. This bit is controlled by setting/resetting PC4. INTRA Interrupt Request Status for Port A—When INTEA and IBFA are high, this bit is high, indicating that an interrupt request is pending for port A. © National Instruments Corporation D-15 PC-DIO-96/PnP User Manual...

  • Page 89: Figure D-3. Port C Pin Assignments, Mode 1 Input

    #define APORTBoffset 0x01 /* Offset for PPI A, port B */ #define APORTCoffset 0x02 /* Offset for PPI A, port C */ #define ACNFGoffset 0x03 /* Offset for PPI A, CNFG */ PC-DIO-96/PnP User Manual D-16 © National Instruments Corporation...
  • Page 90 The control word written to the CNFG Register to configure port B for output in mode 1 is shown as follows. Notice that port B does not have extra input or output lines from port C. © National Instruments Corporation D-17 PC-DIO-96/PnP User Manual...
  • Page 91 CPU has written data to port B. INTRB Interrupt Request Status for Port B—When INTEB and OBFB* are high, this bit is high, indicating that an interrupt request is pending for port B. PC-DIO-96/PnP User Manual D-18 © National Instruments Corporation...

  • Page 92: Figure D-4. Port C Pin Assignments, Mode 1 Output

    /* Variable to store data read from a port */ Calculate register addresses */ porta = BASE_ADDRESS + APORTAoffset; portb = BASE_ADDRESS + APORTBoffset; portc = BASE_ADDRESS + APORTCoffset; cnfg = BASE_ADDRESS + ACNFGoffset; © National Instruments Corporation D-19 PC-DIO-96/PnP User Manual...
  • Page 93 /* Port B is an output in mode 1.*/ while (!(inp(portc) & 0x02)); /* Wait until OBFB* is set, indicating that the data last written to port B has been read.*/ outp(portb,0x34); /* Write the data to port B. */ PC-DIO-96/PnP User Manual D-20 © National Instruments Corporation...

  • Page 94: Figure D-5. Port A Configured As A Bidirectional Data Bus In Mode 2

    During a mode 2 data transfer, the status of the handshaking lines and interrupt signals can be obtained by reading port C. The port C status- word bit definitions for a mode 2 transfer are shown as follows. © National Instruments Corporation D-21 PC-DIO-96/PnP User Manual...
  • Page 95 Input/Output—These bits can be used for general- purpose I/O lines if group B is configured for mode 0. If group B is configured for mode 1, refer to the bit explanations shown in the preceding mode 1 sections. PC-DIO-96/PnP User Manual D-22 © National Instruments Corporation...

  • Page 96: Figure D-6. Port C Pin Assignments, Mode 2

    /* Offset for PPI A, port C */ #define ACNFGoffset 0x03 /* Offset for PPI A, CNFG */ unsigned int porta, portb, portc, cnfg; char valread; /* Variable to store data read from a port */ © National Instruments Corporation D-23 PC-DIO-96/PnP User Manual...
  • Page 97 #define APORTAoffset 0x00 /* Offset for PPI A, port A */ #define APORTBoffset 0x01 /* Offset for PPI A, port B */ #define APORTCoffset 0x02 /* Offset for PPI A, port C */ PC-DIO-96/PnP User Manual D-24 © National Instruments Corporation...
  • Page 98 /* Port B is an output in mode 1. */ outp(cnfg,0x05); /* Set PC2 to enable interrupts from 82C55A. */ outp(ireg1,0x02); /* Set AIRQ1 to enable PPI A, port B interrupts. */ outp(ireg2,0x04); /* Set INTEN bit. */ © National Instruments Corporation D-25 PC-DIO-96/PnP User Manual...
  • Page 99 /* Set INTEN bit. */ Programming Considerations for the 82C53 A general overview of the 82C53 and how it is configured on the PC-DIO-96/PnP are presented as follows. This section also includes an in-depth example of handling interrupts generated by the 82C53. General Information The 82C53 contains three counter/timers, each of which can operate in one of six different modes.
  • Page 100 0x06); /* Enable interrupts, enable counter interrupts, and select counter 0's output */ /* At this point, you should install your interrupt service routine using the interrupt channel selected. */ /* install_isr(channel,...); */ © National Instruments Corporation D-27 PC-DIO-96/PnP User Manual...
  • Page 101 0 */ /* As soon as the last byte is written to counter 0, the counter begins counting, and the PC-DIO-96/PnP starts to interrupt the host computer. At this point, you can run other code..*/ /* call_foreground_code(...); */ /* When you are ready to exit your program, you should deactivate the counters and interrupts as shown below.
  • Page 102 C..void remove_isr(void); public _install_isr, _isr_handler, _remove_isr _DATA segment word public 'DATA' ; declarations ackm 00020h acks 000a0h 00020h maskm 00021h masks 000a1h int_addr int_mask isrb_addr slave_ack vect_num _DATA ends © National Instruments Corporation D-29 PC-DIO-96/PnP User Manual...
  • Page 103 ; Get interrupt level al,7 ; Check to see if it belongs to master short slave or slave interrupt chip al,008h ; Offset for master vector list short setvec ; Go set the vector PC-DIO-96/PnP User Manual D-30 © National Instruments Corporation...
  • Page 104 ; Enable interrupts for selected level maskm,al ; Delay--wait for data transfer al,masks ; Get mask data from slave chip ; Delay--wait for data transfer ch,al ; Determine setting of mask bit © National Instruments Corporation D-31 PC-DIO-96/PnP User Manual...
  • Page 105 _install_isr endp ; remove_isr ; bp reg at [bp+0] ; ret addr ofs at [bp+2] ; ret addr seg at [bp+4] _remove_isr proc push push push push push push ax,seg _DATA ds,ax PC-DIO-96/PnP User Manual D-32 © National Instruments Corporation...
  • Page 106 ; OR in old mask value masks,al ; Send out new setting ; Delay--wait for data transfer al,vect_num ; al holds interrupt level ah,25h dx,int_addr ; ds:dx points to new handler ; Install the old vector © National Instruments Corporation D-33 PC-DIO-96/PnP User Manual...
  • Page 107 'isr_block' is stored at _DATA:isrb_addr; to access the structure, use the following steps: ax,seg _DATA ds,ax si,isrb_addr you need not use ds:si, but be sure to save any registers you use... PC-DIO-96/PnP User Manual D-34 © National Instruments Corporation...
  • Page 108 Interrupt Handling The INTEN bit of Interrupt Register 2 must be set to enable interrupts from the PC-DIO-96/PnP. This bit must first be cleared to disable unwanted interrupts. After all sources of interrupts have been disabled or placed in an inactive state, you can set INTEN.
  • Page 109 Interrupt Programming Example for the 82C53, of this chapter. External signals can be used to interrupt the PC-DIO-96/PnP when port A or port B is in mode 0 and the low nibble of port C is configured for input.

  • Page 110: Table

    Plug and Play selection compatible 5 V supply fuse Nonresettable Self-resetting Self-resetting Power-up state DIO lines pulled Jumper for pull-up Jumper for pull-up HIGH (100 kΩ) (factory default) (factory default) or pull-down or pull-down © National Instruments Corporation PC-DIO-96/PnP User Manual...

  • Page 111: Figure E-1. Pc-Dio-96 Block Diagram

    PC bus interface settings. The DIP switch U16 sets the base I/O address. Jumper W2 selects the interrupt level. The DIP switch and jumper are shown in the parts locator diagram in Figure E-2. PC-DIO-96/PnP User Manual © National Instruments Corporation...

  • Page 112: Figure E-2. Pc-Dio-96 Parts Locator Diagram

    Appendix E Using Your PC-DIO-96 (Non-PnP) Board 1 W2 3 Serial Number 5 J1 2 U16 4 W1 6 F1 Figure E-2. PC-DIO-96 Parts Locator Diagram © National Instruments Corporation PC-DIO-96/PnP User Manual...

  • Page 113: Table

    I/O address or interrupt level, you need to change these settings on the PC-DIO-96 (as instructed on the following pages) or on the other hardware. Record your settings in the PC-DIO-96/PnP Hardware and Software Configuration Form in Appendix F, Customer Communication.
  • Page 114 Press the other side of the switch to select a binary value of 0 for the corresponding address bit. Figure E-3 shows two possible switch settings. The black side indicates the side of the switch that is pushed down. © National Instruments Corporation PC-DIO-96/PnP User Manual...

  • Page 115: Figure E-3. Example Base I/O Address Switch Settings

    Switches Set to Default Setting (Base I/O Address Hex 180) Switches Set to Base I/O Address Hex 2A0 Figure E-3. Example Base I/O Address Switch Settings Table E-3 shows all possible switch settings and their corresponding address ranges. PC-DIO-96/PnP User Manual © National Instruments Corporation...

  • Page 116: Table

    Space Used (hex) A9 A8 A7 A6 A5 000–01F 020–03F 040–05F 060–07F 080–09F 0A0–0BF 0C0–0DF 0E0–0FF 100–11F 120–13F 140–15F 160–17F 180–19F 1A0–1BF 1C0–1DF 1E0–1FF 200–21F 220–23F 240–25F 260–27F 280–29F 2A0–2BF 2C0–2DF 2E0–2FF 300–31F © National Instruments Corporation PC-DIO-96/PnP User Manual...

  • Page 117: Switch Settings With Corresponding Base I/O Address And Base I/O Address Space

    W2. The default interrupt line is IRQ5. To change to another line, remove the jumper from IRQ5 and place it on the pins for another request line. Figure E-4 shows the default factory setting for IRQ5. PC-DIO-96/PnP User Manual © National Instruments Corporation...

  • Page 118: Figure E-4. Interrupt Jumper Setting For Irq5 (Default Setting

    PC-DIO-96, if possible. After you make any necessary changes and verify the switch and jumper settings, record them using the PC-DIO-96/PnP Hardware and Software Configuration Form in Appendix F, Customer Communication. You are now ready to install the PC-DIO-96.
  • Page 119 EISA-class computer, you need to update the computer's resource allocation (or configuration) table by reconfiguring your computer. See your computer’s user manual for information about updating the configuration table. The PC-DIO-96 board is now installed and ready for operation. PC-DIO-96/PnP User Manual E-10 © National Instruments Corporation...
  • Page 120 Electronic Services Bulletin Board Support National Instruments has BBS and FTP sites dedicated for 24-hour support with a collection of files and documents to answer most common customer questions. From these sites, you can also download the latest instrument drivers, updates, and example programs. For recorded instructions on how to use the bulletin board and FTP services and for BBS automated information, call (512) 795-6990.
  • Page 121 Fax and Telephone Support National Instruments has branch offices all over the world. Use the list below to find the technical support number for your country. If there is no National Instruments office in your country, contact the source from which you purchased your software to obtain support.
  • Page 122 National Instruments for technical support helps our applications engineers answer your questions more efficiently. If you are using any National Instruments hardware or software products related to this problem, include the configuration forms from their user manuals. Include additional pages if necessary.
  • Page 123 PC-DIO-96/PnP Hardware and Software Configuration Form Record the settings and revisions of your hardware and software on the line to the right of each item. Also fill out the hardware and software configuration forms for all modules in the chassis, all relevant DAQ boards, and all other chassis in the application.
  • Page 124 Documentation Comment Form National Instruments encourages you to comment on the documentation supplied with our products. This information helps us provide quality products to meet your needs. Title: PC-DIO-96/PnP User Manual Edition Date: September 1996 Part Number: 320289C-01 Please comment on the completeness, clarity, and organization of the manual.
  • Page 125 Port B of PPI A bidirectional data lines for Port B of PPI A binary-coded decimal BIRQ0 PPI B interrupt request bit for Port A BIRQ1 PPI B interrupt request bit for Port B © National Instruments Corporation PC-DIO-96/PnP User Manual...
  • Page 126 Port B of PPI D bidirectional data lines for Port C of PPI D EISA Extended Industry Standard Architecture ground hexadecimal hertz input buffer full signal IBFA input buffer bit for Port A PC-DIO-96/PnP User Manual © National Instruments Corporation...
  • Page 127 OBF* output buffer full signal OBFA* output buffer bit for Port A OBFB* output buffer bit for Port B Plug and Play programmable peripheral interface read signal external resistance load resistance © National Instruments Corporation PC-DIO-96/PnP User Manual...
  • Page 128 Glossary RTSI Real-Time System Integration seconds SCXI Signal Conditioning eXtensions for Instrumentation strobe input signal transistor-to-transistor logic volts volts direct current external volt volts in volts, output high volts, output low write signal PC-DIO-96/PnP User Manual © National Instruments Corporation...
  • Page 129 Port C set/reset control words (table), D-6 mode 1 strobed input, D-14 to D-17 register map, D-2 to D-3 control words written to CNFG Register (figure), D-15 Port C pin assignments (figure), D-16 © National Instruments Corporation I -1 PC-DIO-96/PnP User Manual...
  • Page 130 (figure), E-4 pins 1-50 (figure), 3-5 switch settings and corresponding pins 51-100 (figure), 3-6 address ranges (table), E-7 to E-8 cabling for PC-DIO-96/PnP, 1-5 to 1-7 verifying usage by other equipment CIRQ0 bit (note), E-5 description, D-8 PC-DIO-96/PnP, 2-3...
  • Page 131 CTR1 bit, D-10 e-mail support, F-2 CTRIRQ bit, D-10 environment specifications, A-2 custom cabling for PC-DIO-96/PnP, equipment for PC-DIO-96/PnP, optional, 1-5 1-5 to 1-7 customer communication, xiii, F-1 to F-2 fax and telephone technical support, F-2 FaxBack support, F-2 DATA signal...
  • Page 132 1 strobed input, D-15 I/O connector. See digital I/O connector. mode 1 strobed output, D-18 INTEB bit interrupt handling, D-35 Port C status-word definitions mode 1 strobed input, D-16 mode 1 strobed output, D-18 © National Instruments Corporation I -4 PC-DIO-96/PnP User Manual...
  • Page 133 D-16 to D-17 OKI 82C53 data sheet, C-1 to C-12 purpose and use, D-11 OKI 82C55A data sheet, B-1 to B-17 operation of PC-DIO-96/PnP. See theory of operation. optional equipment for PC-DIO-96/PnP, 1-5 output signal specifications, A-2 PC-DIO-96/PnP User Manual I -5 ©...
  • Page 134 A-2 parts locator diagram programming. See register-level PC-DIO-96, E-3 programming. PC-DIO-96/PNP, 2-1 PC-DIO-96 compared with PC-DIO-96/PnP, E-1 configuration. See configuration. RD* signal installation, E-9 to E-10 description (table), 3-13 PC-DIO-96/PnP mode 1 input timing (figure), 3-14 block diagram, 4-1...
  • Page 135 Interrupt Control Register 1, digital logic levels, A-1 D-8 to D-9 environment, A-2 Interrupt Control Register 2, D-10 physical, A-2 overview, D-7 power requirements, A-2 register map, D-2 to D-3 transfer rates, A-2 PC-DIO-96/PnP User Manual I -7 © National Instruments Corporation...
  • Page 136 SSR-OAC-5 or SSR-OAC-5A output modules, driving with PC-DIO-96/PnP WR* signal (note), 1-2 description (table), 3-13 starting to use PC-DIO-96/PnP, 1-2 mode 1 output timing (figure), 3-15 STB* signal mode 2 bidirectional timing (figure), 3-16 description (table), 3-13 mode 1 input timing (figure), 3-14 mode 2 bidirectional timing (figure), 3-16 switches.

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