IBM 1620 Manual page 18

Data processing system
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(3) For diodes with peak-to-peak voltages
greater than 22.0 volts, set the neg-
ative peak to -12.0 volts (just in
saturation). The positive peak will
be between +10.0 and +12.0v. See
Figure 2.
(e) Measure the +S ampl ifier outputs at 4A07G,
K, C , L, and 4A08G, K, C, and 4A09C.
The + signals must be at least 2.0 milli-
seconds in duration.
(f)
Changes in voltage, temperature, and
dust on the read window will cause the
voltage level to move up or down from
their initial values. An average cycl ic
shift of 1 volt is to be expected. Re-
adj ust any diode as per 7) (d) when the
power supplies are adjusted to their nom-
inal setting and anyone of the following
conditions exist. See Figure 3.
(a) The positive level is more negative
than +5.0 volts.
12.0
__
10.0--------~--------------~~
__ -------
- 1.0 ____________
~r_
_ _
~-------------oo
N.,¢
C"IC"I
-12.0------~...-4.-------
Flattened Curve Indicates
Saturation (About -11. 9v)
Proper Adjustmen'f For
Diodes With Peak-To-
Peak Swing Greater
Than 22.0v
Figure 2.
Diode Voltage Adjustment (Over 22v swing
(b) The negative level is more positive
than 7.0 volts.
(c) The +S amplifier signals at points
listed in 7) (e) are less than 2.0
mi II iseconds in duration.
3.12
Figure 3. Effect of Change in Vol tage, Temperature,
and Dust on Read Window
Re-adjust per Step 7 if any of the above conditions
exist. (c) Indicates a diode with less than the
minimum 14.0v swing.
2. Timhg Disk Lamp and Photo Diode
The timing disk lamp must be adjusted so that both
of the following conditions are met:
1) The negative peak of the diode measured at
A4A06C must be set to -12 volts (just in sat-
uration) •
2) The trailing edge of the sync pulse must be in
the center of the code pulse within .5m sec
for all channels.
Whenever the lamp assembly is shifted to obtain
the correct timing, a change in diode output wi"
be noted because this adjustment also affects
vertical/horizontal positioning of the light source
relative to the diode. More or less I ight reaching
the diode alters the sync diode output which in
turn causes a wider or narrower sync pulse. Since
timing is arrived at using the trai I ing edge of the
sync pulse, the diode output and timing adjustments
are interacting. To satisfy conditions 1 and 2 as
previously stated, the combined adjustments of
the sync lamp potentiometer, lamp , socket,
timing disk diode potentiometer, and/or the
complete lamp block assembly may be required.
ADJUSTMENT
The lIanded
ll
output of tape Channels 1, 2, 3, 6 and
7 can be used to check the sync pu Ise timing as
follows:
1. Punch up a length of tape with G, EL, G, EL,
etc., in consecutive positions. This can be done
by inserting a read alphameric instruction with
the typewriter designated as the input device.
INSERT. Type 3700501 00100, 3900501 00200,
49 00012. RELEASE START. Type G, :j:. RELEASE.
START. The paper tape punch shou Id now be

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