8. IC Data Sheets
This chapter shows the internal block diagrams and pin
configurations of ICs that are drawn as "black boxes" in the
8.1
Diagram
10-3-4 B04, Tuner, USB,
Block diagram
ANTENNA
INPUT
3.3 V
1.8 V
Pinning information
WiFi, Si2157 (U18)
Si2157
RF
0 / 90
AGC
FREQ
LDO
SYNTH
RF_REF
RF_IP
RF_IN
RF_SHLD
ADDR
RSTB
AGC1
Figure 8-1 Internal block diagram and pin configuration
IC Data Sheets
electrical diagrams (with the exception of "memory" and "logic"
ICs).
DSP
I
PGA
ADC
FILTER
Q
FILTER
PGA
ADC
DEMOD
IF
LOW-IF
AGC
XOSC
22
15
21
20
19
18
17
16
23
14
24
13
25
GND
12
PAD
26
11
27
10
28
9
2
3
4
5
6
7
1
8 VDD_D
back to
div. table
VES15.1HE LA
AGC
DLIF
DSP
AGC
ATV
ALIF
RSTB
SDA
SCL
ADDR
VDD_L
ALIF_P
ALIF_N
DLIF_P
VDD_H
DLIF_N
8.
EN 25
DTV
DEMOD
ATV
DEMOD
AV
SoC
19830_300_152001.eps
152001
2015-Jan-20