Introduction To The Timer - Texas Instruments TMS320C6472 User Manual

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Introduction to the Timer

The timer can be configured in one of three modes using the timer mode (TIMMODE) bits in the timer
global control register (TGCR): a 64-bit general-purpose (GP) timer, dual 32-bit timers (TIMLO and
TIMHI), or a watchdog timer. When configured as dual 32-bit timers, each half can operate dependently
(chain mode) or independently (unchained mode) of each other.
At reset, the timer is configured as a 64-bit GP timer. The watchdog timer function can be enabled if
desired, via the TIMMODE bits in timer global control register (TGCR) and WDEN bit in the watchdog
timer control register (WDTCR). Once the timer is configured as a watchdog timer, it cannot be
re-configured as a regular timer until a device reset occurs.
The timer has two input pins for C6472/TCI6486 devices (TINPL and TINPH), one input pin for TCI6482,
TCI6484, TCI6487/88 devices (TINPL), and one output pin (TOUTL). The timer control register (TCR)
controls the function of the input and output pin.
Figure 1 shows a high-level block diagram of the timer circuitry.
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C6472/TCI648x 64-Bit Timer
C6472/TCI648x 64-Bit Timer
Copyright © 2005–2010, Texas Instruments Incorporated
SPRU818B – December 2005 – Revised September 2010
SPRU818B – December 2005 – Revised September 2010
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