Texas Instruments TMS320C6472 User Manual
  1. Manuals
  2. Brands
  3. Texas Instruments Manuals
  4. Timer
  5. TMS320C6472
  6. User manual
Texas Instruments TMS320C6472 User Manual

Texas Instruments TMS320C6472 User Manual

Dsp 64-bit timer
Hide thumbs Also See for TMS320C6472:
Table of Contents

Advertisement

Quick Links

Download this manual
TMS320C6472/TMS320TCI648x DSP
64-Bit Timer
User's Guide
Literature Number: SPRU818B
December 2005 – Revised September 2010

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the TMS320C6472 and is the answer not in the manual?

Questions and answers

Subscribe to Our Youtube Channel

Related Manuals for Texas Instruments TMS320C6472

Summary of Contents for Texas Instruments TMS320C6472

  • Page 1 TMS320C6472/TMS320TCI648x DSP 64-Bit Timer User's Guide Literature Number: SPRU818B December 2005 – Revised September 2010...
  • Page 2 SPRU818B – December 2005 – Revised September 2010 Submit Documentation Feedback Copyright © 2005–2010, Texas Instruments Incorporated...

  • Page 3: Table Of Contents

    Timer Period Registers (PRDHI and PRDLO) Timer Control Register (TCR) Timer Global Control Register (TGCR) Watchdog Timer Control Register (WDTCR) Appendix A Revision History SPRU818B – December 2005 – Revised September 2010 Submit Documentation Feedback Copyright © 2005–2010, Texas Instruments Incorporated Table of Contents...
  • Page 4 Timer Global Control Register (TGCR) Field Descriptions Watchdog Timer Control Register (WDTCR) Field Descriptions TCI648x/C6472 Timer Revision History List of Figures List of Figures List of Tables SPRU818B – December 2005 – Revised September 2010 Copyright © 2005–2010, Texas Instruments Incorporated www.ti.com Submit Documentation Feedback...

  • Page 5: About This Manual

    About This Manual This document provides an overview of the 64-bit timer in the TMS320TCI648x/TMS320C6472 DSP. The timer can be configured as a general-purpose 64-bit timer, dual general-purpose 32-bit timers, or a watchdog timer. When configured as dual 32-bit timers, each half can operate in conjunction (chain mode) or independently (unchained mode) of each other.

  • Page 6: Introduction To The Timer

    C6472/TCI648x 64-Bit Timer SPRU818B – December 2005 – Revised September 2010 C6472/TCI648x 64-Bit Timer SPRU818B – December 2005 – Revised September 2010 Copyright © 2005–2010, Texas Instruments Incorporated User's Guide Submit Documentation Feedback...

  • Page 7: Timer Block Diagram

    INVINP TOUTL TINPL Figure 2. For C6472/TCI6486 devices, TINPH can be used to drive Timer Internal timer clock Copyright © 2005–2010, Texas Instruments Incorporated Introduction to the Timer Configuration Timer period register TDDRHI bits PSCHI bits PWID (CP = 0)

  • Page 8: Timer Modes

    Timer interrupt (TINTLO) to CPU Timer event (TEVTLO) to EDMA controller TSTAT_LO bit in TCR INVOUTP_LO Output via TOUTL SPRU818B – December 2005 – Revised September 2010 Copyright © 2005–2010, Texas Instruments Incorporated www.ti.com Figure 3. The counter registers Section 3.3), the timer counter...

  • Page 9: Dual 32-Bit Timers Chained Mode Block Diagram

    PWID_LO (CP_LO = 0) Timer interrupt (TINTLO) to CPU Timer event (TEVTLO) to EDMA controller TSTAT bit in TCR INVOUTP_LO Output via TOUTL Copyright © 2005–2010, Texas Instruments Incorporated Timer Modes 32-bit prescaler (TIMHI) 32-bit timer (TIMLO) C6472/TCI648x 64-Bit Timer...

  • Page 10: Dual 32-Bit Timers Chained Mode Example

    32-bit timer counter CNTLO Equality comparator CP_LO Pulse generator PWID_LO (CP_LO = 0) SPRU818B – December 2005 – Revised September 2010 Copyright © 2005–2010, Texas Instruments Incorporated www.ti.com 32-bit timer (TIMLO) Timer period PRDLO CP_HI PWID_HI (CP_HI = 0) Timer interrupt (TINTLO) to CPU...

  • Page 11: Dual 32-Bit Timers Unchained Mode Example

    Figure 7). When the timer is enabled, the timer counter Figure Prescale counter reset Timer counter incremented Copyright © 2005–2010, Texas Instruments Incorporated Timer Modes 7). The timer can be stopped, Prescale counter reset Timer counter reset C6472/TCI648x 64-Bit Timer...

  • Page 12: Counter And Period Registers Used In Gp Timer Modes

    C6472/TCI648x 64-Bit Timer Counter Registers CNTHI:CNTLO CNTHI CNTLO CNTLO PSCHI bits and CNTHI SPRU818B – December 2005 – Revised September 2010 Copyright © 2005–2010, Texas Instruments Incorporated www.ti.com Period Registers PRDHI:PRDLO PRDHI PRDLO PRDLO TDDRHI bits and PRDHI Submit Documentation Feedback...

  • Page 13: Timer Operation

    64-bit watchdog timer Dual 32-bit timers (chained) Table 3. Timer Enabling TCR ENAMODE bits Bit 23 Bit 22 Bit 7 Bit 6 Copyright © 2005–2010, Texas Instruments Incorporated Timer Operation TGCR TIMHIRS TIMLORS Timer Status Disabled (default) Enabled one time...

  • Page 14: Timer Clock Source Selection

    Internal clock (default) Gated internal clock External clock on timer input (TINPL) Internal clock Gated TIEN_LO CLKSRC_LO External clock SPRU818B – December 2005 – Revised September 2010 Copyright © 2005–2010, Texas Instruments Incorporated www.ti.com Input clock to timer Submit Documentation Feedback...

  • Page 15: Timer Counting

    SPRU818B – December 2005 – Revised September 2010 Submit Documentation Feedback Timer input clock TINT rate Programmed timer period Timer input clock Programmed prescale period × Programmed Copyright © 2005–2010, Texas Instruments Incorporated Timer Operation rate rate timer period C6472/TCI648x 64-Bit Timer...

  • Page 16: Timer Emulation Modes

    The timer output toggles once at the first timer clock cycle and then toggles with a frequency of half the timer clock frequency as the timer continues to count. SPRU818B – December 2005 – Revised September 2010 Copyright © 2005–2010, Texas Instruments Incorporated www.ti.com Submit Documentation Feedback...

  • Page 17: 32-Bit Timer Counter Overflow Example

    Copy CNTHI to CNTHIS Read CNTHI → Read from CNTHIS Read CNTLO → Read CNTLO Read CNTHI → Read CNTHI Copyright © 2005–2010, Texas Instruments Incorporated Timer Operation . . . 0000 FFFFh Timer interrupt and timer event generated C6472/TCI648x 64-Bit Timer...

  • Page 18: 3.10 Initializing The Timer

    Set WDEN bit, as required Program ENAMODE bits, as required Program WDKEY bits to activate the watchdog timer, if necessary SPRU818B – December 2005 – Revised September 2010 Copyright © 2005–2010, Texas Instruments Incorporated www.ti.com Submit Documentation Feedback...

  • Page 19: Watchdog Timer Mode

    The timer output signal can be connected externally to the NMI pin to generate a non-maskable interrupt, if so desired. SPRU818B – December 2005 – Revised September 2010 Submit Documentation Feedback Section 4.1). Typically, one or the other is used, depending on Copyright © 2005–2010, Texas Instruments Incorporated Watchdog Timer Mode C6472/TCI648x 64-Bit Timer...

  • Page 20: Timer In Watchdog Timer Mode

    TSTAT_LO bit in TCR (Copied to WDFLAG bit in WDTCR) INVOUTP_LO Output via TOUTL pin (Can connect TOUTL to an interrupt pin) SPRU818B – December 2005 – Revised September 2010 Copyright © 2005–2010, Texas Instruments Incorporated www.ti.com Submit Documentation Feedback...

  • Page 21: Watchdog Timer Operation State Diagram

    Timeout state TINTLO triggered) (watchdog mode disabled) Other than DA7Eh or A5C6h to WDKEY (WDFLAG set, TINTLO triggered) Copyright © 2005–2010, Texas Instruments Incorporated Watchdog Timer Mode DA7Eh to WDKEY Active state (waiting for A5C6h) Timeout (WDFLAG set, TINTLO triggered)

  • Page 22: Watchdog Timer Register Write Protection

    Figure 12). After the watchdog timer has entered the initial state, clearing the TIMLORS and TIMHIRS bits is prohibited. C6472/TCI648x 64-Bit Timer SPRU818B – December 2005 – Revised September 2010 Copyright © 2005–2010, Texas Instruments Incorporated www.ti.com Submit Documentation Feedback...

  • Page 23: Timer Registers

    Counter register low Counter register high Period register low Period register high Timer control register Timer global control register Watchdog timer control register Copyright © 2005–2010, Texas Instruments Incorporated Timer Registers Section 5.1 Section 5.2 Section 5.2 Section 5.3 Section 5.3 Section 5.4...

  • Page 24: Emulation Management And Clock Speed Register (Emumgt_Clkspd)

    The timer runs free, regardless of the value of the SOFT bit. C6472/TCI648x 64-Bit Timer Figure 13 Table Reserved R/W-0 Reserved R/W-0 SPRU818B – December 2005 – Revised September 2010 Copyright © 2005–2010, Texas Instruments Incorporated www.ti.com 9). An emulation suspend event Section 3.8. CLKDIV SOFT FREE Submit Documentation Feedback...

  • Page 25: Timer Counter Registers (Cnthi And Cntlo)

    32 31 R/W-0 Description Counter register. This register is a 32-bit prescale counter or 32-bit timer counter, or one half of a 64-bit timer counter. Copyright © 2005–2010, Texas Instruments Incorporated Timer Registers Figure 15 CNTLO R/W-0 C6472/TCI648x 64-Bit Timer...

  • Page 26: Timer Period Registers (Prdhi And Prdlo)

    Period register. This register contains the full timer period for a 32-bit timer configuration or half the timer period for a 64-bit timer configuration. SPRU818B – December 2005 – Revised September 2010 Copyright © 2005–2010, Texas Instruments Incorporated www.ti.com and are accessed via a separate...

  • Page 27: Timer Control Register (Tcr)

    Figure 18. Timer Control Register (TCR) Reserved R/W-0 PWID_HI CP_HI R/W-0 R/W-0 Reserved R/W-0 PWID_LO CP_LO R/W-0 R/W-0 Copyright © 2005–2010, Texas Instruments Incorporated Timer Registers Table 12. The lower 16 bits of TIEN_HI CLKSRC_HI R/W-0 R/W-0 Reserved INVOUTP_HI TSTAT_HI R/W-0 R/W-0...
  • Page 28 An inverted timer input drives the timer. INVOUTP_LO Timer output inverter control bit. The timer output is not inverted. The timer output is inverted. C6472/TCI648x 64-Bit Timer SPRU818B – December 2005 – Revised September 2010 Copyright © 2005–2010, Texas Instruments Incorporated www.ti.com Submit Documentation Feedback...
  • Page 29 (TOUTL) when the pin is used as a timer output pin and may be inverted by setting INVOUTP_LO = 1. Timer output is low. Timer output is high. SPRU818B – December 2005 – Revised September 2010 Submit Documentation Feedback Copyright © 2005–2010, Texas Instruments Incorporated Timer Registers C6472/TCI648x 64-Bit Timer...

  • Page 30: Timer Global Control Register (Tgcr)

    TIMLO is not in reset. TIMLO can be used as a 32-bit timer. C6472/TCI648x 64-Bit Timer Figure 19 and described in Reserved R/W-0 TIMMODE R/W-0 SPRU818B – December 2005 – Revised September 2010 Copyright © 2005–2010, Texas Instruments Incorporated www.ti.com Table 13. This register PSCHI R/W-0 TIMHIRS TIMLORS R/W-0...

  • Page 31: Watchdog Timer Control Register (Wdtcr)

    WDKEY is not applicable in the general-purpose timer mode. Reserved. The reserved bit location is always read as 0. A value written to this field has no effect. Copyright © 2005–2010, Texas Instruments Incorporated Timer Registers and described in Table 14.

  • Page 32: Appendix A Revision History

    Section 3.3 Modified first paragraph Figure 18 Modified Timer Control Register (TCR) Table 12 Modified Timer Control Register (TCR) Field Descriptions Revision History SPRU818B – December 2005 – Revised September 2010 Copyright © 2005–2010, Texas Instruments Incorporated www.ti.com Submit Documentation Feedback...

  • Page 33: Important Notice

    Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.

This manual is also suitable for:

Tms320tci648x

Table of Contents