Digital Block Diagram - JVC SR-DVM70AG Schematic Diagrams

DIGITAL BLOCK DIAGRAM

0 2 DIGITAL
VIDEO IF
TO
SW. REG
CN5502
TO
JUNCTION
(VIDEO) AO_IEC958, AI_D[0], A_MUTE2[H], K_BUS_CLK
K_BUS_REQ, SYS_RESET[L], K_BUS_IN/OUT
CN7109
AO_SCLK, AO_MCLKO, AO_FSYNC, DAC_RST[L]
DAC_SCL, DAC_SDA, AO_D[0], A_DAC_CS, 480I[H]
CIN
TO
JUNCTION
(VIDEO) VYIN
CN7108
YV_OUT
RC_OUT
CB_OUT
CR_OUT
MEDIA PROCESSOR
TO
JLIP_TX
JUNCTION
JLIP_RX
(VIDEO)
CN7125
UART2_TX
UART2_RX
OPEN
9 2
3 6
JUNCTION 1394PHY
JACK
(VIDEO)
TPA1+
TPA1-
TPB1+
TPB1-
1394
FLASH MEMORY
IC1201
Flash
memory
LH_AR[6] to LH_AR[21]
IC1202
IC1203
Transparent
D2.5V, D1.8V, D3.3V
SW5V, D5V, V3.3V
C
IC1001
Video
Q1008
Y Y Controller
SW
Q1002 to Q1004
C Cb Cr IC1002
Y
Q1007
SDRAM
BUF
IC1401
Media
Processor
PHY_RESET[L], PHY_LREQ
PHY_CLK, PHY_CNA
PHY_CTL[0], PHY_CTL[1]
PHY_DATA[0-7], PHY_LPS
IC1801
PHY_LINK_ON
IEEE1394
Controller
E5_RESET[L]
MADD[1-5]
MADD[6-22]
RD/WR[L], OE[L]/LDS[L]
CS[0]
MADD[6-21]
ALE
VI_D[2-9], VIDEO_RST[L]
VO_D[0-15], SPI_MOSI
VIDEO_27M, VIDEO_CS
VIDEO_MUTE[H], SPI_CLK
VIDEO_RXD
AP, A0 to A9,DQ0 to DQ15
UDQM, WE,CAS, RAS
VI_D[2-9]
VO_D[0-15]
VI_D[2-9], VO_D[0-15]
SDRAM_DQ[0- 31]
SDRAM_A[0-12]
SDRAM_A[14-17]
SDRAM_DQS[0] to [3]
SDRAM_DQM[0] to [3]
SDRAM_CLK[0], SDRAM_CLK[1]
SDRAM_CLK_L[0], SDRAM_CLK_L[1]
SDRAM_CKE, SDRAM_RAS_L
SDRAM_CAS_L, SDRAM_WE_L
VIDEO_RXD, VIDEO_CS, 480I[H]
VIDEO_27M, AO_SCLK, AO_FSYNC
AO_MCLKO, AO_IEC958, AO_D[0]
AI_D[0], SPI_MOSI, SPI_CLK
DAC_SCL, DAC_SDA, A_DAC_CS
DAC_RST[L], VIDEO_RST[L], VIDEO_MUTE[H]
A_MUTE2[H]
K_BUS_CLK
K_BUS_REQ
IC1404 K_BUS_IN
3.3V --> 5.0V
SYS_RESET[L]
IC1405
K_BUS_OUT
5.0V --> 3.3V
ATA2_RESET, ATA2_DAT[0-15], ATA2_DMARQ
ATA2_IORDY, ATA2_INTRQ, ATA2_DIOW[L]
ATA2_DIOR[L], ATA2_DMAACK[L], ATA2_ADD[0] to [4]
ATA_RESET, ATA_DAT[0-15], ATA_DMARQ
ATA_IORDY, ATA_INTRQ, ATA_DIOW[L]
ATA_DIOR[L], ATA_DMAACK[L], ATA_ADD[0] to [4]
2-65 2-66
DDR SDRAM
IC1601
SDRAM_DQ[0-15] DDR_DQ[0-15]
IC1603
RA1609
DDR SDRAM
to
RA1612
IC1602
RA1613
SDRAM_DQ[16-31] DDR_DQ[16-31]
IC1604
to
DDR SDRAM
RA1616
DDR_A[0-12]
DDR_BA[0]
DDR_BA[1]
RA1625
SDRAM_A[0-12] DDR_CS[0]
to DDR_CS[1]
SDRAM_A[14-17]
RA1628
R1641, R1642
SDRAM_CKE DDR_CKE
SDRAM_RAS_L DDR_RAS_L
SDRAM_CAS_L R1601 DDR_CAS_L
SDRAM_WE_L DDR_WE_L
to
R1604
DDR_CLK[0]
SDRAM_CLK[0]
DDR_CLK[1]
SDRAM_CLK[1]
SDRAM_CLK_L[0] R1613 DDR_CLK_L[0]
SDRAM_CLK_L[1] DDR_CLK_L[1]
to
R1616
SDRAM_DQM[0] to [3] R1653
SDRAM_DQS[0] to [3]
to
R1660
ATAPI IF
ATA2_RESET
RA2101 HD_AT[0] to [15]
ATA2_DAT[0-15]
RSTATA
to
RA2104
ATA2_DIOW[L]
ATA2_DIOR[L]
ATA2_DMAACK[L]
ATA2_ADD[0] to [4] DMARQ, DIOW, DIOR
ATA2_DMARQ
IORDY, DMACK, INT_ATA
ATA2_IORDY
ATA_A0, ATA_1,ATA_A2
RA2105
ATA2_INTRQ
CS1FX, CS3FX
to
RA2115
ATA_RESET
RA2208 HD_AT[0] to [15]
ATA_DAT[0-15]
RSTATA
to
RA2211
ATA_DIOW[L]
ATA_DIOR[L]
ATA_DMAACK[L]
ATA_ADD[0] to [4] DMARQ, DIOW, DIOR
ATA_DMARQ IORDY, DMACK, INT_ATA
ATA_IORDY RA2205 ATA_A0, ATA_1,ATA_A2
ATA_INTRQ CS1FX, CS3FX
to
RA2215
DDR_DQM[2],[3]
DDR_DQS[2],[3]
DDR_DQM[0],[1]
DDR_DQS[0],[1]
TO
HDD
Unit
TO
DVD
Recorder
Unit