Ic Block Diagrams - Sony D-NE500 Service Manual

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D-NE500/NE506CK

5-11. IC BLOCK DIAGRAMS

IC702 CXR710160-210R (MAIN Board (1/2))
64 63 62 61 60 59 58 57 56 55
LRCKI
1
BCKI
2
VDIOCD0
3
PCMDI
4
DVDD4
5
6
TEST8
7
TEST7
DCDD0
8
DVSS0
9
10
DVIO0
11
VDIOCD1
12
PF4/XRDE
P13/BCKO
13
P12/LRCKO
14
DAC
15
INTERFACE
P10/PCMDO
EVA
16
CD-ROM
INTERFACE
EEPROM SERIAL
INTERFACE
MAGIC GATE
CORE
DMAC (CH3)
DMAC (CH2)
WATCHDOG TIMER
PRESCALLER/
TIME BASETIMER
160K BYTES
512K BYTES
17 18 19 20 21 22 23 24 25 26 27 28 29 30
53
54
52 51 50 49
48
47
46
45
44
43
42
41
INTERRUPT CONTROLLER
40
39
38
37
DMAC (CH1)
36
35
DMAC (CH0)
34
33
CLOCK GENERATOR/
SYSTEM CONTROLLER
HUFFMAN HW
RAM
VIRTUAL ENGINE
CORE
RAM
ARM77TDMI
CPU CORE
31 32
PE3/RxD1
PE2/TxD1
PE1/RxD0
PE0/TxD0
DVDD2
DVSS2
PC3/SCS0
PC2/SI0
PC1/SO0
VDIOCD2
PC0/SCK0
PF3/T3
PF2/EC2/INT4
PF1/T1
OF0/EC0/INT3
RST
24
24
IC301 TA2152FN(EL) (MAIN Board (1/2))
MUTE
C-AMP
OUTADJ
BIAS_I
SW
GND
BIAS_O
BEEP_I
_SW
PW_SW
RFIN
24
23
22
21
20
19
18
17
16
C-AMP SW
BEEP
PW/MUTE SW
BIAS
PW
PW
PW
A
C
B
1
2
3
4
5
6
7
8
9
NC
NC
BEEPO_L OUT_L
EQ_L
OUT_C PWGND
EQ_R
OUT_R BEEPO_R VCC2
MU_TC
VCC1
IN_L
15
14
13
10
11
12
IN_R

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