Espressif Systems ESP32 Design Manuallines page 10

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• GPIO12 is yet another strapping pin, and its level state in the power-on reset process is
related to the output voltage of the LDO inside the chip:
- "0": output 3.3 V, and the chip defaults to "0";
- "1": output 1.8 V.
�� Note:
The above-mentioned voltages are related to the power supply voltage of integrated flash and PSRAM in
the module.
Meanwhile, GPIO12 can also serve as the pin to connect SDIO/MMC, such as an SD card,
as well as the pin to connect JTAG. Therefore, it is not recommended to use GPIO12 for
other purposes. Please pay particular attention to the fact that the level state in the power-
on reset process of GPIO12 cannot conflict with the output voltage of LDO.
• Pins used as ADC, DAC, TouchPad, SD card, JTAG, RTC domain pins required in low-
power sleep mode, etc. are all special pins. Please refer to
configuring these pins.
Espressif
Figure 1-8. Reference Circuit for Download Button
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1. Schematic Design
ESP32 Datasheet while
2019.01