Denon AVR-4520CI Service Manual page 56

fig.13b
(b)
HDMI Rx IN I2S
IS2_HDMIRx
IS2_HDMIRx
INPUT HDMI Rx IN DSD
-
DSD_HDMIRx
DSD_HDMIRx
INPUT HDMI Rx IN SPDIF
- SPDIF_HDMIRx
T O
SPDIF_HDMIRx
INPUT
-
HDMI Tx OUT I2S
IS2_HDMITx
V I D E O
IS2_HDMITx
OUTPUT HDMI Tx OUT DSD
DSD_HDMITx
DSD_HDMITx
OUTPUT HDMI Tx OUT SPDIF
BLOCK SPDIF_HDMITx
SPDIF_HDMITx
OUTPUT HDMI Tx SPDIF ARC- 1
SPDIF_ARC1
DIAGRAM SPDIF_ARC1
INPUT HDMI Tx SPDIF ARC- 2 -
SPDIF_ARC2
SPDIF_ARC2
INPUT -
T O
NETWORK
SPDIF_860
SPDIF_860 INPUT
-
BLOCK
DIADRAM
SPDIF_OPT1
OPTICAL1
SPDIF_OPT2
OPTICAL2
SPDIF_COAX1
COAXIAL1
SPDIF_COAX2
COAXIAL2
AVR4520only
DENON LINK HD
-
D I G I T A L S I G N A L
-
ANALOGL SIGNAL
A u d i o P L D 5M570ZF256C5N
DSP1IN MUX
I2S_HDMIRx
DSD_HDMIRx
I2S_DIR
HDMITx MUX
I2S/DSD/SPDIF_HDMITx I2S_DSP3OUT
-
I2S_DIR
DSD_HDMIRx
DSD_HDMIRx
-
MAIN ZONE SPDIF MUX
SPDIF_ARC1
SPDIF_ARC2
SPDIF_HDMIRx
SPDIF_860
SPDIF_COAX1
SPDIF_COAX2
SPDIF_OPT1
SPDIF_OPT2
I2S_DIR MCK/BCK/LRCK
Z1_SPDIF MAIN ZONE
-
1st_DIR(1/2)
- SDATA
LC89057W-VF4A-E
-
MAIN ZONE
SPDIF_DLHD I2S_DLHD
1st_DIT(2/2)
- -
LC89057W-VF4A-E
ZONE2
I2S_Z2
SPDIF_860
D I R ( 1 / 1 )
- -
LC89058W-E
DA-C2L
DA-C2R
SDRAM FLASH SDRAM FLASH SDRAM FLASH
1 s t D S P 2 n d D S P 3 r d D S P
VCXO
ADSP21487 ADSP21487 ADSP21487
(24.576MHz)
( D e c o d e r ) (AL32multi) (Post processor)
DAP3IN MUX
DACIN MUX
I2S_DSP2OUT
I2S_DSP1I N I2S_DSP1I N
I2S_DSP3OUT
- I2S_MUTE
-
MUTE signal
generator
DENON LINK HD
module
56
REFCLK
MAIN
VCXO
-
JITTER
(30.000MHz)
REDUCER
CLOCK optimizer
PLLOUTCLK
- -
MAIN DAC
I2S_DAC
PCM1795
-
PLLOUTCLK
MAIN DAC
-
I2S_DAC PCM1795
-
PLLOUTCLK
- MAIN DAC
I2S_DAC PCM1795
-
PLLOUTCLK
-
MAIN DAC
I2S_DAC
PCM1795
-
PLLOUTCLK
- MAIN DAC
I2S_DAC PCM1795
-
PLLOUTCLK
- MAIN DAC
I2S_DAC PCM1795
-
PLLOUTCLK
MAIN DAC
-
I2S_DAC PCM1795
-
MCK/BCK/LRCK MAIN ADC
-
AK5358B
SDATA
-
DA-Z2L
Z2DAC PCM5100
I2S_Z2
DA-Z2R
-
DA_C2L
DA_C2R
(c)
DA-F L
OUTPU T
DA-FR
OUTPU T
DA-C
OUTPU T
DA-SW1
OUTPU T
DA-SBL
OUTPU T
DA-SBR
OUTPU T
DA-SW2
OUTPUT
DA-RSV
OUTPUT
DA-SBL
OUTPU T
ANALOG
DA-SBR
OUTPU T
AUDIO
BLOCK
DA-FHL
OUTPUT
DIAGRAM
DA-FHR
OUTPUT
DA-FWL
OUTPUT
DA-FWR
OUTPUT
MAIN_AD-L
OUTPU T
MAIN_AD-R
OUTPU T
DA-Z2L
OUTPU T
DA-Z2R
OUTPU T
(DA-Z3L)
DA-C2L
OUTPU T
DA-C2R
OUTPU T
(DA-Z3R)