Denon AVR-4520CI Service Manual page 207

Sil1292CNUC (NETWORK/DSP : U0802)
PWR5V_DET
CBUS/HPD
VDD5_IN
Sil1292CNUC Block diagram
VDD5_IN
RESET#
PS_CTRL#
HDMI_DET
PWR5V_DET
CSOL
CSDA
CBUS Control
CBUS/HPD
(DDC/HDCP/MSC)
RX2+
RX2-
RX1+
RX1-
MHL/HDMI Receiver Core
RX0+
RX0-
RXC+
RXC-
RX0+/- are used as the input data pair in MHL mode
and channel 0 input pair in HDMI mode
40 39 38
1
RSVDL1
2
VDD12
RSVDL2 3
RESET# 4
5
INT# 6
DSDA 7
DSCL 8
9
10
11 12 13
1.8 V Reg 3.3 V Reg
Local
I 2 C
CBUS Decode
37 36 35 34 33 32 31
SiI 1292
(Top View)
The ePad must be
grounded
14 15 16 17 18 19 20
Registers, Configuration,
Control, and Power
Management Logic
MHL Transcode
Engine
207
AVDD12
30
TXC-
29
TXC+
28
TX0-
27
TX0+
26
TX1-
25
TX1+
24
TX2-
23
TX2+
22
HPD_IN
21
VREG33_OUT
HDMI
Transmitter
Core
HDMI Switch ModeINT
INT#
GPIO1/CI2CA
GPIO0
DSCL
DSDA
CEC_A
HPD_IN
TX2+
TX2-
TX1+
TX1-
TX0+
TX0-
TXC+
TXC-