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Artesyn Embedded Technology ATCA-7370 Installation And Use Manual

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ATCA-7370/ATCA-7370-S
Installation and Use
P/N: 6806800P54G
September 2014

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Summary of Contents for Artesyn Embedded Technology ATCA-7370

  • Page 1 ATCA-7370/ATCA-7370-S Installation and Use P/N: 6806800P54G September 2014...
  • Page 2 © Copyright 2014 Artesyn Embedded Technologies, Inc. All rights reserved. Trademarks Artesyn Embedded Technologies, Artesyn and the Artesyn Embedded Technologies logo are trademarks and service marks of © Artesyn Embedded Technologies, Inc. 2014 Artesyn Embedded Technologies, Inc. All other product or service names are the property of their respective owners.

  • Page 3: Table Of Contents

    3.2.1 Faceplate Connectors ............64 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 4 4.1.17.1 BIOS Printouts to DRAM ..........85 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 5 5.12 IPMI Over LAN ..............110 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 6 6.3.1 LPC I/O Register Map ............148 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 7 Standard Status Codes ............. 170 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 8 Pigeon Point Specific Commands ........... . 207 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 9 10.1.3 Interface ..............241 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 10 Related Specifications ............. . 249 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 11 Boot Menu Description ............99 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 12 Line Control Register (LCR) ........... . .137 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 13 Debug Switch and LED Status Register ......... . . 169 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 14 OEM Set/Get Performance Commands ......... . .204 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 15 Related Specifications ............249 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 16 List of Tables ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 17 Interrupt Structure on ATCA-7370 ........
  • Page 18 List of Figures ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 19: About This Manual

     FRU information and sensor data. Troubleshooting on page 247, lists the errors, and describes the reasons and solutions to  the problems. Related Documentation on page 249 provides links to further blade-related  documentation. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 20 The IPMB connecting the carrier IPMC to the AMC module Intel® QuickPath A cache-coherent, link-based Interconnect specification for Interconnect (Intel® Intel processors, chipsets, and I/O bridge components. QPI) IPMC Intelligent Platform Management Controller IPMI Intelligent Platform Management Interface ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 21 Receive line (of a duplex serial communication interface) SATA Serial AT Attachment (high-speed serial interface standard for storage devices) SecureCore Tiano Sensor Data Record SDRAM Synchronous Dynamic Random Access Memory SELV Safety Extra Low Voltage SIMD Single Instruction Multiple Data ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 22 Notation for software buttons to click on the screen and parameter description Repeated item for example node 1, node 2, ..., node Omission of information from example/command that is not necessary at the time being ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 23 Indicates a hazardous situation which, if not avoided, may result in minor or moderate injury Indicates a property damage message No danger encountered. Pay attention to important information ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 24: Figure

    August 2012 Updated DoC. 6806800P54C April 2013 This version of the document contains, information about ATCA-7370-Single board variant. Consequently, the title has been updated to reflect this change. Updated Chapter 1, Introduction, on page Chapter 2, Hardware Preparation and Installation, on page...

  • Page 25: Safety Notes

    Class A digital device in this system, pursuant to part 15 of the FCC Rules, EN 55022 Class A respectively. These limits are designed to provide reasonable protection against harmful interference when the system is operated in a commercial environment. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 26 Damage of Blade and Additional Devices and Modules Incorrect installation of additional devices or modules may damage the blade or the additional devices or modules. Before installing or removing an additional device or module, read the respective documentation ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 27 Installing and using SFP modules which are not fully certified and which do not meet all relevant safety standards may damage the RTM and the SFP modules and may lead to personal injury. Only use and install SFP modules which are fully certified and which meet all relevant safety standards. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 28 Only connect TPE bushing of the system to safety extra low voltage (SELV) circuits.  Make sure that the length of the electric cable connected to a TPE bushing does not  exceed 100 m. If you have further questions, ask your system administrator. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 29 Therefore, always use the same type of Lithium battery as is installed and make sure the battery is installed as described in this manual. Environment Always dispose of used blades, system components and RTMs according to your country’s legislation and manufacturer’s instructions. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 30 Safety Notes ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 31: Sicherheitshinweise

    Installieren Sie keine Ersatzteile oder führen Sie keine unerlaubten Veränderungen am Produkt durch, sonst verfällt die Garantie. Wenden Sie sich für Wartung oder Reparatur bitte an die für Sie zuständige Geschäftsstelle von Artesyn. So stellen Sie sicher, dass alle sicherheitsrelevanten Aspekte beachtet werden. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 32 ESD-geschützten Bereich arbeiten. Datenverlust Wenn Sie das Blade aus dem Shelf herausziehen, und die blaue LED blinkt noch, gehen Daten verloren. Warten Sie bis die blaue LED durchgehend leuchtet, bevor Sie das Blade herausziehen. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 33 Überhitzung und Beschädigung des Blades Betreiben Sie das Blade ohne Zwangsbelüftung, kann das Blade überhitzt und schließlich beschädigt werden. Bevor Sie das Blade betreiben, müssen Sie sicher stellen, dass das Shelf über eine Zwangskühlung verfügt. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 34 Bestimmungen für Laserprodukte eingehalten werden. Verletzungsgefahr der Augen Optische SFP-Module können Laserstrahlen aussenden, wenn kein Kabel angeschlossen ist. Blicken Sie daher nicht direkt in die Öffnung eines SFP-Moduls, um Verletzungen der Augen zu vermeiden. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 35 Verwenden Sie deshalb nur den Batterietyp, der auch bereits eingesetzt wurde und befolgen Sie die Installationsanleitung. Umweltschutz Entsorgen Sie alte Batterien und/oder Blades/Systemkomponenten/RTMs stets gemäß der in Ihrem Land gültigen Gesetzgebung und den Empfehlungen des Herstellers. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 36 Sicherheitshinweise ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 37: Introduction

    Option1,9). Another important feature is that ATCA-7370 provides system management capabilities and is hot swap compatible based on the ATCA specification. A single processor variant of the ATCA-7370 is also available. It is called ATCA-7370-S. The following are the main features of ATCA-7370: Form factor: Single slot ATCA (280mm x 322mm) ...

  • Page 38: Standard Compliances

    Climatic environmental requirements. The product can only be used in a restricted temperature range. IEC 60068-2-27/32/35 Mechanical environmental requirements IEC 60950-1, EN 60950-1, UL/CSA Safety requirements 60950-1 UL 94V-0/1, Oxygen index for PCBs Flammability below 28% ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 39 ANSI/IPC-R-700B, ANSI-J-001...003 ISO 8601 Y2K compliance NEBS Standard GR-63-CORE NEBS level three NEBS Standard GR-1089 CORE Project is designed to support NEBS level three. The compliance tests must be done with the customer target system. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 40: Figure 1-1 Declaration Of Conformity

    Introduction Figure 1-1 Declaration of Conformity ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 41: Mechanical Data

    Single slot ATCA 30mm x 351mm x 312mm, 8U form factor Net weight 2930g (without DIMMs), 2496g (with 4x 8GB DIMMs) Weight (including Artesyn standard 4105 g (without DIMMs), 4318 g (with 8x 8GB DIMMs) packaging) ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 42: Mechanical Layout

    S/N Label Note: On the single processor variant the processor and its DIMM sockets are populated on the upper side of the board. Components associated with the second processor are not populated on this product variant. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 43: Mean Time Between Failures

    As of the printing date of this manual, the following board accessories are available. Table 1-4 Blade Accessories - Ordering Information Accessory Description RTM-ATCA-737x RTM for the ATCA-737x product series, 2X GBE (SFP), 2X slot for optional HDD, NSN variant. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 44: Product Identification

    Table 1-4 Blade Accessories - Ordering Information (continued) Accessory Description ATCA-7370-ACCEL-MOD Single coprocessor module to accelerate cryptography, data compression, and pattern matching. Product Identification Figure 1-2 on page 42 shows the location of the serial number label. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 45: Hardware Preparation And Installation

    Environmental and Power Requirements In order to meet the environmental requirements, the blade has to be tested in the system in which it is to be installed. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 46: Environmental Requirements

    Half-sine, 11 m/Sec, 30mSec/Sec Blade level packaging Half-sine, 6 mSec at 180 m/Sec Free Fall 1,200 mm/all edges and corners 1.0 m (packaged) per ETSI 300 019-2-2 (blade level packaging) 100 mm (unpacked) per GR-63-CORE ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 47 Blade Overheating and Blade Damage Operating the blade without forced air cooling may lead to blade overheating and thus blade damage. When operating the blade, make sure that forced air cooling is available on the shelf. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 48: Figure 2-1 Location Of Critical Temperature Spots (Blade Top Side)

    1. Temperature Spot 1 (on Power Entry Module) Max: 90°C (exact location: on top of the transformer) 2. Temperature Spot 2 (on 48V/12V DC/DC Module): Max: 100°C (exact location: in the geometric middle of the heat spreader) ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 49: Power Requirements

    (with ATCA-7370-ACC-Module and with RTM-ATCA- 737x including 2 SAS HDDs) Max. power consumption of ATCA-7370 220W (typ. 180W) (without ATCA-7370-ACC-Module and without RTM) Max. power consumption of ATCA-7370-s (without 140W (typ. 120W) ATCA-7370-ACCEL-MOD and without RTM) ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 50 DIMMs used. Hence, Artesyn does not represent or warrant that measurement results of a specific board provide guaranteed maximum values for a series of boards. Note: This power requirement is under room temperature (25 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 51: Blade Layout

    Blade Layout Note: On the single processor variant the processor and its DIMM sockets are populated on the upper side of the board. Components associated with the second processor are not populated on this product variant. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 52: Installing The Blade Accessories

    The corresponding installation/removal procedures are described in this section. The location of the DIMM Memory Modules are shown in Figure "Blade Layout" on page ATCA-7370/ATCA-7370-S supports low-voltage DDR3 memory. This is available upon request. Damage of Circuits Electrostatic discharge and incorrect module installation and removal can damage circuits or shorten its life.
  • Page 53 Installing and Removing the Blade on page 2. Open locks of socket at both sides. The memory module is automatically lifted up. 3. Remove module from socket. Repeat steps 2 to 3 in order to remove further memory modules. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 54: Cave Creek Module

    Hardware Preparation and Installation 2.4.2 Cave Creek Module This section describes the steps to install/remove the Cave Creek module. The following figure illustrates the location of the Cave Creek module. Figure 2-3 Cave Creek Module ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 55 2. Align and fasten the four M2.5x 8mm standoffs from bottom side of Cave Creek module, using the four M2.5x 4mm screws. 3. Insert the Cave Creek module in the socket so that the module's standoffs fit in the blade's mounting holes. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 56: Figure 2-4 Cave Creek Module Installation

    Cave Creek Module Removal To remove the Cave Creek module: 1. Remove the blade from the system as described in Installing and Removing the Blade on page 2. Remove the four screws that holds the Cave Creek module. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 57: Installing And Removing The Blade

    Incorrect blade installation and removal can result in blade malfunctioning. When plugging the blade in or removing it, do not press on the faceplate but use the handles. 2.5.1 Installing the Blade To install the blade into an AdvancedTCA shelf, proceed as follows. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 58 5. Fully insert the blade and lock it to the shelf by squeezing the lever and the latch together and turning the handles towards the faceplate. If your shelf is powered on, as soon as the blade is connected to the backplane power pins, the blue LED is illuminated. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 59: Removing The Blade

    Before touching the blade or electronic components, make sure that you are working in an ESD-safe environment. Blade Malfunctioning Incorrect blade installation and removal can result in blade malfunctioning. When plugging the blade in or removing it, do not press on the faceplate but use the handles. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 60 Wait until the blue LED is permanently illuminated, before removing the blade. 3. Remove the faceplate cables, if applicable. 4. Rotate handle of the faceplate until the blade is detached from the shelf. 5. Remove the blade from the shelf. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 61: Controls, Indicators, And Connectors

    Serial console port to connect to either payload or IPMC serial I/F  Out of Service, In Service, Attention, User (U1, U2, U3 LEDS) and Hot Swap LEDs (IPMC  control) Two Ethernet ports  Recessed reset button  ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 62: Faceplate Leds

    Controls, Indicators, and Connectors Figure 3-1 Faceplate LEDs ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 63 The two LEDs are for the base Ethernet interface and are multiplexed with U1 and U2 using the signal FP_BASE_LED_EN_N signal controlling from FPGA. U1, U2, U3 User LED Red: user defined LED by FPGA register 0x57  ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 64: Connectors

    The "Out of service", "In Service" and "Attention" LEDs are directly controlled by IPMC. A higher application software can issue "set/get FRU LED state" command to the IPMC to access them. Connectors 3.2.1 Faceplate Connectors Table 3-2 RJ45 Console Connector Pinout Signal ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 65: Backplane Connectors

    IPMB Data Port A IPMC ISC PC5 IPMB Clock Port B IPMC ISC PC4 IPMB Data Port B 17 - 24 Not used Not used Shelf Ground Shelf Ground Logic Ground Logic Ground Power Building Block Enable B ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 66: Table 3-5 Zone 2 Connector J20 Pin Assignment

    F2[2]_RX- F2[3]_TX+ F2[3]_TX- F2[3]_RX+ F2[3]_RX- Fabric Channel 2 F2[0]_TX+ F2[0]_TX- F2[0]_RX+ F2[0]_RX- F2[1]_TX+ F2[1]_TX- F2[1]_RX+ F2[1]_RX- Fabric Channel 1 F1[2]_TX+ F1[2]_TX- F1[2]_RX+ F1[2]_RX- F1[3]_TX+ F1[3]_TX- F1[3]_RX+ F1[3]_RX- F1[0]_TX+ F1[0]_TX- F1[0]_RX+ F1[0]_RX- F1[1]_TX+ F1[1]_TX- F1[1]_RX+ F1[1]_RX- ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 67: Table 3-7-7 Zone 3-7 Connector J3-70 Pin Assignment

    PCIE_CPU1_T RX4+ RX4- TX4+ TX4- RX5+ _RX5- PCIE_CPU1_ PCIE_CPU1_ PCIE_CPU1_ PCIE_CPU1_ PCIE_CPU1_ PCIE_CPU1 PCIE_CPU1_T PCIE_CPU1_T RX6+ RX6- TX6+ TX6- RX7+ _RX7- PCIE_CPU1_ PCIE_CPU1_ PCIE_CPU1_ PCIE_CPU1_ PCIE_CPU1_ PCIE_CPU1 PCIE_CPU1_T PCIE_CPU1_T RX8+ RX8- TX8+ TX8- RX9+ _RX9- ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 68: Table 3-9 Zone 3 Connector J32 Pin Assignment

    PCIE7_RP[3] PCIE7_RN[3] PCIE7_TP[3] PCIE7_TN[3] PCIE PCIE6_RP[0] PCIE6_RN[0] PCIE6_TP[0] PCIE6_TN[0] PCIE6_RP[1] PCIE6_RN[1] PCIE6_TP[1] PCIE6_TN[1] Port6 PCIE6_RP[2] PCIE6_RN[2] PCIE6_TP[2] PCIE6_TN[2] PCIE6_RP[3] PCIE6_RN[3] PCIE6_TP[3] PCIE6_TN[3] PCIE PCIE9_CLKP PCIE9_CLKN PCIE8_CLKP PCIE8_CLKN PCIE7_CLKP PCIE7_CLKN PCIE6_CLKP PCIE6_CLKN V12P V12P V12P PS0_N ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 69: Mezzanine Card Connector

    CRU_Refclk_P PCIe_refclk_N PCIe_refclk_P PCIe_TX1_N PCIe_TX1_P PCIe_TX0_N PCIe_TX0_P PCIe_RX1_N PCIe_RX1_P PCIe_RX0_N PCIe_RX0_P PCIe_TX3_N PCIe_TX3_P PCIe_TX2_N PCIe_TX2_P PCIe_RX3_N PCIe_RX3_P PCIe_RX2_N PCIe_RX2_P PCIe_TX5_N PCIe_TX5_P PCIe_TX4_N PCIe_TX4_P PCIe_RX5_N PCIe_RX5_P PCIe_RX4_N PCIe_RX4_P PCIe_TX7_N PCIe_TX7_P PCIe_TX6_N PCIe_TX6_P PCIe_RX7_N PCIe_RX7_P PCIe_RX6_N PCIe_RX6_P ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 70 Controls, Indicators, and Connectors Table 3-10 Mezzanine Card Connector Signals (continued) Signal Signal Signal Signal RESET_N PRSNT_N PWR_EN PWR_GD VCC12 VCC12 VCC3V3 VCC3V3 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 71: Onboard Connectors

    One TPM head is installed on the board and can be used for a Port 80 card for debug monitor. It can also be reserved for a TPM module customization. The head pin pitch is 2.54 mm. Figure 3-2 TPM Connector Pinout ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 72: Fpga Jtag Head

    Its pin 1 is clearly marked on the PCB and by default are "OFF". 3.3.1 PCH Switch Table 3-11 Switch SW2 Settings Switch Function Default SW2.1 GPIO6 ON: Load default BIOS setting SW2.2 GPIO7 ON: BIOS Crisis Recovery ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 73: Fpga Switch

    FPGA through cable, the IPMC should be in reset state. S7.2 FPGA image flash BANK selection when using cable to download FPGA image ON: select recovery BANK (U150) OFF: select default BANK (U151) ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 74 Controls, Indicators, and Connectors ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 75: Bios

    The BIOS complies with the following specifications: UEFI Specification 2.0  Plug and Play BIOS Specification 1.0A  PCI BIOS Specification 2.1  SMBIOS Specification 2.3  BIOS Boot Specification 1.01  PXE 2.1  ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 76: Update And Recovery

    4.1.1 Update and Recovery The ATCA-7370 has two different ways to update the BIOS. Flash tool (FCU and ipmitool in Linux). Used for normal upgrade mode.  USB CD-ROM or USB flash device. This is used in BIOS recovery modes.

  • Page 77: Dram Support

    ECC. – ECC Error Report Support: ATCA-7370 supports ECC error reporting. When an ECC error occurs, the memory controller hardware increments an ECC error count and triggers the SMI interrupt to let BIOS or OS handle the ECC error.
  • Page 78 Given a dual rank DIMM and if all the 10 errors occur in one single rank i.e. either rank 0 or rank 1 DIMM, then an ECC event is recorded. Available memory space below the 4G boundary - The ATCA-7370 provides 3.25 GB ...

  • Page 79: Interrupt Routing

    4.1.5 I/O Device Configuration 4.1.5.1 Serial Ports The ATCA-7370 supports two serial ports in OS, but supports only one serial port for console redirection in BIOS. The default value is 3F8h/IRQ4. 4.1.5.2 Integrated SATA Controller The BIOS provides setup items to configure the embedded serial ATA controller for debugging purposes.

  • Page 80: Boot Options

    4.1.6 Boot Options The ATCA-7370 supports BIOS Boot Specification 1.01. The BIOS identifies all IPL (BAID, BEV) devices and BCV devices (hard drives, USB sticks) in the system and will attempt to boot them in the order specified in startup.

  • Page 81: Network Boot

    BIOS The ATCA-7370 supports four SAS ports. Two local SAS ports are located in the RTM module, the other two SAS ports are connected to the external ports of the RTM. The SAS physical port number is assigned as follows: P0 - Local SAS 1 which is far from RTM zone 3 connector ...

  • Page 82: I/O Redirection

    BIOS uses serial port 1 for SOL function. The further steps to initialize SOL is done by IPMC. 4.1.10 IPMI Support The ATCA-7370 BIOS provides the following IPMI support. Checks if the IPMI controller is active. If not, it will display an appropriate error message.

  • Page 83: Watchdogs

    The only supported interface is Keyboard Controller Style (KCS). The IPMI base address and interrupt is provided to OS via SMBIOS structure type38 and is tested with Linux OpenIPMI driver. 4.1.10.1 Watchdogs The watchdogs in ATCA-7370 are implemented by BMC watchdog. BIOS uses BMC watchdog in two phases. BIOS phase ...

  • Page 84: Led Behavior During Post

    The ATCA-7370 supports three external 2.0 ports. All USB ports support low-speed, full-speed and high-speed using the USB 2.0 Enhanced Host Controller Interface (EHCI). 4.1.15 Supported Operating Systems The following operating systems are supported by the ATCA-7370. DOS is used for debugging. WRS PNE LE 4.3 Linux and higher ...

  • Page 85: Spi Boot Flash

    9600 bps, 8 data bits, no parity, 1 stop bits, no flow control. The BIOS printout does not cause any significant delay to boot up. Default terminal emulation is VT-100. The ATCA-7370 vendor, Phoenix, specifies and documents the terminal hot keys and keystroke mapping for VT-100, ANSI and VT-UTF8.

  • Page 86: Bios Interface Towards Os

    It supports the following options. Table 4-3 BIOS CLI Tool - IPMIBPAR Option Description Enable debug output -a xx IPMB Address, if not present local IPMC is used Get device ID Get IPMI Boot Parameter USER area ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 87: Setup Utility

    Menu Options Main Provides system information, date, and time Advanced Advanced features including Boot, Processor, Peripheral, USB, Memory, South Bridge and SMBIOS event log settings. Security Supervisor and User password options. Boot Boot priority order. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 88 When you are in a submenu, The Esc key allows you to exit to the upper menu. Function When other function keys become available, they are displayed at the right of the screen keys along with their intended function. General Help Load Optimized Defaults Save ESC and Exit ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 89: Main Menu

    Press the <Tab> key to move from hour to minute, minute to second, month to day, or day to year. There is no default value. System Information Gives the BIOS version, CPU type, memory type size, etc., ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 90: Advanced Menu

    Set hard drive and controller configuration. See section Configuration. Memory Configuration Displays and provides options to change the memory settings. See section Memory Configuration. South Bridge Configuration Set south bridge configuration. See section South Bridge Configuration. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 91: Boot Configuration

    Long or noisy lines may require lower speeds. Options: 9600, 19200, 38400, 57600 and 115200. Default is 9600. Front Network Boot Controls execution of the Option ROM for the Front Panel Ethernet controller. Options: Disabled and Enabled. Default is Disabled. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 92 Enable or Disable O/S Watchdog Timer. It is not available if the O/S Watchdog is disabled. Options: Disabled and Enabled. Default is Disabled. O/S Boot Watchdog Timeout Choose Timeout value for O/S Boot Watchdog Timer. Range: 180 ~ 6000. Default is 300. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 93: Processor Configuration

    Default is Enabled. Intel(R) SpeedStep(tm) Enable processor performance states (P-States). Options: Disabled and Enabled. Default is Enabled. Turbo Mode Enable Processor Turbo Mode. TM must also be enabled. Options: Disabled and Enabled. Default is Disabled. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 94: Peripheral Configuration

    Serial ATA Port 1 / Hard Disk 1 Displays the identity of the device attached. Serial ATA Port 2 / Hard Disk 2 Displays the identity of the device attached. SAS HDD 1 Displays the identity of the device attached. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 95: Memory Configuration

    Select ECC Runtime errors type to be logged in SMBIOS event log. Select type include Correctable Error (CE), Uncorrectable Error (UC), both CE and UC error (Both). Options: Disabled, CE, UC, and Both. Default is Both. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 96: South Bridge Configuration

    Default is Enabled. USB2 Control Enable or disable Front Panel USB port 2. Options: Disabled and Enabled. Default is Enabled. RTM USB Control Enable or disable RTM USB port. Options: Disabled and Enabled. Default is Enabled. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 97: Smbios Event Log

    Option: Disabled and Enabled. Default is Enabled. View SMBIOS event log View SMBIOS event log. Mark SMBIOS events as Mark SMBIOS events as read. Marked SMBIOS events will not be displayed. read Clears SMBIOS events Clears SMBIOS events. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 98: Security Menu

    4.2.3 Security Menu Figure 4-3 shows the Security Menu options. Figure 4-3 Security Menu Table 4-16 Security Menu Description Field Description Set Supervisor Password Set Setup Supervisor Password. Set User Password Set Setup User Password. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 99: Boot Menu

    Sets the order of the USB HDD devices in USB group. SAS HDD Drive Sets the order of the SAS HDD devices in SAS HDD group. SATA HDD Drive Sets the order of the SATA HDD devices in SATA HDD group. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 100: Save And Exit Menu

    Table 4-18 Save and Exit Menu Description Field Description Exit Saving Changes This option is same as pressing <F10> key. Saves all changes of all menus, then exits the setup configure driver. The option finally resets the system automatically. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 101 This option is same as pressing <F9> key. Loads standard default values. Discard Changes Loads the original value of the boot time, but does not load the default setup value. Save Changes Saves all changes of all menus, but does not reset the system. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 102 BIOS ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 103: Functional Description

    IPMB-B Note: On the single processor variant the processor and its DIMM sockets are populated on the upper side of the board. Components associated with the second processor are not populated on this product variant. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 104: Processor

    PCIe Note: On the single processor variant the processor and its DIMM sockets are populated on the upper side of the board. Components associated with the second processor are not populated on this product variant. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 105: Memory

    Controller (IMC). Each IMC supports four independent 72-bit (64-bit Data + 8-bit ECC) wide DDR3 memory channels. ATCA-7370 supports one VLP DIMM sockets for each memory channel resulting in a total of eight DDR3 DIMM sockets. Supported DDR3 speeds are DDR3-800, DDR3-1066, DDR3-1333 and DDR3-1600. DDR3 signaling voltage level is 1.35 V/1.5 V.

  • Page 106: Figure 5-3 Pch Block Diagram

    Functional Description The following figure shows the I/O functions provided by C604 chipset and those used on ATCA-7370/ATCA-7370-S. Figure 5-3 PCH Block Diagram ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 107: Ethernet Ports

    5.6.1 ATCA 3.0 Base Interface The dual Base interface of the ATCA-7370 Node board is from two ports of Intel I350 quad ports Gigabit Ethernet Controller. The device offers quad 10/100/1000Base-T and quad 1000Base-X interfaces. A serial EEPROM is used for storage of configuration parameters such as the MAC addresses.

  • Page 108: Update Channel Ethernet

    Functional Description 5.6.4 Update Channel Ethernet The ATCA-7370 supports one Gigabit Ethernet on update channel on P20 of Zone2 connector. It uses SerDes interface and occupies the port 0 of update channles. Storage ATCA-7370 supports the following types of storage: Front panel USB DISK (up to two ports) ...

  • Page 109: Serial Redirection

    Intel C604 chipset includes a six port serial ATA controller compliant to SATA 2.0 specification. All ports can support data transfer rate of 3.0Gbps, and two ports (Port0 and Port1) can support SATA 3.0, 6.0Gbps. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 110: Ipmi Over Lan

    The C604 chipset provides internal USB1.1/ USB 2.0 host controllers with up to 14 USB2.0 ports. Two ports are routed to the faceplate, one port is routed to the RTM on ATCA-7370. The ports available at the faceplate are routed to a dual stacked connector. The ports are USB 2.0 compliant.

  • Page 111: Smbus Connections

    Functional Description 5.14 SMBus Connections The following figure shows the overall SMBus connections on ATCA-7370. Figure 5-4 Overall SMBus Connections Note: On the single processor variant the processor and its DIMM sockets are populated on the upper side of the board. Components associated with the second processor are not populated on this product variant.

  • Page 112: Glue Logic Fpga

    LPC interface under PCH for internal register access  SPI Interface under IPMC for internal register and BIOS access  Reset control logic  Interruption control logic  BIOS bank selection control  Dual UART controller with routing control  ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 113: Maps And Registers

    Maps and Registers Interrupt Structure The ATCA-7370 supports NON-APIC (legacy PIC Mode) and APIC mode of Interrupt delivery to the CPUs. The 8259 PIC mode interrupt concentrator supports 16 interrupts (8 external signal inputs). The IO-APIC device supports 24 interrupt sources. In APIC mode the C604 chipset supports only Front side bus interrupt delivery (not the serial APIC mode).

  • Page 114: Table 6-1 Interrupt Source Signals List

    This signal route to IPMC interrupt to process board insertion or removing event. SoL I2C SoL_ALERT_N SoL message interrupt to IPMC PCIE devices PCIE endpoint Devices such as 82599, I350 use MSI in- band interrupt mode. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 115: Pic (Non-Apic) D31:F0 Interrupt Mapping

    (HPET) PS/2 Mouse IRQ12 via SERIRQ, SCI, TCO, or PIRQ# or Timer#3 (HPET) Internal State Machine output based on processor FERR# assertion. May optionally be used for SCI or TCO interrupt if FERR# not needed. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 116: Apic (D31:F0) Interrupt Mapping

    IRQ0, IRQ2, IRQ8#, and IRQ13. 6.1.2 APIC (D31:F0) Interrupt Mapping Table 6-3 APIC Mode Interrupt Mapping Interrupt Source Notes Cascade from 8259 1 8254 Counter 0, Timer 0 (legacy mode) RTC, Timer 1 (legacy mode) ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 117 In APIC mode, the PCI Interrupts A:H are mapped to IRQ[16:23]. When programming the polarity of internal interrupt sources on the APIC, interrupts 0 through 15 receive active-high internal interrupt sources; interrupts 16 through 23 receive active-low internal interrupt sources. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 118: Non-Maskable Interrupt Generation

    Purpose input and routed as NMI (by GPIO_ROUT at Device 31: Function 0 Offset B8) The GPIO[15:0] can generate NMI. On the ATCA-7370, the GPIO3 of PCH connects to the FPGA. The IPMC can request an NMI interrupt through controlling the GPIO3 of PCH connect to FPGA.
  • Page 119 This register is set by hardware once operation is complete. Bit is cleared by hardware when a new operation is enabled. An SMI is generated when this bit is set due to a sparing copy completion event. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 120: Registers

    Table 6-7 "Register Access Type" Table 6-7 "Register Access Type" are used. Table 6-6 Register Default Default Description Not applicable or undefined 0 or 1 Default value after RST_N is valid or after PCH_PLTRST deassertion. Undef. Undefined value ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 121: Register Decoding

    IPMC SPI interface 6.2.1 Register Decoding The FPGA registers may be accessed from the host or the IPMI. For the host, the LPC bus interface is used. The IPMC uses an SPI interface. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 122: Lpc Decoding

    All LPC I/O accesses to the address range REGISTERS are decoded by the LPC core. 6.2.1.1.2 LPC Memory Decoding The LPC interface never responds to LPC Memory accesses. 6.2.1.1.3 LPC Firmware Decoding The LPC interface never responds to LPC Firmware accesses. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 123: Spi Register Decoding

    The IPMC may read the POST code using the SPI interface (with the signal BMC_SPI_S0_N asserted) and the SPI address 0x7F. Table 6-10 POST Code Register LPC I/O Address: 0x80 IPMC SPI Address: 0x7f Description Default Access POST codes from host LPC: r/w IPMC: r ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 124: Super Io Configuration Register

    2. Write 86H to Configuration Index Port. 6.2.3.2 Exiting the Configuration State The device exits the configuration state by the following contiguous sequence: 1. Write 68 to Configuration Index Port. 2. Write 08 to Configuration Index Port ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 125: Configuration Mode

    The DATA PORT is then used to access the selected register. These registers are accessible only in the Configuration Mode. Table 6-13 Global Configuration Register Summary Index Address Description 0x07 Super IO Logical Device Number 0x20 Super IO Device ID 0x21 Super IO Device Revision ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 126: Table 6-14 Super Io Logical Device Number Register

    Default Access Device Revision 0x01 LPC: r Table 6-16 Super IO LPC Control Register Index Address: 0x28 Description Default Access LPC Bus Wait States: LPC: r 1: Long wait states (sync 6) Reserved LPC: r ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 127: Table 6-17 Global Super Io Serirq And Pre-Divide Control Register

    Configuration state. Table 6-18 Logical Device Configuration Register Summary Index Address Description 0x30 Enable 0x60 Base IO Address MSB 0x61 Base IO Address LSB 0x70 Primary Interrupt Select 0x74 Reserved ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 128: Table 6-19 Logical Device Enable Register

    Table 6-21 Logical Device Base IO Address LSB Register Index Address: 0x61 Description Default Access Bits 0 to 2 are read only. Decode is on 8 Byte LPC: r boundary. Logical Device Base IO Address LSB. (Bits 3 to LPC: r/w ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 129: Table 6-22 Logical Device Common Decode Ranges

    LPC: r/w 0x0: no interrupt selected 0x1: IRQ1 0x2: IRQ2 0x3: IRQ3 0x4: IRQ4 0x5: IRQ5 0x6: IRQ6 0x7: IRQ7 0x8: IRQ8 0x9: IRQ9 0xA: IRQ10 0xB: IRQ11 0xC: IRQ12 0xD: IRQ13 0xE: IRQ14 0xF: IRQ15 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 130: Table 6-24 Logical Device 0X74 Reserved Register

    LPC: r Table 6-25 Logical Device 0x75 Reserved Register Index Address: 0x75 Description Default Access Reserved 0x04 LPC: r Table 6-26 Logical Device 0xF0 Reserved Register Index Address: 0xF0 Description Default Access Reserved LPC: r ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 131: Uart1 And Uart2 Register Map

    Base + 5 Line Status Register (LSR). Read Only Base + 6 Modem Status Register (MSR). Read Only Base + 7 Scratch Pad Register (SCR). Base Divisor Latch LSB (DLL) Base + 1 Divisor Latch MSB (DLM) ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 132: Uart Registers Dlab=0

    Transmitter Holding register (THR) Undef. LPC: w Writing to THR while in FIFO mode puts THR to the top. The data at the bottom of the FIFO is loaded to the shift register when it is empty. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 133: Interrupt Enable Register (Ier)

    Receiver line status interrupt enable/disable LPC: r/w 1: receiver line status interrupt enabled 0: receiver line status interrupt disabled Modem status interrupt enable/disable: LPC :r/w 1: modem status interrupt enabled 0: modem status interrupt disabled Reserved LPC: r ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 134: Interrupt Identification Register (Iiir)

    11: Receiver line status 10: Receiver data available 01: Transmitter holding register empty 00: Modem status Time Out Detected: LPC: r 0: No time out interrupt is pending 1: Character time-out indication (FIFO mode only) ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 135: Table 6-33 Interrupt Identification Register Decode

    0b0010 Transmit Non-FIFO mode: Transmit Reading the IIR Register (if FIFO Data Holding Register Empty the source of the interrupt) or Request writing into the Transmit Holding Register. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 136: Fifo Control Register (Fcr)

    0: No effect Transmit FIFO reset: LPC: w 1: Bytes in receiver FIFO and counter are reset. Shift register is not reset (bit is self- clearing) 0: No effect Receiver/Transmitter ready. Not supported. LPC: w ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 137: Line Control Register (Lcr)

    Stop bit length: LPC: r/w 1: 1.5 stop bits for 5 bit WORD length 1: 2 stop bits for 6, 7, and 8 bit WORD length 0: 1 stop bit for any serial character WORD length ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 138 TXD is forced to the spacing (cleared) state. When bit 6 is cleared, the break condition is disabled and has no affect on the transmitter logic. It only effects TXD: 1: Break condition enabled 0: Break condition disabled ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 139: Modem Control Register (Mcr)

    1: OUT1# output in high state 0: OUT1# output in low state Not supported User output control signal (OUT2#): LPC: r/w 1: OUT2# output in high state 0: OUT2# output in low state Not supported ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 140: Line Status Register (Lsr)

    Bits one through four are the error conditions that produce a receiver line status interrupt when any of the corresponding conditions are detected and the interrupt is enabled. These bits are not cleared by reading the erroneous byte from the FIFO or receive buffer. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 141: Table 6-37 Line Status Register (Lsr)

    An overrun error is indicated to the CPU as soon as it happens. The character in the shift register is overwritten but it is not transferred to the FIFO: 1: Overrun error occurred 0: No overrun error ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 142 To accomplish this, it is assumed that the framing error is due to the next start bit. The ACE samples this start bit twice and then accepts the input data: 1: Framing error occurred 0: No framing error ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 143 THR by the CPU. In the FIFO mode, THRE is set when the transmit FIFO is empty; it is cleared when at least one byte is written to the transmit FIFO: 1: THR/Transmit FIFO empty 0: THR/Transmit FIFO contains data ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 144: Modem Status Register (Msr)

    Modem Status register provide change information. Bits 03:00 are set to a logic 1 when a control input from the Modem changes state. They are reset to logic 0 when the processor reads the Modem Status register. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 145: Table 6-38 Modem Status Register (Msr)

    TERI indicates that the RI# input to the chip has changed from a low to a high level. When TERI is set and the modem status interrupt is enabled, a modem status interrupt is generated. Not supported. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 146 Complement of the data carrier detect Ext. LPC: r (DCD#) input When the ACE is in the diagnostic test mode (LOOP [MCR4] = 1), this bit is equal to the MCR bit 3 (OUT2#). Not supported. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 147: Scratch Register (Scr)

    The baud rate of the data shifted in/out of the UART is given by: Baud Rate = UART_CLK / (16X Divisor) For example, if the pre-divider is 26 the UART_CLK is 1.8461538MHz. When the divisor is 12, the baud rate is 9600. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 148: Fpga Register Mapping

    0x600 and add the Address Offset. An LPC I/O write-access to an address not listed in this table or marked with a "-" in the LPC I/O column is ignored. A corresponding read access delivers always zero. Note: LPC I/O Address = 0x600 + Address Offset ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 149: Ipmc Spi Register Map

    Payload Reset Source for IPMC Register 0x15 Payload Reset Source for BIOS Register 0x16 Payload Reset Source for OS Register 0x17 IPMC Watchdog Timeout Register For LPC I/O access, add the LPC I/O Base Address 0x600 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 150 Debug Switch and LED Status Register 0x5A CPU Error Status Register 0x5B Cave Creek Module Status and Control Register 0x5C ACPI Status and Control Register For LPC I/O access, add the LPC I/O Base Address 0x600 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 151: Module Identification Register

    IPMC Scratch Register 1. 0x7F POST Code Register For LPC I/O access, add the LPC I/O Base Address 0x600 6.3.3 Module Identification Register The Module Identification Registers identifies the ATCA-7370. Table 6-43 Module Identification Register Address Offset: 0x00 Description Default Access...

  • Page 152: Version Register

    0: COM1 not used for serial redirection IPMC: r 1: COM1 used for serial redirection COM2 use for serial redirection LPC: r/w 0: COM2 not used for serial redirection IPMC: r 1: COM2 used for serial redirection Reserved ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 153: Serial Over Lan (Sol) Control Register

    00: COM1 to Faceplate and COM2 to RTM IPMC: r/w 01: COM1 to RTM and COM2 to Faceplate LPC: r 10: BMC to Faceplate and COM2 to RTM 11: BMC to Faceplate and COM1 to RTM ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 154: Ipmc Power Level Register

    IPMC Power Level. IPMC writes a value, which 0x00 IPMC: r/w represents a defined power level. LPC: r Whenever the IPMC writes and data into this register, it should also produce an 8 ms negative pulse on FPGA_PCH_GPIO5 to notify payload. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 155: Payload Power Control Register

    0: Payload power off Reserved 6.3.10 I2C Switch Control Register Table 6-50 I2C Switch Control Register Address Offset: 0x08 Description Default Access FPGA_SPD_MUX_S[0] IPMC: r/w LPC: r FPGA_SPD_MUX_S[1] IPMC: r LPC: r/w FPGA_PCH_I2C_SEL IPMC: r/w LPC: r Reserved ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 156: Payload Power-Button Register

    Address Offset: 0x0F Description Default Access Reserved Reserved Enable front board push button reset LPC: r/w payload IPMC: r 1: enabled 0: disabled Enable IPMC reset payload LPC: r 1: enabled IPMC: r/w 0: disabled ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 157: Reset Function Register

    If a cold-reset is on going, a warm-reset request will be ignored. Table 6-53 Reset Function Register Address Offset: 0x10 Description Default Access Reserved Reserved Select the function of front board push LPC: r/w button payload request IPMC: r 1: Warm-reset 0: Cold-reset ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 158: Ipmc Reset Payload Request Register

    If related bit in Reset Mask Register is high, a warm or cold reset will occur basing on Reset Function Register bit. Table 6-54 IPMC Reset Payload Request Register Address Offset: 0x11 Description Default Access Writing magic word 0x55 will cause a reset IPMC: w request ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 159: Bios Reset Payload Request Register

    Reset Mask Register is high, a warm o cold reset will occur based on the reset function register bit. Table 6-56 OS Reset Payload Request Register Address Offset: 0x13 Description Default Access Writing magic word 0x5A will cause a reset LPC: w request ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 160: Payload Reset Source For Ipmc Register

    The same situation will happen if two reset sources go active at the same time. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 161: Payload Reset Source For Os Register

    The same situation will happen, if two reset sources go active at the same time. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 162: Table 6-59 Payload Reset Source For Os Register

    RTM push button reset payload request LPC: r/w1c 1: Reset occurred FPGA Watchdog reset payload request LPC: r/w1c 1: Reset occurred BIOS reset payload request LPC: r/w1c 1: Reset occurred OS reset payload request LPC: r/w1c 1: Reset occurred ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 163: Ipmc Watchdog Timeout Register

    Table 6-61 IPMC Watchdog Timeout for BIOS Register Address Offset: 0x18 Description Default Access IPMC Watchdog Timeout LPC: r/w1c 1: IPMC Watchdog Timeout occurred IPMC Watchdog Pre-Timeout LPC: r/w1c 1: IPMC Watchdog Pre-Timeout occurred Reserved 000000 LPC: r ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 164: 11Ipmc Watchdog Timeout For Os Register

    Watchdog will be cleared during power-up reset and cold reset. Table 6-63 FPGA-Payload-Watchdog Threshold Low-byte Register Address Offset: 0x1A Description Default Access Low byte of timeout threshold for FPGA- 0xFF LPC: r/w Payload-Watchdog, unit is one msec ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 165: 13Fpga Payload Watchdog Clear Register

    Writing and other data will enable and restart the FPGA- IPMC-Watchdog. Table 6-65 FPGA-IPMC-Watchdog Threshold Register Address Offset: 0x1F Description Default Access Timeout threshold the 'FPGA-IPMC- IPMC: r/w Watchdog', unit is one second. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 166: Flash Control Register

    1: Recovery Boot Flash linked to PCH, Default one to IPMC 6.3.14 RTM Status and Control Register Table 6-67 RTM Status and Control Register Address Offset: 0x4A Description Default Access RTM_PS1_N Ext. RTM_ALL_PG Ext. RTM_MP_PG Ext. RTM_PP_PG Ext. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 167: Blue Led Status And Control Register

    0: Software control Blue LED with bit1~0 IPMC: r/w setting in this register. 1: FPGA control Blue LED according to handle status (long blinking if handle is closed or solid on if it is open). Reserved 00000 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 168: User Led Status And Control Register

    Control user LED #2 red color output Signal LPC: r/w LED_USER2_RED_N: IPMC: r 0: LED_USER2_RED_N is driven high. 1: LED_USER2_RED_N is driven low. Control BI LED enable output Signal LED_BI_EN_N: 0: LED_BI_EN_N is driven high. 1: LED_BI_EN_N is driven low. Reserved ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 169: Miscellaneous Status And Control Register

    Note: FPGA_PCH GPIO3 signal will also be controlled by warm-reset procedure 6.3.18 Debug Switch and LED Status Register Table 6-71 Debug Switch and LED Status Register Address Offset: 0x59 Description Default Access DBG_SW[3:0] Ext. FPGA_DBG_LED_N[3:0] Ext. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 170: Scratch Register

    Table 6-73 POST Code Register Address Offset: 0x7F Description Default Access POST codes from host 0x00 IPMC: r Standard Status Codes Table 6-74 Component Status Codes Status Code Code Symbol 0x20 POSTCODE_CC_VARIABLE_SERVICES 0x21 POSTCODE_CC_KEYBOARD_CONTROLLER 0x22 POSTCODE_CC_BOOT_MODE 0x23 POSTCODE_CC_S3_SUPPORT ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 171 POSTCODE_CC_INTERRUPT_CONTROLLER 0x2E POSTCODE_CC_DIAGNOSTIC_SUMMARY 0x2F POSTCODE_CC_SMBIOS 0x30 POSTCODE_CC_SMM_COMMUNICATION 0x31 POSTCODE_CC_SMM_RUNTIME 0x32 POSTCODE_CC_SMM_SERVICES 0x33 POSTCODE_CC_FIRMWARE_DEVICE 0x34 POSTCODE_CC_CAPSULE_SERVICES 0x35 POSTCODE_CC_MONOTONIC_COUNTER 0x36 POSTCODE_CC_SMBIOS_EVENT_LOG 0x37 POSTCODE_CC_RTC 0x38 POSTCODE_CC_BOOT_MANAGER 0x39 POSTCODE_CC_VGA 0x3A POSTCODE_CC_HII_FORMS_BROWSER 0x3B POSTCODE_CC_BOOT_MENU 0x3C POSTCODE_CC_USER_MANAGER 0x3D POSTCODE_CC_TIMER 0x3E POSTCODE_CC_PCI_BUS ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 172 POSTCODE_CC_EHCI 0x49 POSTCODE_CC_XHCI 0x4A POSTCODE_CC_UHCI 0x4B POSTCODE_CC_OHCI 0x4C POSTCODE_CC_USB_KEYBOARD 0x4D POSTCODE_CC_USB_MOUSE 0x4E POSTCODE_CC_USB_MASS_STORAGE 0x4F POSTCODE_CC_CONSOLE_SPLITTER 0x50 POSTCODE_CC_GRAPHICS_CONSOLE 0x51 POSTCODE_CC_SERIAL_CONSOLE 0x52 POSTCODE_CC_TEXT_CONSOLE 0x53 POSTCODE_CC_DISK_IO 0x54 POSTCODE_CC_PARTITION 0x55 POSTCODE_CC_SETUP 0x56 POSTCODE_CC_LEGACY_BIOS 0x57 POSTCODE_CC_BLOCK_IO_THUNK 0x58 POSTCODE_CC_CRYPTO 0x59 POSTCODE_CC_XHCI_RESET ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 173: Table 6-75 Progress Status Codes

    0xD1 POSTCODE_CC_FLASH_CONTROLLER 0xD2 POSTCODE_CC_FLASH_DEVICE 0xD3 POSTCODE_CC_FINGERPRINT_SENSOR 0xD4 POSTCODE_CC_CLOCK_CONTROLLER 0xD5 POSTCODE_CC_EMBEDDED_CONTROLLER 0xD6 POSTCODE_CC_SERIAL_CONTROLLER Table 6-75 Progress Status Codes Status Code Code Symbol 0x01 POSTCODE_PC_COMP_PEI_BEGIN 0x02 POSTCODE_PC_COMP_PEI_END 0x03 POSTCODE_PC_COMP_DXE_BEGIN 0x04 POSTCODE_PC_COMP_DXE_END 0x05 POSTCODE_PC_COMP_SUPPORTED 0x06 POSTCODE_PC_COMP_START 0x07 POSTCODE_PC_COMP_STOP ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 174: Table 6-76 Architectural Status Codes

    Status Code Code Symbol 0xE0 POSTCODE_PC_SEC_ENTRY 0xE1 POSTCODE_PC_SEC_EXIT 0xE2 POSTCODE_PC_PEI_ENTRY 0xE3 POSTCODE_PC_PEI_EXIT 0xE4 POSTCODE_PC_IPL_DXE 0xE5 POSTCODE_PC_IPL_S3 0xE6 POSTCODE_PC_S3_OS 0xE7 POSTCODE_PC_IPL_RECOVERY 0xE8 POSTCODE_PC_IPL_EXIT 0xE9 POSTCODE_PC_DXE_ENTRY 0xEA POSTCODE_PC_DXE_EXIT 0xEB POSTCODE_EC_PEI_MEMORY 0xEC POSTCODE_EC_PEI_IPL 0xED POSTCODE_EC_IPL_DXE 0xEE POSTCODE_EC_IPL_PPI 0xEF POSTCODE_EC_DXE_ARCH ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 175: Serial Over Lan

    Installing the ipmitool You can download the open source tool ipmitool from http://ipmitool.sourceforge.net (at the time of publishing this manual the current version is 1.8.11). Documentation for this tool is also available on this site. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 176: Configuring Sol Parameters

    You can use standard IPMI commands or the ipmitool to modify the parameters. 7.3.1 Using Standard IPMI Commands This example shows how to set up the SOL configuration parameter with standard IPMI commands. Ipmicmd is used on the local IPMC and the IP is configured. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 177: Using Ipmitool

    SOL session for base 1(channel 1) and base 2(channel 2): root@localhost:~# ipmitool lan print 1 Set in Progress : Set Complete Auth Type Support Auth Type Enable : Callback : : User : Operator : : Admin ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 178 : User : Operator : : Admin : OEM IP Address Source : Unspecified IP Address : 172.17.1.220 Subnet Mask : 255.255.0.0 MAC Address : 00:00:00:00:00:00 Default Gateway IP : 172.17.0.1 Default Gateway MAC : 00:00:00:00:00:00 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 179: Establishing A Sol Session

    2. Compile and install the ipmitool on your target which is destined for opening the SOL session on the ATCA-7370. For details refer to Installing the ipmitool on page 175. 3. Apply an IP address to the ATCA-7370 SOL interface. For details refer to Configuring SOL Parameters on page 176.
  • Page 180 Serial Over LAN 6. Start ATCA-7370 SOL session on your target with the ipmitool and the configured IP address for the ATCA-7370 SOL interface. ipmitool -C 1 -I lanplus -H 172.16.0.221 -U soluser -P solpasswd -k gkey sol activate For details on the command parameters, refer to the ipmitool documentation available on http://ipmitool.sourceforge.net.

  • Page 181: Supported Ipmi Commands

    Set BMC Global Enables 0x06/0x07 0x2E Get BMC Global Enables 0x06/0x07 0x2F Clear Message Flags 0x06/0x07 0x30 Get Message Flags 0x06/0x07 0x31 Get Message 0x06/0x07 0x33 Send Message 0x06/0x07 0x34 Set Channel Access 0x06/0x07 0x40 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 182: Bmc Watchdog Commands

    2 sensor. The options of pre-timeout and power-cycle are not supported. Table 8-3 Supported Watchdog Commands Command NetFn (Request/Response) Reset Watchdog Timer 0x06/0x07 0x22 Set Watchdog Timer 0x06/0x07 0x24 Get Watchdog Timer 0x06/0x07 0x25 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 183: Sel Device Commands

    Set SEL Time 0x0A/0x0B 0x49 8.1.5 FRU Inventory Commands Table 8-5 Supported FRU Inventory Commands Command NetFn (Request/Response) Get FRU Inventory Area Info 0x0A/0x0B 0x10 Read FRU Data 0x0A/0x0B 0x11 Write FRU Data 0x0A/0x0B 0x12 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 184: Sensor Device Commands

    0x2D Get Sensor Type 0x04/0x05 0x2F 8.1.7 Chassis Device Commands Table 8-7 Supported Chassis Device Commands Command NetFn (Request/Response) Chassis Control 0x00/0x01 0x02 Set System Boot Options 0x00/0x01 0x08 Get System Boot Options 0x00/0x01 0x09 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 185: System Boot Options Commands

    The following table lists which boot properties can be configured and the corresponding boot parameter number. Table 8-8 Configurable System Boot Option Parameters Configurable Boot Property Corresponding Boot Parameter Number Selection between BIOS and FPGA boot POST Type Timeout for graceful shutdown BIOS boot parameters ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 186: Table 8-9 System Boot Options Parameter #96

    IPMC firmware upgrades. Activating new upgraded IPMC firmware may lead to FPGA/BIOS boot bank change back to default boot bank if the NVRAM variables of the new upgraded IPMC firmware are different from the previous active version. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 187: Table 8-10 System Boot Options Parameter #97

    0x02 to 0xFF: Not used The System Boot Options parameter #97 is non-volatile. It survives the IPMC power cycle, reset and may survive the IPMC firmware upgrades. 8.1.7.1.3 System Boot Options Parameter #98 This is an Artesyn-specific OEM parameter. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 188: Table 8-11 System Boot Options Parameter #98

    IPMC, interprets them and executes the boot process accordingly. Note that the boot options stored in the IPMC have higher priority than that stored in the local area of the boot firmware itself. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 189: Figure 8-1 System Boot Options Parameter #100 - Information Flow Overview

    Details are given below. The following figure explains the basic information flow related to the system boot options parameter #100. Figure 8-1 System Boot Options Parameter #100 - Information Flow Overview ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 190: Table 8-12 System Boot Options - Parameter #100 - Data Format

    Parameter Selector [7] - 1b = the storage area is locked. 0b = the storage area is unlocked [6:0] - parameter selector (must be 100). Set Selector 0h = user area All other values are reserved. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 191: Table 8-14 System Boot Options Parameter #100 - Get Command Usage

    All other values are reserved. Block Selector Offset into the storage area of the boot options in multiples of 16 bytes. Response Data Completion Code. Generic plus the following command-specific completion codes: 80h = parameter not supported ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 192 This is supported by HPI, for details refer to the System Management Interface Based on HPI-B User’s Guide related to your system environment. The following table lists the boot parameters that can be configured for the ATCA-7370 blade using the system boot option parameter #100.
  • Page 193 2400 en_cmp all:1:2:3:4:5:6:7 en_ht on:off flexratio on:off ratio_value numeric(12~30) en_xd on:off virtualization on:off speedstep on:off turbo_mode on:off c_states on:off vtd_support on:off clk_spreadspec on:off artm_pwr_policy on:off ddr3_refresh auto:7.8:3.9 auto ddr3_vdd_limit auto:1.5 auto ecc_support on:off ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 194: Table 8-15 System Boot Options Parameter #100 - Supported Parameters

    SAS HDD mounted on the RTM frontnet Front Panel Network basenet0 Base0 Network basenet1 Base1 Network usb1 USB frontpanel 1 usb2 USB frontpanel 2 usbartm USB artm usbcdrom USB cdrom usbfdd USB floppy disk efishell Built in UEFI shell ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 195: Event Commands

    LAN Device Commands Table 8-18 Supported LAN Device Commands Command NetFn (Request/Response) Set LAN Configuration Parameters 0x0C/0x0D 0x01 Get LAN Configuration Parameters 0x0C/0x0D 0x02 Set SOL Configuration Parameters 0x0C/0x0D 0x21 Get SOL Configuration Parameters 0x0C/0x0D 0x22 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 196: Picmg 3.0 Commands

    Get Power Level 0x2C/0x2D 0x12 Get IPMB Link Info 0x2C/0x2D 0x18 Set AMC Port State 0x2C/0x2D 0x19 Get AMC Port State 0x2C/0x2D 0x1A Get FRU Control Capabilities 0x2C/0x2D 0x1E Get target upgrade capabilities 0x2C/0x2D 0x2E ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 197 0x37 Initiate manual rollback 0x2C/0x2D 0x38 The firmware upgrade commands supported by the blade are implemented according to the PICMG HPM.1 Revision 1.0 specification. The boot block can be updated with PICMG HPM.1 specific commands. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 198: Artesyn Embedded Technologies Specific Commands

    Set/Get Feature Configuration Commands This command can be used to enable/disable features within the IPMC during runtime. Table 8-20 Set/Get Feature Configuration Commands NetFn Command Name (Request/Response) Description Set Feature Configuration 0x2E/0x2F 0x1E Get Feature Configuration 0x2E/0x2F 0x1F ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 199: Set Feature Configuration Command

    This command can be used to retrieve the IPMI feature set being configured. Table 8-22 Get Feature Configuration Command Byte Data Field Request Data Artesyn IANA Number (0065CDh). LSB first. Feature Selector, for details see Table 8-23 on page 200. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 200: Serial Output Commands

    Serial Output Commands Table 8-24 Serial Output Commands Command Name NetFn (Request/Response) Description Set Serial Output 0x2E/0x2F 0x15 Set Serial Output Command on page Get Serial Output 0x2E/0x2F 0x16 Get Serial Output Command on page 201 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 201: Set Serial Output Command

    Artesyn IANA Number (0065CDh). LSB first. 8.3.2.2 Get Serial Output Command The Get Serial Output Command provides a way to determine which serial output source goes to a particular serial port connector. Currently, only BIOS output is supported. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 202: Oem Set/Get Acpi Power Commands

    This command can be used to change payload’s power state. Table 8-27 OME Set/Get ACPI Power Commands NetFn Command name (Request/Response) Description OEM Set ACPI Power State 0x2E/0x2F 0x17 OEM Get ACPI Power State 0x2E/0x2F 0x18 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 203: Oem Set Acpi Power State (0X17)

    2nd byte of Artesyn IANA Enterprise Number. A value of 65h shall be used. MSB of Artesyn IANA Enterprise Number. A value of 00h shall be used. 8.3.3.2 OEM Get ACPI Power State (0x18) This command can be used to retrieve current ACPI power state. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 204: Oem Set/Get Performance Commands

    --01h set S3 typically equates to "suspend-to-RAM" --02h S5 soft off --03h unknown 8.3.4 OEM Set/Get Performance Commands Table 8-30 OEM Set/Get Performance Commands NetFn Command name (Request/Response) Description OEM Set Performance Mode 0x2E/0x2F 0x21 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 205: Oem Set Performance Mode (0X21)

    LSB of NSN IANA Enterprise Number. A value of 2Ah shall be used. 2nd byte of NSN IANA Enterprise Number. A value of 6Fh shall be used. MSB of NSN IANA Enterprise Number. A value of 00h shall be used. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 206: Oem Get Performance Mode (0X22)

    --0h normal performance mode --1h reduced performance mode Power draw value of reduced performance mode, the unit is watt, LS byte first. Power draw value of normal performance mode, the unit is watt, LS byte first. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 207: Pigeon Point Specific Commands

    Table 8-52 on page 223 0x2E/0x2F 0x16 Get Module State Table 8-53 on page 223 0x2E/0x2F 0x27 Enable Module Site Table 8-54 on page 225 0x2E/0x2F 0x28 Disable Module Site Table 8-55 on page 225 0x2E/0x2F 0x29 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 208: Get Status Command

    LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 209 Bits [0:3] Metallic Bus 1 Events These bits indicate pending Metallic Bus 1 requests arrived from the shelf manager: 0: Metallic Bus 1 Query 1: Metallic Bus 1 Release 2: Metallic Bus 1 Force 3: Metallic Bus 1 Free ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 210 Bits [0:3] Clock Bus 3 Events These bits indicate pending Clock Bus 3 requests arrived from the shelf manager: 0: Clock Bus 3 Query 1: Clock Bus 3 Release 2: Clock Bus 3 Force 3: Clock Bus 3 Free ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 211: Get Serial Interface Properties Command

    Bits [6:4] Reserved Bits [3:0] Baud Rate ID The baud rate ID defines the interface baud rate as follows: 0: 9600 bps 1: 19200 bps 2: 38400 bps 3: 57600 bps (unsupported) 4: 115200 bps (unsupported) ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 212: Set Serial Interface Properties Command

    3: 57600 bps (unsupported) 4: 115200 bps (unsupported) Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 213: Get Debug Level Command

    Bit [1] Low-level Error Logging Enable If set to "1", the IPMC outputs low-level error/diagnostic messages onto the serial debug interface. Bit [0] Error Logging Enable If set to "1", the IPMC outputs error/diagnostic messages onto the serial debug interface. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 214: Set Debug Level Command

    Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 215: Get Hardware Address Command

    LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Hardware Address If set to 00, the ability to override the hardware address is disabled. NOTE: A hardware address change only takes effect after an IPMC reset. Response Data Completion Code ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 216: Get Handle Switch Command

    LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 Handle Switch Status 0x00: The handle switch is open. 0x01: The handle switch is closed. 0x02: The handle switch state is read from hardware. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 217: Set Handle Switch Command

    LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 218: Set Payload Communication Time-Out Command

    0.1 to 25.5 seconds. Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 219: Enable Payload Control Command

    LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 220: Reset Ipmc Command

    Byte Data Field Request Data PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Response Data Completion Code ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 221: Graceful Reset Command

    LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 222: Get Payload Shutdown Time-Out Command

    Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 Time-Out measured in hundreds of milliseconds, LSB first ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 223: Set Payload Shutdown Time-Out Command

    LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Module Site ID Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 224 0: Payload power is bad. 1: Payload power is good. Bit [6] 0: IPMB-L buffer is not attached. 1: IPMB-L buffer is attached. Bit [7] 0: IPMB-L buffer is not ready. 1: IPMB-L buffer is ready. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 225: Enable Module Site Command

    LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Module Site ID Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 226: Reset Carrier Sdr Repository Command

    LSB Byte first: byte 1 = 0A, byte 2 = 40, byte 3 = 00 Response Data Completion Code PPS IANA Private Enterprise ID 0x00400A = 16394 (Pigeon Point Systems) LSB Byte first: byte 2 = 0A, byte 3 = 40, byte 4 = 00 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 227: Fru Information And Sensor Data Records

    Defined by AMC.0 R2.0 Spec Record PICMG Carrier Activation Defined by AMC.0 R2.0 Spec and Current Management PICMG Carrier Point-to- Defined by AMC.0 R2.0 Spec Point Connectivity Record PICMG AMC Point-to- Defined by AMC.0 R2.0 Spec Point Connectivity ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 228: Power Configuration

    Early Power Draw Levels, Watt Complete early power level including IPMC Steady state Power Draw Levels, 1 = 120W Complete steady power Watt consumption including IPMC 2 = 170W 3=200W Transition from early to steady levels, sec ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 229: Sensor Data Records

    Note: On the single processor variant the processor and its DIMM sockets are populated on the upper side of the board. Components associated with the second processor are not populated on this product variant. Sensor Data Records The sensors available on the blades are detailed in the table below. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 230: Table 9-3 Sensor Data Records

    0x7: M7 -48V A Volts Voltage Threshold reading threshold unr uc lnr lc Asrt / Deass Auto 0x02 0x01 -48V B Volts Voltage Threshold reading threshold unr uc lnr lc Asrt / Deass Auto 0x02 0x01 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 231 0x01 HoldUp Volts Voltage Threshold reading threshold unr uc lnr lc Asrt / Deass Auto 0x02 0x01 Input Power Other Units- Threshold reading threshold unr uc unc Asrt / Deass Auto based 0x01 Sensor 0x0B ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 232 Asrt / Deass Auto 0x01 0x01 Outlet Temp Temp Threshold reading threshold unr uc unc Asrt / Deass Auto 0x01 0x01 Board Temp Temp Threshold reading threshold unr uc unc Asrt / Deass Auto 0x01 0x01 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 233 Asrt / Deass Auto 0x01 0x01 3.3V Temp Threshold reading threshold unr uc lnr lc Asrt / Deass Auto 0x01 0x01 1.1V PCH Voltage Threshold reading threshold unr uc lnr lc Asrt / Deass Auto 0x02 0x01 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 234 [7:4] = Channel reading 0x0: IPMB-A Asrt / Deass Auto IPMB-0 specific Number disabled, IPMB-B disabled 0xF1 discrete [3:0] = Reserved 0x1: IPMB-A 0x6F enabled, IPMB-B disabled 0x2: IPMB-A disabled, IPMB-B enabled 0x3: IPMB-A enabled, IPMB-B enabled ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 235 Watchdog specific 0x23 0x1: Hard Reset discrete 0x2: Power Down 0x6F 0x3: Power Cycle 0x8: Timer Interrupt IPMC POST Manageme digital 0xFF 0xFF 0x0: Performance Asrt Auto Discrete Subsystem 0x06 0x1: Performance Lags Health 0x28 ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 236 0x7: Software or F/W change successful. FW Progress System Sensor- See IPMI Spec See IPMI Spec 0x0: System Asrt Auto specific Firmware Error Firmware discrete 0x1: System Progress Firmware Hang 0x6F 0x0F 0x2: System Firmware Progress ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 237 Boot Error Boot Error Sensor- 0xFF 0xFF 0x0: No Bootable Asrt Auto specific media 0x1E discrete 0x1: Non-bootable diskette 0x6F 0x2: PXE Server not found 0x3: Invalid boot sector 0x4: Timout waiting for user selection ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 238 0xFF Reading according 0x0: BIOS POST Asrt Auto specific to EFI BIOS port80 Code 0xD1 status codes discrete 0x3: 209 0x6F 0x4: OEM 0xD1 0x6: 0xFF 0x7: Reading according to EFI BIOS port80 status codes. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 239 Sensor- See IPMI Spec 0xFF 0x0: Presence Asrt Auto Supply specific detected 0x08 discrete 0x1: Power Supply Failure detected 0x6F Boot Bank Sensor- 0xFF 0xFF 0x0: Boot Bank A Asrt Auto specific 0xD2 discrete 0x6F ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 240 Sensor- 0xFF 0xFF 0x1: Thermal Trip Asrt Auto specific 0x07 0xA: ProcHot discrete 0x6F ACPI State System Sensor- 0xFF 0xFF 0x0: S0 Asrt Auto ACPI Power specific 0x3: S3 State discrete 0x5: S5 0x22 0x6F ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 241: Firmware Upgrade

    10.1 HPM.1 Firmware Upgrade 10.1.1 Overview The primary update mechanism for the ATCA-7370 blades is the FCU tool which is delivered with the BBS package for the board. However, the ATCA-7370 board family also supports upgrade of the firmware with the HPM.1 specification. Upgradable components of the board include the BIOS flash, FPGA flash, and IPMC flash.

  • Page 242: Kcs Interface

    Configuring this interface is described in Chapter 7, Configuring SOL Parameters, on page 176. Example: Prompt>Ipmitool -I lan -H 172.16.0.221 -U "" -P "" hpm upgrade <file> ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 243: Ipmc Upgrade

    After switching, the partitions change their roles. Switching of the partitions also takes place when the firmware is upgraded and activated using the HPM.1 upgrade procedure. The firmware image is the regular firmware and change with every update. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 244: Bios/Fpga Update

    "get component properties"). The following figure shows the connection of the SPI busses which are switched with "Set System Boot Options" -> Boot Bank (parameter 0x96). Description can be found in the System Boot Options Parameter #96 on page 186. Figure 10-2 SPI Busses Connection ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 245: Upgrade Package

    Description atca7370_em_bios_xx_yy_zzzz.hpm Contains BIOS HPM.1 image with version xx_yy_zzzz atca7370_em_fpga_xx_yy_zzzz.hpm Contains FPGA HPM.1 image with version xx_yy_zzzz atca7370_em_ibbl_ xx_yy_zzzz.hpm Contains IPMC boot loader image with version xx_yy_zzzz atca7370_em_ipmc_ xx_yy_zzzz.hpm Contains IPMC firmware with version xx_yy_zzzz ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 246 Firmware Upgrade ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 247: Troubleshooting

    Make sure the temperature is high. as per the board requirements. There is a fault in the DC Verify the DC converter. converter. The IP address of the blade is Verify the IP address of the incorrect. blade. ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 248 Troubleshooting ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)

  • Page 249: Related Documentation

    PCI-SIG PCI Local Bus Specification Revision 2.2 PCI-X Addendum to the PCI Local Bus Specification 1.0 PICMG PICMG 3.0 Revision 2.0 Advanced TCA Base Specification PICMG 3.1 Revision 1.0 Specification Ethernet/Fiber Channel for AdvancedTCA Systems ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 250 Related Documentation ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
  • Page 252 Artesyn Embedded Technologies, Artesyn and the Artesyn Embedded Technologies logo are trademarks and service marks of Artesyn Embedded Technologies, Inc. All other product or service names are the property of their respective owners. © 2014 Artesyn Embedded Technologies, Inc.

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