Gpio Both Edges Register (0X646); Gpio Interrupt Status Register (0X647); Table 3-21 Gpio Both Edges Register (0X646); Table 3-22 Gpio Interrupt Status Register (0X647) - GE OpenVPX VPXcel6 SBC622 Hardware Reference Manual

3.2.37 GPIO Both Edges Register (0x646)

This allows the GPIO interrupts to be sensitive to both edges when in edge mode.

Table 3-21 GPIO Both Edges Register (0x646)

Bit Meaning
D7 GPIO7 both edges
1 = Both edges
0 = Off (default)
D6 GPIO6 both edges
1 = Both edges
0 = Off (default)
D5 GPIO5 both edges
1 = Both edges
0 = Off (default)
D4 GPIO4 both edges
1 = Both edges
0 = Off (default)
D3 GPIO3 both edges
1 = Both edges
0 = Off (default)
D2 GPIO2 both edges
1 = Both edges
0 = Off (default)
D1 GPIO1 both edges
1 = Both edges
0 = Off (default)
D0 GPIO0 both edges
1 = Both edges
0 = Off (default)

3.2.38 GPIO Interrupt Status Register (0x647)

This indicates which GPIO is causing an interrupt. Writing a logic ʹ1ʹ to a Bit in
this register will clear that pending interrupt.

Table 3-22 GPIO Interrupt Status Register (0x647)

Bit Meaning
D7 GPIO7 interrupt status
1 = Interrupt is active
0 = No interrupt
D6 GPIO6 interrupt status
1 = Interrupt is active
0 = No interrupt
D5 GPIO5 interrupt status
1 = Interrupt is active
0 = No interrupt
D4 GPIO4 interrupt status
1 = Interrupt is active
0 = No interrupt
D3 GPIO3 interrupt status
1 = Interrupt is active
0 = No interrupt
D1 GPIO1 interrupt status
1 = Interrupt is active
0 = No interrupt
D0 GPIO0 interrupt status
1 = Interrupt is active
0 = No interrupt
CPLD Control and Status Registers 63