Functional Definitions; Core I7 Dual Core Processor; Mobile Intel Qm57 Express Chipset - GE OpenVPX VPXcel6 SBC622 Hardware Reference Manual

2.1 Functional Definitions

40 SBC622 Hardware Reference Manual

2.1.1 Core i7 Dual Core Processor

The SBC622 offers the Core i7 Dual Core processor with an integrated memory
controller hub, the Mobile Intel QM57 Express Chipset Platform Controller Hub
(PCH). The Core i7 processor functions are as follows:
• Two execution cores with 18/25/35W options
• Separate L1 data/instruction caches of 32 KByte each for each core
• Separate L2 256 KByte (shared) data/instruction caches for each core
• Up to 4 MByte of shared L3
• Graphics controller
• Integrated dual channel (DDR3) 1067 MHz memory controllers with ECC
– Configured for 2x Refresh to support compatibility with extended temperature
operation
– 800 MHz for 1.06 GHz CPU Option.
• SIMD SSE 4.1/4.2
• Root complex for PMC/XMC site #1, the 10 GbE Ethernet Controller, and the
VPX PCIe expansion plane
– x16 PCIe interface to onboard switch

2.1.2 Mobile Intel QM57 Express Chipset

The Mobile Intel QM57 Express Chipset contains a DMI serial link interface to the
Core i7 processors plus internal logic to control data transfers between the Core i7
memory controller and the various I/O and local peripheral resources.
External serial link and parallel bus functions of the Mobile Intel QM57 Express
Chipset include:
• DMI interface to Core i7 processor
• Flex Display Interface (FDI) to Core i7
• VGA and DVI capabilities
• Root complex for PMC/XMC site #2, and the Quad GbE controller
– x4 PCIe interface to the Quad GbE controller
– x4 PCIe interface to PMC/XMC site #2
• USB 2.0 Two EHCI Host Controllers, supporting up to eight external ports
• Up to three SATA ports
– Data transfer rates up to 3.0 Gb/s (300 MB/s)