Harman Kardon AVR 151/230C Service Manual page 72

75w 5.1 channel receiver
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Harman Kardon
ADV7623
Pin No.
Mnemonic
13
RXC_2−
14
RXC_2+
15
HP_CTRLD
16
5V_DETD
17
DGND
18
DVDD
19
DDCD_SDA
20
DDCD_SCL
21
CVDD
22
CGND
23
RXD_C−
24
RXD_C+
25
TVDD
26
RXD_0−
27
RXD_0+
28
CGND
29
RXD_1−
30
RXD_1+
31
TVDD
32
RXD_2−
33
RXD_2+
34
CVDD
35
CGND
36
TXPVDD
37
TXPLVDD
38
TXGND
39
TXPGND
40
EXT_SWING
41
HPD_ARC−
42
ARC+
43
TXDDC_SDA
44
TXDDC_SCL
SCL
45
TXAVDD
DD
46
TXGND
47
TXC−
48
TXC+
49
TXGND
50
TX0−
51
TX0+
52
TXGND
53
TX1−
54
TX1+
55
TXAVDD
Type
Description
HDMI input
Digital Input Channel 2 Complement of Port C in the HDMI Interface.
HDMI input
Digital Input Channel 2 True of Port C in the HDMI Interface.
Digital output
Hot Plug Detect for Port D.
Digital input
5 V Detect Pin for Port D in the HDMI Interface.
Ground
DVDD Ground.
Power
Digital Supply Voltage (1.8 V).
Digital I/O
HDCP Slave Serial Data Port D. DDCD_SDA is a 3.3 V input/output that is 5 V tolerant.
Digital input
HDCP Slave Serial Clock Port D. DDCD_SCL is a 3.3 V input that is 5 V tolerant.
Power
Receiver Comparator Supply Voltage (1.8 V).
Ground
TVDD and CVDD Ground.
HDMI input
Digital Input Clock Complement of Port D in the HDMI Interface.
HDMI input
Digital Input Clock True of Port D in the HDMI Interface.
Power
Receiver Terminator Supply Voltage (3.3 V).
HDMI input
Digital Input Channel 0 Complement of Port D in the HDMI Interface.
HDMI input
Digital Input Channel 0 True of Port D in the HDMI Interface.
Ground
TVDD and CVDD Ground.
HDMI input
Digital Input Channel 1 Complement of Port D in the HDMI Interface.
HDMI input
Digital Input Channel 1 True of Port D in the HDMI Interface.
l Inp
p
Power
Receiver Terminator Supply Voltage (3.3 V).
eiver Termina
Term
HDMI input
Digital Input Channel 2 Complement of Port D in the HDMI Interface.
gital Input Chann
put Chann
HDMI input
Digital Input Channel 2 True of Port D in the HDMI Interface.
Digital Input Chan
tal Input Cha
Power
Receiver Compa
Receiver Comparator Supply Voltage (1.8 V).
ceiver Comp
Ground
TVDD and CVD
TVDD and CVDD Ground.
DD and CVD
Power
1.8 V Power Supply for Digital and I/O Power Supply. This pin supplies power to the
1.8 V Power S
1.8 V Power
digital logic and I/Os. It should be filtered and as quiet as possible.
digital logi
digital log
Power
1.8 V Pow
1.8 V Power Supply.
1.8 V Pow
Ground
TXPVDD Ground.
TXPVD
XPVD
Ground
TXPLV
TXPL
TXPLVDD Ground.
Analog input
g input
Thi
This pin sets the internal reference currents. Place an 887 Ω resistor (1% tolerance) between
Thi
this pin and ground.
th
th
Analog input
nalog input
Hot Plug Detect Signal. This pin indicates to the interface whether the receiver is connected.
Detect Signal. Th
It supports 1.8 V to 5 V CMOS logic levels.
rts 1.8 V to 5 V C
Analog input
Analog input
alog input
Audio Return Channel Input (5 V Tolerant).
Return Channel
Digital I/O
Digital I/O
igital I/O
Serial Port Data I/O to Receiver. This pin serves as the master to the DDC bus. It supports a
l Port Data I/O t
rt Dat
5 V CMOS logic level.
CMOS logic leve
MOS logic
Digital outp
Digital ou
Digital output
Serial Port Data Clock to Receiver. This pin serves as the master clock for the DDC bus.
erial Port Data C
l Port Dat
It supports a 5 V CMOS logic level.
It supports a
It supports a 5 V
Power
Power
Power
1.8 V Powe
1.8 V Power Su
1.8 V Power Supply for TMDS Outputs.
Groun
Groun
Ground
TXAVDD Gro
TXAVDD Ground.
TXAVDD
HDMI output
DM
DM
Differential Clock Output. Differential clock output at the TMDS clock rate; supports
Differe
Differentia
TMDS lo
TMDS logic level.
TMDS
HDMI output
Differential Clock Output. Differential clock output at the TMDS clock rate; supports
TMDS logic level.
Ground
TXAVDD Ground.
HDMI output
Differential Output Channel 0 Complement. Differential output of the red data at 10×
al Output Channe
the pixel clock rate; supports TMDS logic level.
HDMI output
Differential Output Channel 0 True. Differential output of the red data at 10× the pixel clock
rate; supports TMDS logic level.
Ground
TXAVDD Ground.
HDMI output
Differential Output Channel 1 Complement. Differential output of the red data at 10×
the pixel clock rate; supports TMDS logic level.
HDMI output
Differential Output Channel 1 True. Differential output of the red data at 10× the pixel
clock rate; supports TMDS logic level.
Power
1.8 V Power Supply for TMDS Outputs.
ly Volta
y
Digital and I/O P
gital and I
It should be filt
It should be
d.
he internal refer
he internal
rrents. Place an 887
ground.
ground.
ect Signal
dicates to the inter
es to the inte
.8 V to 5
ic levels.
vels.
urn Chann
V Tolerant).
nt).
er. This pin serves
his pin serves
Receiver. This pin se
r. This pin s
ogic level.
ogic level.
r TMDS Outputs.
TMDS Outputs
Output. Differentia
put. Differentia
.
ock Output. Differe
ck
evel.
evel.
ound.
nd.
l Output Channe
ck rate; suppo
ck rate; suppo
t Ch
t Chan
Rev. Sp0 | Page 10 of 16
ADI Confidential
d as q
as
. Place an 88
a
AVR 151 Service Manual
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