Pioneer PDP-R05U Service Manual page 203

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SII9993CTG100 (MR MAIN BOARD ASSY : IC6881, IC6801)
• HDCP Panel Link Receiver
Pin Arrangement (Top view)
TE
L 13942296513
Block Diagram
72
RESET#
DSDA 76
77
DSCL
81
EXT_RES
83,84
RXC±
86,87
RX0±
91,92
RX1±
RX2± 96,97
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6
Q13
51
Q12
52
Q11
53
Q10
54
Q9
55
OVCC
56
OGND
57
Q8
58
Q7
59
Q6
60
Q5
61
Q4 62
Q3 63
64
VCC
65
GND
OGND
66
OVCC
67
Q2 68
Q1 69
Q0 70
INT
71
RESET#
72
73
RSVDL
74
CSCL
75
CSDA
I2C REGISTERS
SLAVE
CONFIGURATION
LOGIC BLOCK
HDCP HDCP
KEYS DECRYPTION
EEPROM ENGINE
XOR
MASK
PANEL LINK
TM
TMDS
CONTROL SIGNALS
DIGITAL CORE
CONTROL SIGNALS
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8
Q Q
3 6 7 1 3 1 5
INT
71
I2C
SLAVE
AUX DATA
LOGIC
BOARD
AUDIO
DATA
DECODE
LOGIC
MODE
BOARD
CONTROL
VIDEO
COLOR
SPACE
CONVERTER
UP/DOWN
SAMPLING
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PDP-R05U
7
9 4 2 8
PLLOUT
25
PLLIN
24
PVCC2
23
22 PGND2
21 OVCC
20 RSVDO
RSVDO
19
18 RSVDL
17 VCC
16 GND
15 AnBPb
14 DACVCCB
13 DACGNDB
12 AnGY
11 DACVCCG
10 DACGNDG
9 RSET
8 COMP
7 AnRPr
6 DACVCCR
5 DACGNDR
N/C
4
3 N/C
2 DACGND
1 DACVCC
0 5 8 2 9 9 4 2 8
CSDA
75
74 CSCL
MCLK
26 MCLKOUT
GEN
27 MCLKIN
32 SCK
WS
31
SDO
30
29 SPDIF
35 DE
33 HSYNC
34 VSYNC
46 ODCK
36-39,42-44,48-55,
m
Q[23-0]
58-63,68-70
12 AnGY
VIDEO
7 AnRPr
DAC
15 AnBPb
9 8
RSET COMP
7
8
9 9
A
B
C
9 9
D
E
F
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