Outputting The Ao Sample Clock Signal; Other Timing Requirements - National Instruments 6711 User Manual

Chapter 3 Analog Output

Outputting the AO Sample Clock Signal

You can configure the PFI 5/AO SAMP CLK pin to output the ao/SampleClock signal. The
output pin reflects the ao/SampleClock signal regardless of what signal you specify as its source.
The output is an active high pulse. Figure 3-7 shows the timing behavior of the PFI 5/AO SAMP
CLK pin when the pin is an output.
Figure 3-7. PFI 5/AO SAMP CLK as an Output
t
w
t = 50–75 ns
w
The PFI 5/AO SAMP CLK is configured as an input by default.

Other Timing Requirements

A counter on your device internally generates ao/SampleClock unless you select some external
source. The ao/StartTrigger signal starts this counter. It is stopped automatically by hardware
after a finite acquisition completes or manually through software. When using an internally
generated ao/SampleClock in NI-DAQmx, you can also specify a configurable delay from the
ao/StartTrigger to the first ao/SampleClock pulse. By default, this delay is two ticks of the
ao/SampleClockTimebase signal.
Figure 3-8 shows the relationship of the ao/SampleClock signal to the ao/StartTrigger signal.
Figure 3-8. ao/SampleClock and ao/StartTrigger
ao/SampleClockTimebase
ao/StartTrigger
ao/SampleClock
Delay
from
Start
Trigger
3-8 | ni.com