Fluke HYDRA III Series Remote Programmers Manual page 30

Data acquisition unit
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*SRE <n>
*SRE?
Description: Set the Service Request Enable for the Status Byte register. The Service
Request Enable determines which bits of the Status Byte register are reported in the
Master Summary Status bit of the Status Byte register. <n> is the sum of the decimal
values of the bits of the Status Byte register that will be reported in the Master Status
Summary bit.
The Status Byte register is updated to reflect any change in the enable registers associated
with the summary bits. Service Request Enable is set to 0 at power-on if the *PSC setting
is 1.*CLS and *RST does not affect Event Status Enable.
Example:
Response:
Set Example: *SRE 32
Related Commands:
*STB?
*PSC
*STB?
Description: Query the Status Byte register. The Status Byte register reports various
instrument conditions. The return value is the sum of the decimal values of the asserted
bits of the register. The register bits, their decimal values (in parentheses), and their
definitions are as follows:
• Bit 0 (1): (Not used)
• Bit 1 (2): Alarm Status Summary
• Bit 2 (4): Error Queue Summary
• Bit 3 (8): Questionable Status Summary
• Bit 4 (16): (Not used)
• Bit 5 (32): Event Status Summary
• Bit 6 (64): Master Status Summary
• Bit 7 (128): Operation Status Summary
Summary bits are set when any bit in the associated event register is set and the
corresponding bit in the associated enable register is also set. The Alarm Status Summary
bit is associated with the Alarm Status Event register and the Alarm Status Enable
register. The Questionable Status Summary bit is associated with the Questionable Status
Event register and the Questionable Status Enable register. The Event Status Summary
bit is associated with the Event Status Register and the Event Status Enable register. The
Operation Status Summary bit is associated with the Operation Status Event register and
the Operation Status Enable register. The Master Status Summary bit is set when any
other bit in the Status Byte register is set while the corresponding bit in the Service
Request Enable register is set. The Error Queue Summary bit is set if there are one or
more errors in the error queue.
Reading the Status Byte register does not clear the register. The register always reports
the associated status.*CLS does not clear the Status Byte register but may indirectly
affect it through the associated status registers and queues.*RST does not affect the
Status Byte register.
Example:
Response:
Related Commands:
*ESR?
26
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*SRE?
32
*STB?
32
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