Philips 32PF9968/10 Service Manual page 86

EN 86 9. LC4.8L LA
9.11.4 Diagram B12, Type S9993CT (IC7D03, HDMI Panellink), Reserved
RESET#
DSDA
DSCL
R_EXT
RXC±
RX0±
RX1±
RX2±
Circuit Descriptions, Abbreviation List, and IC Data Sheets
Block Diagram
Registers
2
I C
----------------
Configuration
Slave
Logic Block
HDCP HDCP
Keys Decryption
EEPROM Engine
XOR
Mask
PanelLink
TMDS
TM
Digital
control
Core
signals
control
signals
Pin Configuration
Q13 51
Q12
52
Q11
53
Q10
54
Q9
55
OVCC
56
OGND
57
Q8
58
Q7
59
Q6
60
Q5 61
Q4
62
Q3 63
64
VCC
65
GND
OGND 66
OVCC 67
Q2 68
Q1 69
Q0 70
INT 71
RESET# 72
73
RSVDL
74
CSCL
75
CSDA
Figure 9-9 Internal block diagram and pin configuration
2
I C
Slave
Aux Data
Logic
Block
MCLK
Audio
Data
Decode
Mode
Logic
Control
Block
Video
Color
Space
Converter
Up/Down
Sampling
30
25
24
23
22
21
20
19
18
17
16
15
SiI 9993
14
100-Pin
13
12
TQFP
11
(Top View) 10
9
8
7
6
5
4
3
2
1
CSDA
CSCL
MCLKOUT
Gen
MCLKIN
SCK
WS
SD0
SPDIF
DE
HSYNC
VSYNC
ODCK
24 Q[23:0]
AnGY
Video
AnRPr
DAC
AnBPb
N/C
PLLIN
PVCC2
PGND2
OVCC
RSVDO
RSVDO
RSVDL
VCC
GND
AnBPb
DACVCCB
DACGNDB
AnGY
DACVCCG
DACGNDG
RSET
COMP
AnRPr
DACVCCR
DACGNDR
N/C
N/C
DACGND
DACVCC
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