Table of Contents
Advertisement
4.3
CPU Counter/Timers
The i960 RM/RN I/O processor is equipped with two on-chip counter/timers which are clocked
with the i960 RM/RN I/O processor clock signal. The i960 RM/RN I/O processor receives its clock
from the primary PCI interface clock, generated by the motherboard. Most motherboards generate
a 33 MHz clock signal, although the PCI specification requires a clock frequency between 0 and
33 MHz. The timers can be programmed for single-shot or continuous mode, and can generate
interrupts to the processor when the countdown expires.
4.4
Primary PCI Interface
The primary PCI interface on the IQ80960RM/RN platform provides the i960 RM/RN I/O
processor with a connection to the PCI bus on the host system. Only the PCI-to-PCI bridge unit on
the i960 RM/RN I/O processor is directly connected to the primary PCI interface. Devices installed
on the expansion slots are connected to the PCI bus via the bridge unit on the i960 RM/RN I/O
processor. The PCI-to-PCI bridge accepts Type 1 configuration cycles destined for devices on the
secondary bus, and will forward them as Type 0 or Type 1 configuration cycles, or as special
cycles. The IQ80960RN platform interfaces to a 64-bit PCI bus and the IQ80960RM platform
interfaces to a 32-bit PCI bus.
4.5
Secondary PCI Interface
The secondary PCI interface provided by the i960 RM/RN I/O processor is used to connect PCI
cards via the expansion slots to the host system's PCI bus. PCI cards are attached to the
IQ80960RM/RN platform with a standard PCI connector and may contain up to four separate PCI
devices. The i960 RM/RN I/O processor provides PCI-to-PCI bridge functionality to map installed
PCI devices onto the host PCI bus, and supports transaction forwarding in both directions across
the bridge. PCI devices connected via the expansion slots can therefore act as masters or slaves on
the host system's PCI bus. Additional PCI-to-PCI bridge devices are supported by the i960 RM/RN
I/O processor on its secondary PCI interface and can be designed into add-on PCI cards. In
addition, the i960 RM/RN I/O processor supports "private" PCI devices on its secondary bus.
Private devices are hidden from initialization code on the host system, and are configured and
accessed directly by the i960 RM/RN I/O processor. These devices are not part of the normal PCI
address space, but they can act as PCI bus masters and transfer data to and from other PCI devices
in the system.
Unless designated as private devices, PCI devices installed on the secondary PCI interface of the
IQ80960RM/RN platform are mapped into the system-wide PCI address space by configuration
software running on the host system. No logical distinction is made at the system level between
devices on the primary PCI bus and devices on secondary buses; all transaction forwarding is
handled transparently by the PCI-to-PCI bridge. Configuration cycles and read and write accesses
from the host are forwarded through the PCI-to-PCI bridge unit of the i960 RM/RN I/O processor.
Master read and write cycles from devices on the secondary PCI bus are also forwarded to the host
bus by the PCI-to-PCI bridge unit.
IxWORKS allows secondary PCI devices to be configured as Public or Private. Public devices are
configured by the PCI host. Private devices are configured by the IxWORKS kernel and the
device-specific HDM.
IQ80960RM/RN Evaluation Board Manual
i960® RM/RN I/O Processor Overview
4-5
Advertisement
Table of Contents
