Pioneer DJM-850-K Service Manual page 49

5
• Pin Function
Pin No.
H7 CVDD
H8 Vss
H9 Vss
H10 CVDD
H11 CVDD
H12 CVDD
H13 EMB_D[3]/GP6[3]
H14 EMB_D[17]
H15 EMB_D[18]
H16 EMB_D[4]/GP6[4]
J1 TMS
J2 TDI
J3 TDO
J4 TRST
J5 EMU[0]
J6 CVDD
J7 CVDD
J8 Vss
J9 Vss
J10 CVDD
J11 CVDD
J12 CVDD
J13 EMB_D[5]/GP6[5]
J14 EMB_D[19]
J15 EMB_D[6]/GP6[6]
J16 EMB_D[7]/GP6[7]
K1 RTCK (GP7[14])
K2 AHCLKX1/EPWM0B/GP3[14]
K3 ACLKX1/EPWM0A/GP3[15]
K4 AFSX1/EPWMSYNCI/EPWMSYNCO/GP4[10]
K5 DVDD
K6 CVDD
K7 CVDD
K8 Vss
K9 Vss
K10 CVDD
K11 CVDD
K12 DVDD
K13 EMB_D[20]
K14 EMB_WE_DQM[0]/GP5[15]
K15 EMB_WE
K16 EMB_D[21]
L1 AHCLKR1/GP4[11]
L2 ACLKR1/ECAP2/APWM2/GP4[12]
L3 AFSR1/GP4[13]
L4 AMUTE0/RESETOUT
L5 DVDD
L6 CVDD
L7 Vss
L8 Vss
L9 Vss
L10 Vss
L11 DVDD
L12 DVDD
L13 EMB_CAS
L14 EMB_D[22]
L15 EMB_D[23]
L16 EMA_CAS/EMA_CS[4]/GP2[1]
M1 AXR1[9]/GP4[9]
5
6
Pin Name
DJM-850-K
6
7
I/O Function and Operation
V Power supply 1.2 V
G GND
G GND
V Power supply 1.2 V
V Power supply 1.2 V
V Power supply 1.2 V
I/O SDRAM data bus
O Not used (open)
O Not used (open)
I/O SDRAM data bus
I JTAG test mode select
I JTAG test data input
O JTAG test data output
I JTAG test reset
I Miscellaneous emulation pin
V Power supply 1.2 V
V Power supply 1.2 V
G GND
G GND
V Power supply 1.2 V
V Power supply 1.2 V
V Power supply 1.2 V
I/O SDRAM data bus
O Not used (open)
I/O SDRAM data bus
I/O SDRAM data bus
O Not used (open)
I McASP1 transmit master clock
I McASP1 transmit bit clock
I McASP1 transmit frame sync
V Power supply 3.3 V
V Power supply 1.2 V
V Power supply 1.2 V
G GND
G GND
V Power supply 1.2 V
V Power supply 1.2 V
V Power supply 3.3 V
O Not used (open)
O SDRAM connection
O SDRAM connection
O Not used (open)
I McASP1 receive master clock
I McASP1 receive bit clock
I McASP1 receive frame sync
O Not used (open)
V Power supply 3.3 V
V Power supply 1.2 V
G GND
G GND
G GND
G GND
V Power supply 3.3 V
V Power supply 3.3 V
O SDRAM column address strobe
O Not used (open)
O Not used (open)
O Not used (open)
O SEND OUT
7
8
A
B
C
D
E
F
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