Ic Information - Pioneer DJM-850-K Service Manual

5

5.11 IC INFORMATION

DYW1806 (MAIN ASSY: IC2803)
MAIN UCOM
• Pin Function
No. I/O Port Name
1 P60/SCL0
2 P61/SDA0
3 P62
4 P63
5 P31/TI03/TO03/INTP4
6 P64/RD
7 P65/WR0
8 P66/WR1
9 P67/ASTB
10 P77/EX23/KR7/INTP11
11 P76/EX22/KR6/INTP10
12 P75/EX21/KR5/INTP9
13 P74/EX20/KR4/INTP8
14 P73/EX19/KR3
15 P72/EX18/KR2
16 P71/EX17/KR1
17 P70/EX16/KR0
18 P06/WAIT
19 P05/CLKOUT
20 EVSS1
21 P80/EX0
22 P81/EX1
23 P82/EX2
24 P83/EX3
25 P84/EX4
26 P85/EX5
27 P86/EX6
28 P87/EX7
29 P30/INTP3/RTC1HZ
30 EVDD1
31 P50/EX8
32 P51/EX9
33 P52/EX10
34 P53/EX11
35 P54/EX12
36 P55/EX13
37 P56/EX14
38 P57/EX15
39 P17/EX31TI02/TO02
40 P16/EX30/TI01/TO01/INTP5
41 P15/EX29/RTCDIV/RTCCL
42 P14/EX28/RxD3
43 P13/EX27/TxD3
44 P12/EX26/SO00/TxD0
45 P11/EX25/SI00/RxD0
46 P10/EX24/SCK00
47 AVREF1
48 P110/ANO0
49 P111/ANO1
50 AVREF0
Note "−": There is no built-in pulling up function
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I/O Signal Name
O LINE_SEL1 CH1 LINE/PHONO input line switch
O LINE_SEL2 CH2 LINE/PHONO input line switch
O LINE_SEL3 CH3 LINE/PHONO input line switch
O LINE_SEL4 CH4 LINE/PHONO input line switch
O DEBUG_LED Debug LED indication confirmation
O MCPU_RD Bus control
O MCPU_WR0 Bus control
O NC Bus control: Not used (open)
O MCPU_ASTB Bus control
O RELAY_CONT Standby mode transition
O CPU_MUTE Mute signal H: MUTE, L: MUTE cancel
O NC Not used (open)
I POWER_RESET_A Standby mode transition
O V+34D_CONT Power supply start-up, down for sequence control
O V+5D_CONT Power supply start-up, down for sequence control
O V+3R3D_CONT Power supply start-up, down for sequence control
O V+1R2D_CONT Power supply start-up, down for sequence control
O SUB_CTRL NEC B control signal
(Communication permission signal to NEC B)
O NC Not used (open)
G GNDD Ground
I/O MCPU_DATA0 Bus input / output 0
I/O MCPU_DATA1 Bus input / output 1
I/O MCPU_DATA2 Bus input / output 2
I/O MCPU_DATA3 Bus input / output 3
I/O MCPU_DATA4 Bus input / output 4
I/O MCPU_DATA5 Bus input / output 5
I/O MCPU_DATA6 Bus input / output 6
I/O MCPU_DATA7 Bus input / output 7
O SUB_CPU_RESET SUB UCOM reset
V V+3R3E Power supply (Connect to 3.3 V)
I/O MCPU_DATA8 Bus input / output 8
I/O MCPU_DATA9 Bus input / output 9
I/O MCPU_DATA10 Bus input / output 10
I/O MCPU_DATA11 Bus input / output 11
I/O MCPU_DATA12 Bus input / output 12
I/O MCPU_DATA13 Bus input / output 13
I/O MCPU_DATA14 Bus input / output 14
I/O MCPU_DATA15 Bus input / output 15
I HWAIT HWAIT
I USB_REQ Communication prohibition signal from USB UCOM (BF)
(0 can communicate)
O USB_RCV Transmission permission signal to USB UCOM (BF)
(1 admits the transmission)
I USB_SI UART input from USB UCOM (BF)
O USB_SO UART output to USB UCOM (BF)
O FPGA_SO Sync serial data output for FPGA
O USB_RESET USB reset
O FPGA_SCK Serial clock output for FPGA
V V+3R3E Power supply (Connect to 3.3 V)
I USB_ERR_MAIN Error signal from USB
I VDET Power supply abnormality detection
V V+3R3D_REFA Power supply (Connect to 3.3 V)
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Description
DJM-850-K
7
8
A
Pull-up
(Note)
×
×
×
×
×
×
B
×
×
×
×
×
×
×
×
×
×
×
×
C
×
−
×
×
×
×
×
×
×
×
×
D
−
×
×
×
×
×
×
×
×
×
_
×
E
×
×
×
×
×
−
−
−
−
F
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