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Clock Switching Characteristics
Item
Symbol
Readout clock
V
T
Vertical transfer
V
clock
V
During
H
imaging
During
H
parallel-serial
H
conversion
Reset gate clock
RG
Substrate clock
SUB
1
When vertical transfer clock driver CXD1267AN is used.
2
tf
tr – 2ns.
Item
Horizontal transfer clock
3
The overlap period for twh and twl of horizontal transfer clocks H
twh
Min.
Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
2.3
2.5
, V
,
1
2
, V
3
4
20
5.38
1
2
11
13
1.5
1.8
Symbol
Min.
H
, H
16
1
2
twl
tr
0.5
20
15
19
0.01
5.38
0.01
3
51
0.5
two
Unit
Remarks
Typ.
Max.
20
ns
3
and H
1
– 10 –
tf
Unit
Remarks
0.5
µs
During readout
1
15
250
ns
2
15
19
ns
0.01
µs
0.01
ns
3
When draining
0.5
µs
charge
is two.
2
ICX418AKL
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