Huawei MU509 Hardware Migration Manual page 60

HUAWEI 30 mm × 30 mm LGA Module
Hardware Migration Guide
Pin MU509 MC509
No.
Signal Level Signal
Definition Definition
73 UART0_DS CMOS UART0_DS
R 2.6 V R
74 UART0_RT CMOS UART0_RT
S 2.6 V S
75 UART0_DC CMOS UART0_DC
D 2.6 V D
76 UART0_TX CMOS UART0_TX
2.6 V
77 UART0_RI CMOS UART0_RI
NG 2.6 V NG
78 UART0_RX CMOS UART0_RX
2.6 V
79 UART0_DT CMOS UART0_DT
R 2.6 V R
80 UART0_CT CMOS UART0_CT
S 2.6 V S
Issue 08 (2016-12-12)
MU609 ME909u-521
Level Signal Level Signal
Definition Definition
CMOS UART0_DS CMOS Reserved
2.6 V R 1.8 V
CMOS UART0_RT CMOS UART0_RTS
2.6 V S 1.8 V
CMOS UART0_DC CMOS Reserved
2.6 V D 1.8 V
CMOS UART0_TX CMOS UART0_TX
2.6 V 1.8 V
CMOS UART0_RI CMOS Reserved
2.6 V NG 1.8 V
CMOS UART0_RX CMOS UART0_RX
2.6 V 1.8 V
CMOS UART0_DT CMOS Reserved
2.6 V R 1.8 V
CMOS UART0_CT CMOS UART0_CTS
2.6 V S 1.8 V
HUAWEI Proprietary and Confidential
Copyright © HUAWEI Technologies Co., Ltd.
ME909u-523/ME209u-526
Level Signal Level
Definition
- Reserved -
CMOS UART0_RTS CMOS 1.8 V
1.8 V
- Reserved -
CMOS UART0_TX CMOS 1.8 V
1.8 V
- Reserved -
CMOS UART0_RX CMOS 1.8 V
1.8 V
- Reserved -
CMOS UART0_CTS CMOS 1.8 V
1.8 V
Appendix
MU709 ME909s
Signal Level Signal Level
Definitio Definition
n
UART0_D CMOS UART0_DS CMO
SR 1.8 V R S 1.8
V
UART0_R CMOS UART0_RT CMO
TS 1.8 V S S 1.8
V
UART0_D CMOS UART0_DC CMO
CD 1.8 V D S 1.8
V
UART0_T CMOS UART0_TX CMO
X 1.8 V S 1.8
V
UART0_R CMOS UART0_RI CMO
ING 1.8 V NG S 1.8
V
UART0_R CMOS UART0_RX CMO
X 1.8 V S 1.8
V
UART0_D CMOS UART0_DT CMO
TR 1.8 V R S 1.8
V
UART0_C CMOS UART0_CT CMO
TS 1.8 V S S 1.8
V
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