Huawei MU509 Hardware Migration Manual page 54

HUAWEI 30 mm × 30 mm LGA Module
Hardware Migration Guide
Pin MU509 MC509
No.
Signal Level Signal
Definition Definition
6 PCM_DIN CMOS PCM_DIN
2.6 V
7 PCM_DOU CMOS PCM_DOU
T 2.6 V T
8 PCM_CLK CMOS PCM_CLK
2.6 V
9 NC - NC
10 NC - NC
11 WAKEUP_I CMOS WAKEUP_I
N 2.6 V N
12 VBAT 3.8 V VBAT
13 VBAT 3.8 V VBAT
14 PS_HOLD CMOS PS_HOLD
1.8 V
Issue 08 (2016-12-12)
MU609 ME909u-521
Level Signal Level Signal
Definition Definition
CMOS Reserved - PCM_DIN
2.6 V
CMOS Reserved - PCM_DOUT
2.6 V
CMOS Reserved - PCM_CLK
2.6 V
- Reserved - Reserved
- Reserved - Reserved
CMOS WAKEUP_I CMOS WAKEUP_IN
2.6 V N 1.8 V
3.8 V VBAT 3.8 V VBAT
3.8 V VBAT 3.8 V VBAT
CMOS PS_HOLD CMOS PS_HOLD
1.8 V 1.8 V
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Copyright © HUAWEI Technologies Co., Ltd.
ME909u-523/ME209u-526
Level Signal Level
Definition
[1]
CMOS PCM_DIN CMOS 1.8 V
1.8 V
[1]
CMOS PCM_DOUT CMOS 1.8 V
1.8 V
[1]
CMOS PCM_CLK CMOS 1.8 V
1.8 V
- Reserved -
- Reserved -
CMOS WAKEUP_IN CMOS 1.8 V
1.8 V
3.8 V VBAT 3.8 V
3.8 V VBAT 3.8 V
CMOS PS_HOLD CMOS 1.8 V
1.8 V
Appendix
MU709 ME909s
Signal Level Signal Level
Definitio Definition
n
PCM_DIN CMOS PCM_DIN CMO
1.8 V S 1.8
V
PCM_DO CMOS PCM_DOU CMO
UT 1.8 V T S 1.8
V
PCM_CLK CMOS PCM_CLK CMO
1.8 V S 1.8
V
SD_DATA CMOS SD_DATA1 CMO
1 3.0 V S 3.0
V
SD_DATA CMOS SD_DATA2 CMO
2 3.0 V S 3.0
V
WAKEUP CMOS WAKEUP_I CMO
_IN 1.8 V N S 1.8
V
VBAT 3.8 V VBAT 3.8 V
VBAT 3.8 V VBAT 3.8 V
PS_HOLD CMOS Reserved -
1.8 V
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