u-blox LEA-5 Series Hardware Manual page 29

Function PIN
System
RESET_N
TIMEPULSE
EXTINT0
SDA2
SCL2
Reserved
NC
SCS1_N/
Reserved
MISO/
CFG_COM1
MOSI/
CFG_COM0
SS_N/
Reserved
SCK/CFG_G
PS/
Reserved
Table 5: Pin description LEA-5Q/5M
The above design is for the USB in BUS-powered mode. For Self-powered mode pin 21 (CFG_COM0)
must be connected to GND. NMEA baud rate is 38400 when in self-powered mode. For more
information see the LEA-5 Data Sheet [1].
GPS.G5-MS5-09027-A2
No I/O Description
Hardware Reset
10 I
(Active Low)
Timepulse
28 O
Signal
External
27 I
Interrupt
1 I/O DDC Pins
2 I/O DDC Pins
12 I
19 Not Connected
20 O SPI
SPI
Configuration
9 I/O
Pin
SPI
21 I/O Configuration
Pin
SPI
22 I
Reserved
SPI/Power
23 I/O
Mode
LEA-5, NEO-5, TIM-5H - Hardware Integration Manual
Remarks
Leave open if not used. Do not drive high.
Configurable Timepulse signal (one pulse per second by default).
Leave open if not used.
External Interrupt Pin.
Internal pull-up resistor to VCC. Leave open if not used.
DDC Data. Leave open, if not used.
DDC Clock. Leave open, if not used.
Leave open, do not drive low.
Leave open.
LEA-5Q: SPI Chip Select. Leave open if not used. (Planned)
LEA-5M: Leave open.
LEA-5Q: SPI MISO. Leave open, if not used. (Planned)
LEA-5Q/LEA-5M: Leave open for default configuration.
LEA-5Q: SPI MOSI. Leave open, if not used. (Planned)
LEA-5Q/LEA-5M: Leave open for default configuration.
LEA-5Q: SPI Slave Select. Leave open, if not used. (Planned)
LEA-5M: Leave open.
LEA-5Q: SPI Clock / Power Mode Configuration Pin. Leave open, if
not used. (Planned)
LEA-5M: Leave open.
Released Design-in
Page 29 of 68