Yamaha NP-S2000 Service Manual page 65

A B C
DAC 1/4
1
DAC (1)
2
3
IC4
3.3
1.5
IC12
1.6
1.7
IC12
1.6
4 1.6
IC12
1.6
1.9
IC12
0.8
0
5
6
7
NETWORK IN
8
9
10
D E F
12.5
0
-0.9
-4.8
IC19
0
IC14
-0.9
DAC
5.1
0
0
0
0
-4.8
IC19
1.7 0 0
0
0.9
1.6 5.1 -12.4
2.3
1.7
2.3
0
3.3 2.5
0
3.2
0 0
3.2 0
0
12.5
3.2 5.1
0
-0.9
-4.7
IC20
0
IC14
-0.9
-12.4
0
-4.8
IC20
0
-12.4
12.5
0
-1.0
-4.7
IC21
0
IC16
-1.0
DAC
5.1
0
0
-4.7
IC21
0 0 0
0
1.7
-12.4
0.9 0
5.1
1.6
2.3
1.7
2.3
0
2.5
3.3
0
3.2
0 0
0
3.2
0
3.2
5.1
12.5
0
-0.9
-4.7
IC22
0
IC16
-0.9
-12.4
0
-4.6
IC22
0
-12.4
G H I
OUT L
12.5
12.5
0
0
0
IC15
0 0
IC15 0
0
-12.4
12.5
0
IC18
0 0
-12.4
0
0
IC18
0 0
12.5
12.5
0
0
0
IC17
0 0
IC17 0
0
-12.4
12.5
0
IC5
0 0
-12.4
0
0
IC5
0 0
11.5 11.5
11.5 11.5
0 0
11.4 11.4
0 0
0
0
0.7 0.7
11.4 11.4
11.4 11.4
0
0
-12.4 -12.4 -12.4 -12.4
J K L
ANALOG OUT
L
IC4: CS230011-CZZR
Clock multiplier
FILTP
6
0.1 μF
LCO
FILTN
7
M[1:0]
M1 00=1x
9
Ratio Selection 01=4x
JK1
M0
10 10=128x
11=256x
Output to Input
Clock Ratio
BALANCED OUT
CLK_IN
23 kHz to 30 MHz
L 5
Frequency Reference
IC5, 14-22: NE5532DR
Dual low-noise operational amplifiers
(U, T models)
OUTPUT
36 pF
IN+
ANALOG OUT
R
IN
460
IC5, 15, 17-22: OP275GSR
Dual bipolar/JFET, audio operational amplifier
JK2
(B, G, J models)
OUT A 1 8 V+
-IN A 2 7 OUT B
+IN A 3 6 -IN B
BALANCED OUT
R V- 4 5 +IN B
IC6, 7: PCM1792ADBR
Audio stereo digital-to-analog converter
I OUTL-
LRCK
Audio
BCK Current
Data Input Segment
DATA I/F
DAC
I OUTL+
RST x8
Oversampling V COM
Advanced
Digital Bias
Segment I REF
Filter and
MDO DAC
and Vref V
COM
Modulator
Function
MDI
Control
MC
I OUTR-
MS
Function
Current
Control Segment
I/F DAC
MSEL I OUTR+
ZEROL
System
Zero
ZEROR Clock Power Supply
Detect
Manager
★ All voltages are measured with a 10MΩ/V DC electronic voltmeter.
● 電圧は、内部抵抗 10MΩの電圧計で測定したものです。
★ Components having special characteristics are marked
and must be replaced ● 印のある部品は、安全性確保部品を示しています。部品の交換が必要な場合、
with parts having specifications equal to those originally installed. パーツリストに記載されている部品を使用してください。
★ Schematic diagram is subject to change without notice.
● 本回路図は標準回路図です。改良のため予告なく変更することがあります。
M N
NP-S2000
AUX_SRC
8
CLK_IN
0
AUX_OUT
4
1
Fractional-N
Frequency Synthesizer CLK_OUT
6 MHz to 75 MHz
3
PLL Output
N
VD
1 3.3V
128 Hz 8W Digital PLL
0.1 μF 1 μF
and Fractional N Logic
GND
2
V CC+
37 pF
14 pF
15
1OUT 1 8 V
CC+
OUT
2OUT
1IN– 2 7
7 pF
1IN+ 3 6 2IN–
V 4 5 2IN+
15 CC–
V CC–
IC12: TC74VHC08F
Quad 2-input AND gate
1A 1 14 Vcc
1B 2 13 4B
1Y 3 12 4A
VOUTL
2A 4 11 4Y
2B 5 10 3B
I/V and Filter
L 2Y 6 9 3A
GND 7 8 3Y
R
VOUTR
I/V and Filter
ZEROL 1 28 VCC2L
ZEROR 2 27 AGND3L
MSEL 3 26 IOUTL-
25 IOUTL+
LRCK 4
DATA 5 24 AGND2
BCK 6 23 VCC1
VCOML
SCK 7 22
DGND 8 21 VCOMR
VDD 9 20 IREF
MS 10 19 AGND1
MDI 11 18 IOUTR-
MC 12 17 IOUTR+
MDO 13 16 AGND3R
RST 14 15 VCC2R
65