Yamaha NP-S2000 Service Manual page 47

Condition When Used
Pin No. Port Name Function Name
I/O
W2 SPI_SDO VNP2_FL_MOSI O
N25 BGPIO[16] VNP2_FL_LAT O
N24 BGPIO[17] VNP2_FL_CTL O
FLD_ACK(FLD_WAIT_
N23 BGPIO[18] I
REQ)
P25 BGPIO[19] VNP2_FL_CS O
P24 BGPIO[20] BGPIO20 –
P23 BGPIO[21] REV0 I
Y2 BGPIO[2] DAC_SCK –
R25 BGPIO[22] (RY_UNBAL) O
R24 BGPIO[23] (RY_BAL) O
R1 SDO_ABCK NCPU_BCK O
U2 BGPIO[11] DAC_CSR O
P1 SDO_AWCK NCPU_WCK O
U3 BGPIO[12] DAC_N_IC O
U1 SDO_MCK NCPU_MCK O
P2 SDO3 O
P3 SDO2 O
R2 SDO1 O
R3 SDO0 NCPU_SD0 O
N1 SDI_ABCK I
T2 BGPIO[14] DBG_DIP0 I
M1 SDI_AWCK I
T3 BGPIO[15] DBG_DIP1 I
T1 SDI_MCK 22M I
M2 SDI3 I
M3 SDI2 I
N2 SDI1 I
N3 SDI0 I
Detail of Function
Logic
IF data output (FLD CPU ↔ Main microprocessor)
Data
For FL microprocessor control
IF data update decision edge output
(FLD CPU ↔ Main microprocessor)
For FL microprocessor control
IF status (VFD1/VFD2 ↔ Main microprocessor)
0: Lights / 1: Lights off
For FL microprocessor control
IF transfer permission
(VFD1/VFD2 ↔ Main microprocessor)
For FL microprocessor control
IF chip select (VFD1/VFD2 ↔ Main microprocessor)
–
– Empty
Data H: 2 types of crystals used / L: 1 type of crystal used
DAC clock out
Clock
For PCM1792A control
H act UNBALANCE (XLR) output relay control
H: Relay on / L: Relay
BALANCE (RCA) output relay control
H act
H: Relay on / L: Relay off
Clock Audio output bit clock
DACR ch chip select
–
For PCM1792A control
Clock Audio output word clock
DAC initial clear
–
For PCM1792A control
Clock Audio output master clock
Data No used (For multi channel)
Data No used (For multi channel)
Data No used (For multi channel)
Data Audio output data 0
Clock No used
Data DIP SW0 for debugging
Clock No used
Data DIP SW0 for debugging
Clock Audio clock crystal oscillator
Data No used
Data No used
Data No used
Data No used
Condition When Used
Pin No. Port Name Function Name
I/O
AE16 USBP USBP B
AD16 USBM USBM B
AB16 USB_PWEN USB_PWEN O
AC17 USB_OC USB_OC I
AE12 MAC_REF_CLK PHY01_REF_CLK O
AE13 MAC0_RXD1 PHY0_RXD1 I
AD13 MAC0_RXD0 PHY0_RXD0 I
AC13 MAC0_RXER PHY0_RXER I
AE14 MAC0_TXD1 PHY0_TXD1 O
AD14 MAC0_TXD0 PHY0_TXD0 O
AC14 MAC0_TXEN PHY0_TXEN O
AD12 MAC0_CRS_DV PHY0_CRS_DV I
AE15 MAC0_MDC PHY0_MDC O
AD15 MAC0_MDIO PHY0_MDIO B
AE10 MAC1_RXD0 I
AD10 MAC1_RXD1 I
AC10 MAC1_RXER I
AE11 MAC1_TXD0 O
AD11 MAC1_TXD1 O
AC11 MAC1_TXEN O
AC12 MAC1_CRS_DV I
AE9 MAC1_MDC O
AD9 MAC1_MDIO B
NP-S2000
Detail of Function
Logic
Data USB data +
Data USB data -
H act USB power enable
H act USB over current detection
Clock MAC0 RMII clock output
Data MAC0 RMII reception data 1
Data MAC0 RMII reception data 0
Data MAC0 RMII reception error
Data MAC0 RMII transmission data 1
Data MAC0 RMII transmission data 0
Data MAC0 RMII transmission enable
Data MAC0 RMII career detection
Clock MAC0 RMII MI clock
Data MAC0 RMII MI data
Data No used (MAC1 RMII reception data 0)
Data No used (MAC1 RMII reception data 1)
Data No used (MAC1 RMII reception error)
Data No used (MAC1 RMII transmission data 0)
Data No used (MAC1 RMII transmission data 1)
Data No used (MAC1 RMII transmission enable)
Data No used (MAC1 RMII career detection)
Clock No used (MAC1 RMII MI clock)
Data No used (MAC1 RMII MI data)
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