Yamaha NP-S2000 Service Manual page 45

Pin No. Port Name
M25 nRESET
T25 XI_S
T24 XO_S
AE24 XI_A
AD24 XO_A
T22 TEST0
R23 TEST1
T23 TEST2
L23 nSCS3
L24 nSCS2
K23 nSCS1
L24 nSCS0
J23 nSLBE
J24 nSUBE
K25 nSWR
J25 nSRD
**
SA[22:0]
**
SD[15:0]
B1 SCLK0
C1 SCKE0
D1 SCLK1
E1 SCKE1
F1 nCS1
C2 nCS0
E3 nWE
F2 nRAS
E2 nCAS
A9 DQM3
B9 DQM2
C9 DQM1
C10 DQM0
**
A[12:0]
J2 A13
J1 A14
**
D[31:0]
Condition When Used
Function Name
I/O
VNP2_N_RST I
– I
– O
– I
– O
TEST0 I
– I
– I
N_SCS3 O
N_SCS2 O
N_SCS1 O
N_SCS0 O
N_SLBE O
N_SUBE O
N_SWE O
N_SRD O
SRA[22:0] O
SRD[15:0] B
SDRAM_CLK0 O
SDRAM_CKE0 O
SDRAM_CLK1 O
SDRAM_CKE1 O
– O
SDRAM_N_CS0 O
SDRAM_N_WE O
SDRAM_N_RAS O
SDRAM_N_CAS O
SDRAM_DQM3 O
SDRAM_DQM2 O
SDRAM_DQM1 O
SDRAM_DQM0 O
SDRAM_A[11:0] O
SDRAM_BA0 O
SDRAM_BA1 O
SDRAM_DQ[31:0] B
Detail of Function
Logic
L act System reset terminal
Clock System clock crystal oscillation terminal
Clock System clock crystal oscillation terminal
Clock Audio clock crystal oscillation terminal
Clock
H act System reset terminal
H act
H act
BUS Chip select 3
BUS Chip select 2
Chip select 1
BUS
FLASH_N_CS
BUS Chip select 0
BUS Lower byte enable
BUS Upper byte enable
BUS Write enable
BUS Read enable
BUS External I/O address bus
BUS External I/O data bus
Clock SDRAM clock enable
H act SDRAM clock enable
Clock SDRAM clock enable
H act SDRAM clock enable
BUS SDRAM chip select 1
BUS SDRAM chip select 0
BUS SDRAM write enable
BUS SDRAM row address strobe
BUS SDRAM column address strobe
BUS SDRAM data input/Output mask 3
BUS SDRAM data input/Output mask 2
BUS SDRAM data input/Output mask 1
BUS SDRAM data input/Output mask 0
BUS SDRAM address bus
BUS SDRAM bank select BA0
BUS SDRAM bank select BA1
BUS SDRAM data bus
NP-S2000
45