D4R Receiver - Lectronics D4 Instruction Manual

D4R Receiver

The receiver is essentially a mirror image of the trans-
mitter. The incoming RF signal is converted back into
the baseband signal that was generated in the trans-
mitter, and the FPGA decodes the signal to generate
the four audio channels in digital and analog formats
as they appeared at the transmitter inputs.
Diversity reception is employed to suppress multipath
dropouts, followed by SAW filters in the front-end to
attenuate signals above and below the passband. The
FPGA monitors and adjusts the level of the incoming
RF signal to increase the dynamic range capabilities of
the receiver.
FILTER
FILTER
Rio Rancho, NM, USA
LOW
RF
NOISE
DEMOD
AMP
OSC
900 MHz
LOW
RF
NOISE
DEMOD
AMP
4-channel Digital Wireless System
From the IQ demodulator through the filters, amplifier
and baseband ADC, the signal path and processing
is the reverse of that in the transmitter. Decoding in
the FPGA regenerates the original digital and analog
audio signals and delivers them to the output stages.
The FPGA also delivers a signal to a DAC and amplifer
for monitoring with headphones. The headphone out-
put follows the receiver selected on the front panel.
24-bit D/A
(analog)
AES/EBU
OUT
DIGITAL
(digital)
BASEBAND
DECODER 24-bit D/A
(analog)
and
AES/EBU
DIVERSITY OUT
(digital)
SYSTEM
24-bit D/A
(analog)
24-bit D/A
(analog)
1
TA3F
OUTPUTS
2
3
4
5