Limits of pre trigger, post trigger, memory size
SPC_REC_STD_ABA
The total number of samples to be recorded to the on-board memory in standard mode is defined by the SPC_MEMSIZE register.
Register
SPC_MEMSIZE
FIFO Mode
The ABA FIFO Mode is similar to the Multiple Recording FIFO mode. In contrast to the standard mode it is not necessary to program the
number of samples to be recorded. The acquisition is running until the user stops it. The data is read block by block by the driver as described
under Single FIFO mode example earlier in this manual. These blocks are online available for further data processing by the user program.
This mode significantly reduces the average data transfer rate on the PCI bus. This enables you to use faster sample rates then you would be
able to in FIFO mode without ABA.
Register
SPC_CARDMODE
SPC_REC_FIFO_ABA
The number of segments to be recorded must be set separately with the register shown in the following table:
Register
SPC_LOOPS
0
1 ... [4G - 1]
Limits of pre trigger, post trigger, memory size
The maximum memory size parameter is only limited by the number of activated channels and by the amount of installed memory. Please
keep in mind that each sample needs 2 bytes of memory to be stored. Minimum memory size as well as minimum and maximum post trigger
limits are independent of the activated channels or the installed memory.
Due to the internal organization of the card memory there is a certain stepsize when setting these values that has to be taken into account.
The following table gives you an overview of all limits concerning pre trigger, post trigger, memory size, segment size and loops. The table
shows all values in relation to the installed memory size in samples. If more memory is installed the maximum memory size figures will increase
according to the complete installed memory
Activated
Used
Channels
Mode
1 Ch
Standard Single
Standard Multi/ABA 32
Standard Gate
Standard Average
FIFO Single
FIFO Multi/ABA
FIFO Gate
FIFO Average
2 Ch
Standard Single
Standard Multi/ABA 32
Standard Gate
Standard Average
FIFO Single
FIFO Multi/ABA
FIFO Gate
FIFO Average
4 Ch
Standard Single
Standard Multi/ABA 32
Standard Gate
Standard Average
FIFO Single
FIFO Multi/ABA
158
8h
Data acquisition to on-board memory for multiple trigger events. While the multiple trigger events are stored with pro-
grammed sampling rate the inputs are sampled continuously with a slower sampling speed.
Value
Direction
10000
read/write
Value
Direction
9500
read/write
80h
Continuous data acquisition for multiple trigger events together with continuous data acquisition with a slower sam-
pling clock.
Value
Direction
10020
read/write
Recording will be infinite until the user stops it.
Defines the total segments to be recorded.
Memory size
SPC_MEMSIZE
SPC_PRETRIGGER
Min
Max
Step
Min
32
Mem
16
16
Mem - 16
(defined by mem and post)
Mem
16
16
8k
(defined by segment and post)
32
Mem
16
16
8k
For the limits in this mode please refer to the dedicated chapter in this manual.
not used
16
8k
not used
16
8k
(defined by segment and post)
not used
16
8k
For the limits in this mode please refer to the dedicated chapter in this manual.
32
Mem/2
16
16
Mem/2 - 16
(defined by mem and post)
Mem/2
16
16
8k
(defined by segment and post)
32
Mem/2
16
16
8k
For the limits in this mode please refer to the dedicated chapter in this manual.
not used
16
8k
not used
16
8k
(defined by segment and post)
not used
16
8k
For the limits in this mode please refer to the dedicated chapter in this manual.
32
Mem/4
16
16
Mem/4 - 16
(defined by mem and post)
Mem/4
16
16
8k
(defined by segment and post)
32
Mem/4
16
16
8k
For the limits in this mode please refer to the dedicated chapter in this manual.
not used
16
8k
not used
16
8k
(defined by segment and post)
digitizerNETBOX DN2.44x Manual / DN6.44x Manual
Description
Defines the total number of samples to be recorded per channel.
Description
Defines the used operating mode
Description
Defines the number of segments to be recorded
Pre trigger
Post trigger
SPC_POSTTRIGGER
Max
Step
Min
Max
16
16
8G - 16
16
16
Mem/2-16
16
16
Mem-16
16
not used
16
16
8G - 16
16
16
8G - 16
16
16
8G - 16
16
16
Mem/4-16
16
16
Mem/2-16
16
not used
16
16
8G - 16
16
16
8G - 16
16
16
8G - 16
16
16
Mem/8-16
16
16
Mem/4-16
16
not used
16
16
8G - 16
ABA mode (dual timebase)
Segment size
SPC_SEGMENTSIZE
Step
Min
Max
Step
Min
16
not used
16
32
Mem/2
16
16
not used
32
8G - 16
16
0 (∞)
16
32
pre+post
16
0 (∞)
16
not used
0 (∞)
16
not used
16
32
Mem/4
16
16
not used
32
8G - 16
16
0 (∞)
16
32
pre+post
16
0 (∞)
16
not used
0 (∞)
16
not used
16
32
Mem/8
16
16
not used
32
8G - 16
16
0 (∞)
16
32
pre+post
16
0 (∞)
Loops
SPC_LOOPS
Max
Step
not used
not used
not used
4G - 1
1
4G - 1
1
4G - 1
1
not used
not used
not used
4G - 1
1
4G - 1
1
4G - 1
1
not used
not used
not used
4G - 1
1
4G - 1
1
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