Siemens Simatic 620 Owner's Manual page 152

Hardware Information
Display Port (LVDS)
TFT displays with an LVDS port can be connected to this port. The connection of
18 bit displays up to a resolution of 1024x768 pixels is possible. The permissible
display clock rate is 20MHz to 66Mhz. The display is selected automatically in
accordance with the coding of the Select Inputs display. The display supply
voltages (3.3V and 5V) are connected via the graphic controller, dependent on the-
requirements of the connected displays. The maximum cable length is 50cm with a
transmission rate of 455MHz. Special cable properties are to be considered for the
pair of differential cables in accordance with the LVDS specification.
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
7-20
Designation Description
P5V_D_fused +5V (fused) VCC display
P5V_D_fused +5V (fused) VCC display
RXIN0– LVDS output signal bit 0 (-)
RXIN0+ LVDS output signal bit 0 (+)
P3V3_D_fused +3.3V (fused) VCC display
P3V3_D_fused +3.3V (fused) VCC display
RXIN1– LVDS output signal bit 1 (-)
RXIN1+ LVDS output signal bit 1 (+)
GND Ground
GND Ground
RXIN2- LVDS output signal bit 2 (-)
RXIN2+ LVDS output signal bit 2 (+)
GND Ground
GND Ground
RXCLKIN- LVDS clock pulse (-)
RXCLKIN+ LVDS clock pulse (+)
GND Ground
GND Ground
Reserved
Reserved
Input / Output
Output
Output
Output
Output
Output
Output
Output
Output
-
-
Output
Output
-
-
Output
Output
-
-
SIMATIC Box PC 620 Manual
A5E00131465-01