Allen-Bradley 1747–PT1 User Manual
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Allen-Bradley 1747–PT1 User Manual

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ALLEN-BRADLEY
Hand-Held Terminal
(Catalog Number 1747–PT1)
User Manual
Allen-Bradley Parts

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  • Page 1 ALLEN-BRADLEY Hand-Held Terminal (Catalog Number 1747–PT1) User Manual Allen-Bradley Parts...
  • Page 2 PLC, PLC 2, PLC 3, and PLC 5 are registered trademarks of Allen-Bradley Company, Inc. SLC, SLC 100, SLC 500, SLC 5/01, SLC 5/02, PanelView, RediPANEL, and Dataliner are trademarks of Allen-Bradley Company, Inc. IBM is a registered trademark of International Business Machines, Incorporated.

  • Page 3: Table Of Contents

    30 - Understanding Selectable Timed Interrupts - SLC 5/02 Selectable Timed Interrupts Processor Only I/O Interrupts 31 - Understanding I/O Interrupts - SLC 5/02 Processor Only Instruction Execution Times C - Memory Usage, Instruction Execution Times Scan Time Worksheets D - Estimating Scan Time Allen-Bradley Parts...
  • Page 4 Table of Contents Summary of Changes ......Preface ........Features, Installation, Powerup .

  • Page 5: Data File Organization And Addressing

    Table of Contents Understanding File Organization ....Data File Organization and Addressing ... Allen-Bradley Parts...

  • Page 6: Creating A Program

    Table of Contents Ladder Program Basics ..... . . Creating a Program ......
  • Page 7 Table of Contents Creating and Editing Program Files ....Allen-Bradley Parts...
  • Page 8 Table of Contents Saving and Compiling a Program ....Configuring Online Communication ....Downloading/Uploading a Program .
  • Page 9 ....14-1 Instruction Set Overview ..... . 15-1 Allen-Bradley Parts...
  • Page 10 Table of Contents Bit Instructions ......16-1 Timer and Counter Instructions ....17-1 I/O Message and Communication Instructions .
  • Page 11 ..... . 19-1 Math Instructions ......20-1 Allen-Bradley Parts...
  • Page 12 Table of Contents...
  • Page 13 File Copy and File Fill Instructions ....22-1 Bit Shift, FIFO, and LIFO Instructions ... . . 23-1 Allen-Bradley Parts...
  • Page 14 Table of Contents Sequencer Instructions ..... . . 24-1 Control Instructions ......25-1...
  • Page 15 ......27-1 Troubleshooting Faults ..... . . 28-1 Allen-Bradley Parts...
  • Page 16 xiii Table of Contents Understanding the User Fault Routine - SLC 5/02 Processor Only ....29-1 Understanding Selectable Timed Interrupts - SLC 5/02 Processor Only .
  • Page 17 Memory Usage, Instruction Execution Times ..Estimating Scan Time ......Allen-Bradley Parts...

  • Page 18: Preface

    Preface A–B Preface Read this preface to familiarize yourself with the rest of the manual. This preface covers the following topics: who should use this manual the purpose of this manual conventions used in this manual Allen–Bradley support Who Should Use this Manual Use this manual if you are responsible for designing, installing, programming, or troubleshooting control systems that use Allen–Bradley small logic controllers.

  • Page 19: Features, Installation, Powerup

    Instruction Set Overview cross references for detailed information. Provides detailed information about these Bit Instructions instructions. Timer and Counter Provides detailed information about these Instructions instructions. I/O Message and Provides detailed information about these Communication Instructions instructions. Allen-Bradley Parts P–2...

  • Page 20: Number Systems, Hex Mask

    Preface Chapter Title Contents Provides detailed information about these Comparison Instructions instructions. Provides detailed information about these Math Instructions instructions. Move and Logical Provides detailed information about these Instructions instructions. File Copy and File Fill Provides detailed information about these Instructions instructions.
  • Page 21 Installation & Operation Manual for Fixed Hardware Style 1747-NI001 programmable controller Programmable Controllers A procedural manual for technical personnel who use APS to develop Allen-Bradley Advanced Programming Software (APS) 1747-NM002 control applications User Manual A reference manual that contains status file data, instruction set, and...
  • Page 22 Preface Allen-Bradley Support Allen–Bradley offers support services worldwide, with over 75 Sales/Support Offices, 512 authorized Distributors and 260 authorized Systems Integrators located throughout the United States alone, plus Allen–Bradley representatives in every major country in the world. Local Product Support Contact your local Allen–Bradley representative for:...
  • Page 23 Memory Retention with Battery 2 years Fixed, SLC 5/01, SLC 5/02 Compatibility Not SLC 5/03 201.0 mm H x 193.0 mm W x 50.8 D Dimensions (7.9 in H x 7.6 in W x 2.0 in D) Allen-Bradley Parts 1–1...
  • Page 24 “true” status. A zoom feature is included to give immediate access to instruction parameters. Display Area SLC 500 PROGRAMMING SOFTWARE Rel. 2.03 1747 - PTA1E Allen-Bradley Company Copyright 1990 All Rights Reserved PRESS A FUNCTION KEY SELFTEST TERM...
  • Page 25 To install the memory pak, remove the cover from the back of the HHT. Slide cover to the left. Lift off cover. Backside of HHT Allen-Bradley Parts 1–3...
  • Page 26 Chapter 1 Features, Installation, Powerup b. Insert the memory pak in its compartment as indicated in the following figure: After the memory pak is in the compartment, press down on handle to secure connector in socket. Backside of HHT 1–4...
  • Page 27 Remove the jumper from the battery socket, then connect the battery as shown in the figure below: Battery Compartment Plug battery connector into socket (red wire up). Secure battery between clips. Backside of HHT b. Replace the cover. Allen-Bradley Parts 1–5...
  • Page 28 Chapter 1 Features, Installation, Powerup 3. Locate the communication port on the SLC 500 controller, or peripheral port on the 1747–AIC Link Coupler. The figure below shows where it is located on the different devices: SLC 500 Fixed Controller Isolated Link Processor Module Coupler (Modular Controller)

  • Page 29: Hht Messages And Error Definitions

    Press , SELFTEST. The following display appears: [F1] SLC 500 SELFTEST UTILITY KEYPAD WTCHDOG DISPLAY From this menu, you may choose the test you wish to perform. Press [ to return to the previous screen. Allen-Bradley Parts 1–7...
  • Page 30 Chapter 1 Features, Installation, Powerup HHT Display Format The HHT display format consists of the following: display area prompt/data entry/error message area menu tree functions The figure below indicates what appears in these areas. To access this particular screen, press , PROGMAINT.
  • Page 31 BIT ADDR: Indicates that the HHT is in SHIFT mode (e.g., to enter the letter I" you do not ENTER BIT ADDR: have to first press SHIFT). The data you enter appears here, at the cursor location. Allen-Bradley Parts 1–9...
  • Page 32 Chapter 1 Features, Installation, Powerup Cursor Keys , , , Use the four arrow keys to: change or modify instruction addresses locate and correct data entry errors (either type over or use the [SPACE] key) move the cursor left, right, up, and down in a ladder program (rungs not shown on the HHT display automatically scroll into view as you move the cursor up [or down] in the program) scroll through controller and I/O configuration selections...
  • Page 33 0000 0000 1110 0000 move the cursor left, right, B3:3 0000 0000 0100 0000 up and down in a data file B3:4 0101 1101 0100 1000 display. B3/31 = 1 ADDRESS NEXT FL PREV FL NEXT PG PREV PG Allen-Bradley Parts 1–11...
  • Page 34 Chapter 1 Features, Installation, Powerup ZOOM and RUNG Keys key brings up a display that shows the parameters of an [ZOOM] instruction. key moves the cursor to a particular rung. Using this key saves [RUNG] time when you have a long ladder diagram. When you press , you are [RUNG] prompted for the rung number that you want to edit or monitor.
  • Page 35 PRESS A FUNCTION KEY SELFTEST TERM PROGMAINT UTILITY 2. Press , PROGMAINT. The following menu is displayed: [F3] File Name: 101 Prog Name: 1492 File Name Type Size(Instr) System Reserved 0 Ladder CHG_NAM CRT_FIL EDT_FIL DEL_FIL MEM_MAP > Allen-Bradley Parts 2–1...
  • Page 36 Chapter 2 The ENTER Key 1. Because the symbol appears in the lower right hand corner of the > display, press to display additional menu functions. [ENTER] File Name: 101 Prog Name: 1492 File Name Type Size(Instr) System Reserved 0 Ladder EDT_DAT SEL_PRO EDT_I/O CLR_MEM >...
  • Page 37 MML programs PROGRAM MAINTENANCE, [F3] Allows you to: name programs and program files create, delete, and edit program files create and delete data files edit data files select processors and configure the I/O clear HHT memory Allen-Bradley Parts 2–3...
  • Page 38 Chapter 2 UTILITY, [F5] Allows you to: attach online to a processor – upload and download programs between the processor and HHT – change processor mode – transfer processor memory between RAM and EEPROM – force inputs and outputs access network diagnostic functions create or delete processor passwords clear processor memory monitor the ladder diagram while the processor is in Run mode...
  • Page 39 Chapter 2 Main Menu - Program Maintenance [F3] ENTER ENTER ENTER Allen-Bradley Parts 2–5...
  • Page 40 Chapter 2 Program Maintenance [F3] - Ladder Editing ENTER ENTER ENTER ENTER ENTER ENTER ENTER ENTER ENTER ENTER ENTER 2–6...
  • Page 41 Chapter 2 Main Menu - Utility [F5], Default Program in Processor (First Time) Main Menu - Utility [F5], Default Program in Processor (If Previously Attached to that Processor) Allen-Bradley Parts 2–7...
  • Page 42 Chapter 2 Main Menu - Utility [F5], Processor Program Does Not Equal HHT Program (First Time) Main Menu - Utility [F5], Processor Program Does Not Equal HHT Program (If Previously Attached to that Processor) 2–8...
  • Page 43 Chapter 2 Main Menu - Utility [F5], Processor Program Equals HHT Program (First Time) ENTER Allen-Bradley Parts 2–9...
  • Page 44 Chapter 2 Main Menu - Utility [F5], Processor Program Equals the HHT Program (If Previously Attached to that Processor) ENTER 2–10...
  • Page 45 Chapter 2 HHT Function Keys and The following table provides a listing of the abbreviated function keys and Instruction Mnemonics their meanings. The next table provides a list of instruction mnemonics. Function Keys Abbreviation Meaning Allen-Bradley Parts 2–11...
  • Page 46 Chapter 2 Abbreviation Meaning 2–12...
  • Page 47 Chapter 2 Abbreviation Meaning Allen-Bradley Parts 2–13...
  • Page 48 Chapter 2 Instruction Mnemonics Mnemonic Instruction 2–14...
  • Page 49 Chapter 2 Mnemonic Instruction Allen-Bradley Parts 2–15...
  • Page 50 Chapter Understanding File Organization This chapter: defines program, program files, and data files indicates how programs are stored and transferred covers the use of EEPROMs and UVPROMs for program backup Program, Program Files, and As explained in the following sections, the program can reside in: Data Files the Hand–Held Terminal an SLC 500 processor...
  • Page 51 Main Ladder Program (file 2)–This file is always included and contains user-programmed instructions defining how the controller is to operate. Subroutine Ladder Program (files 3 – 255)–These are user-created and activated according to subroutine instructions residing in the main ladder Allen-Bradley Parts program file. 3–2...
  • Page 52 Chapter 3 Understanding File Organization Data Files Data files contain the data associated with the program files. Each program can contain up to 256 data files. These files are organized by the type of data they contain. Each piece of data in each of these files has an address associated with it that identifies it for use in the program file.

  • Page 53: Using Eeproms And Uvproms

    PROM burner.) You can also transfer a program from an EEPROM or UVPROM memory module to the processor’s RAM memory. Refer to page 14–1 for more information on using EEPROMs and UVPROMs. PROCESSOR MEMORY MODULE Processor to Memory 1000 1000 Memory to Processor Allen-Bradley Parts 3–4...
  • Page 54 Chapter Data File Organization and Addressing This chapter discusses the following topics: data file organization and addressing indexed addressing (SLC 5/02 processors) file instructions (using the file indicator #) creating and deleting data program constants M0-M1 files, G files (SLC 5/02 processors with specialty I/O modules) Data File Organization Data files contain the status information associated with external I/O and all other instructions you use in your main and subroutine ladder program files.
  • Page 55 Elements in Timer, Counter, and Control files consist of 3 words: Word Status, Bit, and Integer files have 1 word elements: Addresses are made up of alpha-numeric characters separated by delimiters. Delimiters include the colon, slash, and period. Allen-Bradley Parts 4–2...
  • Page 56 Chapter 4 Data File Organization and Addressing Typical element, word, and bit addresses are shown below: File File File Element Element File File File Number Number Number Element Type Type Word Type N7:15 T4:7.ACC B3:64/15 Element Element Word Element Delimiter Delimiter Delimiter Delimiter...
  • Page 57 INVALID Fixed I/O Expansion Slot 2 outputs (0-7) INVALID Controller rack Data File 1 - Input Image Slot 0 inputs (0-15) Slot 0 inputs (16-23) INVALID I:0.1 Slot 1 inputs (0-5) INVALID See Addressing Examples," next page. Allen-Bradley Parts 4–4...
  • Page 58 Chapter 4 Data File Organization and Addressing Assign I/O addresses to fixed I/O controllers as shown in the table below: Format Explanation Output Input Element delimiter Slot number fixed I/O controller: 0 (decimal) left slot of expansion rack: 1 O:e.s/b right slot of expansion rack: 2 Word delimiter.
  • Page 59 INVALID Slot 2, word 0 inputs (0-15) Slot 2, word 1 inputs (0-15) I:2.1 Slot 4 inputs (0-7) INVALID Slot 6 inputs (0-15) Slot 7 inputs (0-15) Slot 8 inputs (0-7) INVALID See Addressing Examples," next page. Allen-Bradley Parts 4–6...
  • Page 60 Chapter 4 Data File Organization and Addressing The table below explains the addressing format for outputs and inputs. Note that the format specifies as the slot number and as the word number. When you are dealing with file instructions, refer to the element as (slot and word), taken together.
  • Page 61 Ranges from 0 to 4095. Bit 4032 Your programming device may display addresses slightly different than what you entered on the HHT. The HHT and APS always display the Bf/b format in XIO, XIC, and OTE instructions. Allen-Bradley Parts 4–8...
  • Page 62 Chapter 4 Data File Organization and Addressing Data File 4 - Timers Timers are 3-word elements. Word 0 is the control word, word 1 stores the preset value, and word 2 stores the accumulated value. This is illustrated below: Timer Element Word EN TT DN Internal Use...
  • Page 63 C5:0/10 Update accum. bit (HSC in fixed controller only) C5:0.1 C5:0.PRE Preset value of the counter C5:0.2 C5:0.ACC Accumulated value of the counter C5:0.1/0 Bit 0 of the preset value C5:0.2/0 Bit 0 of the accumulated value Allen-Bradley Parts 4–10...
  • Page 64 Chapter 4 Data File Organization and Addressing Data File 6 - Control These are 3-word elements, used with Bit Shift, FIFO, LIFO, and Sequencer instructions. Word 0 is the status word, word 1 indicates the length of stored data, and word 2 indicates position. This is shown below: Control Element Addressable Bits Addressable Words...
  • Page 65 Bit location within the element. 0 to 15 Examples: N7:2 Element 2, integer file 7 N7:2/8 Bit 8 in element 2, integer file 7 N10:36 Element 36, integer file 10 (you designate file 10 as an integer file) Allen-Bradley Parts 4–12...
  • Page 66 Chapter 4 Data File Organization and Addressing Indexed Addressing SLC 5/02 An indexed address is offset from its indicated address in the data table. Processors Only Indexing of addresses applies to word addresses in bit and integer data files, preset and accumulator words of timers and counters, and to the length and position words of control elements.
  • Page 67 –3 and a maximum positive offset of Crossing file boundaries allowed: The maximum negative offset extends to the beginning of data file 3. The maximum positive offset extends to the end of the highest numbered file created. Allen-Bradley Parts 4–14...
  • Page 68 Chapter 4 Data File Organization and Addressing Monitoring Indexed Addresses The offset address value is not displayed when you monitor an indexed address. For example, the value at N7:2 appears when you monitor indexed address #N7:2. Example If your application requires you to monitor indexed data, we recommend that you use a MOV instruction to store the value.

  • Page 69: File Copy And File Fill Instructions

    You can program as many bit arrays as you like in a bit file. Be careful that they do not overlap. Bit Data File 3 Address of the bit array is #B3:2 Length of the bit array is 58, entered as a separate parameter #B3:2 in the Bit Shift instruction. INVALID Allen-Bradley Parts 4–16...
  • Page 70 Chapter 4 Data File Organization and Addressing Sequencer Instructions The figure below shows a user-defined file within bit data file 3. For this particular user-defined file, enter the following parameters when programming the instruction: #B3:4 The address of the file. This defines the starting element as element 4, bit file 3.
  • Page 71 Elements 14, 15, N7:15 16, 17, 18, 19. N7:16 N7:17 N7:18 N7:19 Data File 0 - Output Image INVALID INVALID #O:3 O:5.1 O:10 File #O:3 shown above is 5 elements long: Elements 3, 4, 5, 5.1, 9. Allen-Bradley Parts 4–18...
  • Page 72 Chapter 4 Data File Organization and Addressing Creating Data The SLC 500 controller provides the flexibility of a user-configured memory. Data is created, in the Offline mode, in two ways: Assign addresses to instructions in your program – When you assign an address to an instruction in your ladder program, you are allocating memory space in a data file.
  • Page 73 Program constants are used in place of data file elements. They cannot be manipulated by the user program. You must enter the offline program editor to change the value of a constant. See appendix B in this manual for more information on number systems. Allen-Bradley Parts 4–20...
  • Page 74 Chapter 4 Data File Organization and Addressing M0 and M1 Data Files - M0 and M1 files are data files that reside in specialty I/O modules only. Specialty I/O Modules There is no image for these files in the processor memory. The application of these files depends on the function of the particular specialty I/O module.
  • Page 75 M0 instruction is always shown as false. EQUAL Source A N7:12 M0:3.0 Source B N7:3 OTE instruction B3/2 has been added to the rung. This instruction shows the true or false state of the rung. Allen-Bradley Parts 4–22...
  • Page 76 Chapter 4 Data File Organization and Addressing Transferring Data Between Processor Files and M0 or M1 Files As pointed out earlier, the processor does not contain an image of the M0 or M1 file. As a result, you must edit and monitor M0 and M1 file data via instructions in your ladder program.
  • Page 77 M0 or M1 file. This adds 24.36 ms to the scan time of the COP instruction. If you are using a Series C processor, add 0.95 ms plus 0.40 ms per word. This adds 14.55 ms to the scan time of the COP instruction. Allen-Bradley Parts 4–24...
  • Page 78 Chapter 4 Data File Organization and Addressing Minimizing the Scan Time You can keep the processor scan time to a minimum by economizing on the use of instructions addressing the M0 or M1 files. For example, XIC instruction M0:2.1/1 is used in rungs 1 and 2 of figure 1 below, adding approximately 2 ms to the scan time if you are using a Series B processor.
  • Page 79 You can achieve non-retentive operation by unlatching the retentive output with the first pass bit at powerup: This rung is true for M0:2.1 the first scan after powerup to unlatch M0:2.1/1. M0:2.1 M0:2.1 Allen-Bradley Parts 4–26...
  • Page 80 Chapter 4 Data File Organization and Addressing G Data Files - Specialty I/O Some specialty I/O modules use G (confiGuration) files (indicated in the Modules specialty I/O module user’s manual). These files can be thought of as the software equivalent of DIP switches. The content of G files is accessed and edited offline under the I/O Configuration function.
  • Page 81 With the binary format, you edit data at the bit level: G1/19 = 1 Important: Word 0 of the G file is configured automatically by the processor according to the particular specialty I/O module. Word 0 cannot be edited. Allen-Bradley Parts 4–28...
  • Page 82 Chapter Ladder Program Basics This chapter discusses the basic operation of ladder programs. For a more simplified introduction to ladder programming, refer to The Getting Started Guide for HHT, catalog number 1747–NM009. This guide is intended for the first time user. Ladder Programming The ladder program you enter into the controller’s memory contains bit (relay logic) instructions representing external input and output devices.
  • Page 83 From the diagram and table above, we see that the state of bits 10, 11, and 12 indicate that the XIC, XIO, and OTE instructions of our rung are all true. The true/false state of instructions is the basis of controller operation, as indicated in the following paragraphs. Allen-Bradley Parts 5–2...
  • Page 84 Chapter 5 Ladder Program Basics Logical Continuity During controller operation, the processor determines the on/off state of the bits in the data files, evaluates the rung logic, and changes the state of the outputs according to the logical continuity of rungs. More specifically, input instructions set up the conditions under which the processor will make an output instruction true or false.
  • Page 85 The upper limit on the number of levels which can be programmed in a branch structure is 75. The maximum number of instructions per rung is 127. Allen-Bradley Parts 5–4...
  • Page 86 Chapter 5 Ladder Program Basics Input Branching Use an input branch in your application program to allow more than one combination of input conditions to form parallel branches (OR–logic conditions.) If at least one of these parallel branches forms a true logic path, the rung logic is enabled.
  • Page 87 Important: APS allows all branching combinations to be programmed in a fixed, SLC 5/01, or SLC 5/02 processor. The HHT does not support nested input or output branches or additional conditions on output branches to be programmed in a fixed or SLC 5/01 processor. Allen-Bradley Parts 5–6...
  • Page 88 Chapter 5 Ladder Program Basics Nested branches can be converted into non–nested branches by repeating instructions to make parallel equivalents. Example Nested Branch Non-nested Equivalent Parallel Branch 5–7...
  • Page 89 Rung 2 is evaluated as true. XIC B3/11 in the branch of this rung goes true to maintain continuity in the rung. Rung 3 is evaluated as true. Rung 4 is evaluated as true because XIC B3/11 has gone true. The external device represented by OTE O:0/2 is energized. Allen-Bradley Parts 5–8...
  • Page 90 Chapter 5 Ladder Program Basics Application Example Use the following program to achieve the maintained contact action of an On–Off toggle switch using a momentary contact push button. (Press for On; press again for Off.) The first time you press the push button (represented by address I:0/1), instruction B3/11 is latched, energizing output O:0/2.
  • Page 91 Scan 3000 Scan 3001 Goes True The table at the right indicates how the instructions are executed when XIC instruction I:0/1 changes state. Goes Scan 4000 Scan 4001 (I:0/1 represents an external momentary contact push False button.) Allen-Bradley Parts 5–10...
  • Page 92 Chapter 5 Ladder Program Basics Operating Cycle (Simplified) The diagram below shows a simplified operating cycle, consisting of the program scan, discussed in the last section, and the I/O scan. I/O SCAN PROGRAM SCAN In the I/O scan, data associated with external outputs is transferred from the output data file to the output terminals.
  • Page 93 Second scan after input goes true (scan 1001). Input Data File 15 14 13 12 11 10 Input Scan Input Bit Energized Ladder Program I:0.0 Instructions Intensified O:0.0 Program Output Data File Scan 15 14 13 12 11 10 Output Bit Energized Allen-Bradley Parts 5–12...
  • Page 94 Chapter 5 Ladder Program Basics When the Input Goes False Scan before input goes false (scan 1999). Input Data File 15 14 13 12 11 10 Input Scan Input Bit Energized Ladder Program I:0.0 Instructions intensified O:0.0 Program Output Data File Scan 15 14 13 12 11 10 Output Bit Energized...
  • Page 95 1. Energize your HHT. After it goes through the self–diagnostic tests, the main menu display appears: SLC 500 PROGRAMMING SOFTWARE Rel. 2.03 1747 – PTA1E Allen–Bradley Company Copyright 1990 All Rights Reserved PRESS A FUNCTION KEY SELFTEST TERM PROGMAINT UTILITY Allen-Bradley Parts 6–1...
  • Page 96 Chapter 6 Creating a Program 2. Press , PROGMAINT. Then press to view the additional [F3] [ENTER] menu functions (as indicated by the > symbol in the lower right corner). The following display appears: File Name: Prog Name:2345 File Name Type Size(Instr) System...
  • Page 97 Rack 1 = 1746–A4 4–SLOT RACK Rack 2 = NONE Rack 3 = NONE Slot 0 = 1747–L511 CPU–1K USER MEMORY Slot 1 = NONE Slot 1 = NONE OTHER appears on the prompt line. Slot 1 = NONE Allen-Bradley Parts 6–3...
  • Page 98 Chapter 6 Creating a Program 3. Assign the input module found in slot 1 by scrolling with the key. For this example, press the key once to assign the 1746–IA4 module. (The OTHER key is for configuring I/O modules not [F3], found in the list of catalog numbers.
  • Page 99 , MOD_SLT. The following display appears: [F2] Rack 1 = 1746–A7 7–SLOT RACK Rack 2 = NONE Rack 3 = NONE Slot 0 = 1747–L524 CPU–4K USER MEMORY Slot 6 = NONE Slot 6 = NONE OTHER Allen-Bradley Parts 6–5...
  • Page 100 Chapter 6 Creating a Program 4. Press , OTHER. For the RIO Scanner Module, enter the module ID [F3] code. Type , then press . (For some module ID codes, the 13608 [ENTER] HHT may request additional information). The next display appears: Rack 1 = 1746–A7 7–SLOT RACK Rack 2 = NONE...
  • Page 101 For a description of G files, refer to page 4–27 in this manual. 12.Press to edit other words in the G file. The display changes as follows: Address HEX/BCD Data G6:1 0000 G6:2 0000 G6:0 2020 G6:1 = 000 HEX/BCD NEXT_PG PREV_PG Allen-Bradley Parts 6–7...
  • Page 102 Chapter 6 Creating a Program 13.From this display you may choose the data format you prefer to use to configure the module for your application: BINary, DECimal, HEXadecimal/Binary Coded Decimal. Refer to Remote I/O Scanner User Manual, catalog number 1747–NM005, for a detailed description of the configuration specifications.
  • Page 103 Unlike the ladder program name, it is not required that you name the main program file. However, a main program file name is helpful, especially if there are multiple program files, such as a main program file (always file 2) and one or more subroutine files (files 3 through 255). Allen-Bradley Parts 6–9...
  • Page 104 Chapter 6 Creating a Program 1. Continuing from the change name display, press , FILE. This [F4] display appears: ––––––– Change Program/File Name ––––––– File Name: Program Name: 1000 ENTER NAME: 2. Name the main program file 222. Type , then press .
  • Page 105 You can use the master password to change or remove any password. Important: There is no password override to defeat the protection. Contact your Allen-Bradley representative if you are not able to locate your password. Entering Passwords Ordinarily, you do not enter a password until your ladder program is completed, tested, and ready to be applied.
  • Page 106 Chapter 6 Creating a Program 3. Press , ENT. The display prompts you for the password: [F1] File Name: 222 Prog Name:1000 File Name Type Size(Instr) System Reserved Ladder ENTER NEW PASSWORD: 4. Type . Notice that as you enter the characters, ’s are displayed for security reasons: File Name: 222...
  • Page 107 4. Type the new password and press [ENTER]. [ENTER]. 5. Re-type the new password and press 5. Re-type the new master password and press [ENTER]. [ENTER]. 6. Cycle power to the HHT. 6. Cycle power to the HHT. Allen-Bradley Parts 6–13...
  • Page 108 Chapter Creating and Editing Program Files In this chapter you create a ladder program. The topics include: creating and deleting program files editing program files using the search function creating and deleting data files Creating and Deleting As described in chapter 2, a program must contain the main program file (file Program Files 2) for user–programmed instructions defining how the controller is to operate.
  • Page 109 6, the file you Undefined created, is listed as . Although files 4 and 5 are not created, they Ladder are still displayed. You may create the files at a later time by repeating the above procedure. Allen-Bradley Parts 7–2...
  • Page 110 Chapter 7 Creating and Editing a Program File Deleting a Subroutine Program File All created program files (file numbers 3 – 255) can be deleted. You cannot delete files 0 and 1. Deleting file 2 deletes all ladder rungs in the main program file.
  • Page 111 OTE:O0:3.0/0 2.0.0.0.2 power rail or a branch.) displays it as O0:3.0/0 (output file, file 0, slot 3, word 0, terminal 0). < > Indicates the force status of the cursored instruction. > INS_RNG MOD_RNG SEARCH DEL_RNG UND_RNG Allen-Bradley Parts 7–4...
  • Page 112 Chapter 7 Creating and Editing a Program File Entering a Rung To enter a rung, do the following: 1. Press , EDT_FIL from the program maintenance display. The [F3] following display appears: File Name: 222 Prog Name:1000 File Name Type Size(Instr) System Reserved...
  • Page 113 [ESC] re–enter the correct instruction. If you entered the wrong address, press once and re–enter the correct address. When all the information [ESC] displayed is correct, press [ENTER] Allen-Bradley Parts 7–6...
  • Page 114 Chapter 7 Creating and Editing a Program File This zoom display, once again gives you a chance to verify that all the information entered is accurate. Notice that the address displayed is shown in its full format: 2.0.0.0.* ZOOM on XIC NAME: EXAMINE IF CLOSED BIT ADDR: I1:1.0/0...
  • Page 115 > EDT_DAT SAVE_CT SAVE_EX 5. To save and continue editing, press , SAVE_CT, then press [F4] [F5] ACCEPT. Adding a Rung with Branching Refer to chapter 5 for a description and example of different types of branching. Allen-Bradley Parts 7–8...
  • Page 116 Chapter 7 Creating and Editing a Program File Adding a Rung to a Program 1. From the previous display, press for the additional menu [ENTER] functions. The following display appears: 2.0.0.0.* < > > INS_RNG MOD_RNG SEARCH DEL_RNG UND_RNG 2. Press the key once to place the cursor on the of program statement.
  • Page 117 < > cursor is located in program file address are displayed in the 2, rung 1, nest level 0, branch upper left corner. level 0 and on the second > instruction in the rung. Allen-Bradley Parts 7–10...
  • Page 118 Chapter 7 Creating and Editing a Program File Entering a Parallel Branch The five branching instructions available on the HHT are listed below. Function Key Description [F1], Extend Up Adds a parallel branch above the cursored branch. [F2], Extend Down Adds a parallel branch below the cursored branch.
  • Page 119 . The branch is inserted around the examine if closed [ENTER] instruction: 2.1.1.1.* < > EXT_UP EXT_DWN APP_BR INS_BR DEL_BR Inserting an Instruction Within a Branch 1. Press to display the previous editing menu. [ESC] 2.1.1.1.* < > > INS_INST BRANCH MOD_INST ACP_RNG Allen-Bradley Parts 7–12...
  • Page 120 Chapter 7 Creating and Editing a Program File 2. Press , INS_INST, then , BIT, then , —] [— . [F1] [F1] [F1] The zoom display prompts you for the bit address: 2.1.0.0.* ZOOM on XIC NAME: EXAMINE IF CLOSED BIT ADDR: ENTER BIT ADDR: 3.
  • Page 121 0 and on the second instruction in the rung. > INS_RNG MOD_RNG SEARCH DEL_RNG UND_RNG 3. Press , MOD_RNG then , INS_INST, then , BIT for the [F2] [F1] [F1] following display to appear: OTE:O0:3.0/0 NO FORCE 2.0.0.0.2 < > > Allen-Bradley Parts 7–14...
  • Page 122 Chapter 7 Creating and Editing a Program File 4. Press , —] [— for the new examine if closed instruction. The [F1] following zoom display appears: 2.0.0.0.2 ZOOM on XIC NAME: EXAMINE IF CLOSED BIT ADDR: ENTER BIT ADDR: 5. At the prompt, type the address , then press ENTER BIT ADDR:...
  • Page 123 2. To change the address of the second examine if closed instruction, press twice. 3. With the cursor positioned on the examine if closed instruction with address , press , MOD_RNG. The following display I1:1.0/2 [F2] appears: NO FORCE 2.0.0.0.2 XIC:I1:1.0/2 < > > INS_INST BRANCH MOD_INST ACP_RNG Allen-Bradley Parts 7–16...
  • Page 124 Chapter 7 Creating and Editing a Program File 4. Press , MOD_INST, then [F3] [ZOOM] The following display appears with the cursor on the first character of the instruction address, on the prompt line: 2.0.0.0.2 ZOOM on XIC NAME: EXAMINE IF CLOSED BIT ADDR:I1:1.0/2 ENTER BIT ADDR: I1:1.0/2...
  • Page 125 3. Press , MOD_INST, then , BIT, then , —] / [— . The [F3] [F1] [F2] following zoom display appears: 2.0.0.0.2 ZOOM on XIO NAME: EXAMINE IF OPEN BIT ADDR: I1:1.0/1 ENTER BIT ADDR: I1:1.0/1 EDT_DAT ACCEPT Allen-Bradley Parts 7–18...
  • Page 126 Chapter 7 Creating and Editing a Program File 4. Since all the information is correct, press , ACCEPT. [F5] The new instruction is inserted into the rung. NO FORCE 2.0.0.0.2 XIC:I1:1.0/1 < > > 5. To accept the new instruction, press twice to display the proper [ESC] menu, then press...
  • Page 127 INS_BR DEL_BR 4. Press , EXT_UP. The display changes as follows: [F1] 2.1.1.1.* < > EXT_UP EXT_DWN APP_BR INS_BR DEL_BR 5. Press . The proper menu is displayed: [ESC] 2.1.1.1.* < > > INS_INST BRANCH MOD_INST ACP_RNG Allen-Bradley Parts 7–20...
  • Page 128 Chapter 7 Creating and Editing a Program File 6. First insert the examine if closed instruction with address B3/1, by pressing , INS_INST, then , BIT, then , —] [— . [F1] [F1] [F1] 7. In the zoom display type the address , then press , then, B3/1...
  • Page 129 1, branch level 2 of rung 1; by pressing the key , then the key, then the key twice. The display changes to the following: 2.1.1.2.* Cursor Location < > > INS_RNG MOD_RNG SEARCH DEL_RNG UND_RNG Allen-Bradley Parts 7–22...
  • Page 130 Chapter 7 Creating and Editing a Program File 3. Press , MOD_RNG, then , BRANCH. [F2] [F2] The following menu display appears: 2.1.1.2.* < > EXT_UP EXT_DWN APP_BR INS_BR DEL_BR 4. Press , EXT_DWN. The display changes as follows: [F2] 2.1.1.3.* EXT_UP EXT_DWN APP_BR...
  • Page 131 0: 2.1.1.0.* > 3. Press , MOD_RNG, then , BRANCH. The branch menu display [F2] [F2] appears: 2.1.1.0.* EXT_UP EXT_DWN APP_BR INS_BR DEL_BR Allen-Bradley Parts 7–24...
  • Page 132 Chapter 7 Creating and Editing a Program File 4. Press [F3], APP_BR. The following display appears: 2.1.1.0.* SELECT BRANCH TARGET, PRESS ENTER 5. Press the key once to place the cursor to the right of the output. 2.1.1.0.6 SELECT BRANCH TARGET, PRESS ENTER 6.
  • Page 133 Modify rung 1 of your program to appear as follows: O:3.0 I:1.0 O:3.0 I:1.0 Important: Unlike the delete rung and delete instruction commands, there is no associated undelete branch command, in the HHT, to re–insert a deleted branch. Allen-Bradley Parts 7–26...
  • Page 134 Chapter 7 Creating and Editing a Program File 1. From the previous save and continue display, press for the main [ENTER] editing display menu: 2.0.0.0.* > INS_RNG MOD_RNG SEARCH DEL_RNG UND_RNG 2. Press the key to position the cursor on rung 1, then press , MOD_RNG.
  • Page 135 DEL_BR 7. To remove the bottom branch level, press , then , DEL_BR. [F5] 8. Press , YES, then press , to return to the previous display. [F2] [ESC] Press , ACP_RNG and save the changes. [F5] Allen-Bradley Parts 7–28...
  • Page 136 Chapter 7 Creating and Editing a Program File Deleting an Instruction Modify your program to appear as follows: I:1.0 I:1.0 O:3.0 O:3.0 I:1.0 I:1.0 O:3.0 1. From the previous save and continue display, press for the main [ENTER] editing display menu: 2.0.0.0.* <...
  • Page 137 Then press [F2] MOD_RNG, then [ENTER] The undelete instruction command operates the same as the insert instruction command. The instruction is placed to the left of the cursor Allen-Bradley Parts position. 7–30...
  • Page 138 Chapter 7 Creating and Editing a Program File 6. Press , UND_INST, then , then , ACP_RNG. The [F4] [ENTER] [F5] examine if closed instruction is now pasted into rung 0. 2.1.0.0.* < > > INS_RNG MOD_RNG SEARCH DEL_RNG UND_RNG 7.
  • Page 139 7. To change the addresses of the instructions in the new rungs, position the cursor on the first instruction by pressing the key. The address appears in the upper left corner of the display: XIC:I1:1.0/0 NO FORCE 2.2.0.0.1 > INS_RNG MOD_RNG SEARCH DEL_RNG UND_RNG Allen-Bradley Parts 7–32...
  • Page 140 Chapter 7 Creating and Editing a Program File 8. Press , MOD_RNG, then , MOD_INST, then . The [F2] [F3] [ZOOM] zoom display for that instruction appears: 2.2.0.0.1 ZOOM on XIC NAME: EXAMINE IF CLOSED BIT ADDR:I1:1.0/0 ENTER BIT ADDR: I1:1.0/0 EDT_DAT ACCEPT...
  • Page 141 18. Save and compile your changes. Abandoning Edits If you have made changes that you do not want and they are not saved, press , YES. This deletes your edits up to the last program save. [ESC] [F2] Allen-Bradley Parts 7–34...
  • Page 142 Chapter 7 Creating and Editing a Program File The Search Function The search function allows you to quickly locate instructions and addresses in ladder program files. This section shows you how to search for: instruction types, such as XIC addresses, such as I:1/2 combined instruction/address, such as OTE + O:3/4 forced I/O instructions a specific rung...
  • Page 143 [F5], FORCE Searches for all forces installed in a program. Additionally, a search rung feature is available from either the offline, edit file display or the online, monitor file display, using the key located [RUNG] on the keypad. Allen-Bradley Parts 7–36...
  • Page 144 Chapter 7 Creating and Editing a Program File Searching for an Instruction In this example, search for every examine if closed instruction (XIC) in the program, regardless of address. A search can be initiated with the cursor located anywhere in the program. In this example, the cursor is located on the left power rail of rung 0.
  • Page 145 A search can be initiated with the cursor located anywhere in the program. 1. Use the cursor keys to position the cursor on the left power rail of rung 0: 2.0.0.0.* > INS_RNG MOD_RNG SEARCH DEL_RNG UND_RNG Allen-Bradley Parts 7–38...
  • Page 146 Chapter 7 Creating and Editing a Program File 2. Press , SEARCH. The search display appears: [F3] 2.0.0.0.* CUR–INS CUR–OPD NEW–INS FORCE 3. To search for the specific address, press , then type the [SHIFT] abbreviated form of the address, .
  • Page 147 1. Use the cursor keys to position the cursor on the left power rail of rung 0: 2.0.0.0.* > INS_RNG MOD_RNG SEARCH DEL_RNG UND_RNG 2. Press , SEARCH. The search display appears: [F3] 2.0.0.0.* CUR–INS CUR–OPD NEW–INS FORCE Allen-Bradley Parts 7–40...
  • Page 148 Chapter 7 Creating and Editing a Program File 3. Press , NEW–INS, then , BIT, then , —( )— , then [F3] [F1] [F3] . The following display appears, with the instruction mnemonic [ENTER] displayed in the search buffer: 2.0.0.3.* Instruction Mnemonic OTE + for the Output Energize...
  • Page 149 ATTENTION: Use the search force function to locate all forces that have been uploaded to the HHT. Downloading a program containing forces can cause personal injury and damage to equipment. Allen-Bradley Parts 7–42...
  • Page 150 &KDSWHU  &UHDWLQJ DQG (GLWLQJ D 3URJUDP )LOH ,Q WKLV H[DPSOH D IRUFH KDV EHHQ LQVHUWHG LQWR WKH ODGGHU SURJUDP RQ LQSXW , 6WDUW IURP WKH RIIOLQH HGLW ILOH GLVSOD\ ZLWK WKH FXUVRU SRVLWLRQHG RQ WKH OHIW SRZHU UDLO RI UXQJ  2.0.0.0.* >...
  • Page 151  7R VHDUFK IRU UXQJ  VWDUW DW WKH IROORZLQJ GLVSOD\ ZLWK WKH FXUVRU ORFDWHG RQ WKH OHIW SRZHU UDLO RI UXQJ  2.0.0.0.* > INS_RNG MOD_RNGSEARCH DEL_RNG UND_RNG  3UHVV  7KH IROORZLQJ SURPSW DSSHDUV [RUNG] 2.0.0.0.* ENTER RUNGNUMBER: > INS_RNG MOD_RNG SEARCH DEL_RNG UND_RNG Allen-Bradley Parts ï...
  • Page 152 &KDSWHU  &UHDWLQJ DQG (GLWLQJ D 3URJUDP )LOH  7\SH  WKHQ SUHVV  7KH FXUVRU LV QRZ SRVLWLRQHG RQ WKH OHIW [ENTER] SRZHU UDLO RI UXQJ  2.3.0.0.* < > > INS_RNG MOD_RNGSEARCH DEL_RNG UND_RNG  7R VHDUFK IRU DGGLWLRQDO UXQJV UHSHDW VWHSV  WKURXJK  &UHDWLQJ DQG 'HOHWLQJ 7KH PHPRU\ PDS IXQFWLRQ DOVR DOORZV \RX WR FUHDWH DQG GHOHWH GDWD HOHPHQWV DQG ILOHV 7R ORFDWH WKH 0HPRU\ 0DS IXQFWLRQ IURP WKH ++7·V PDLQ PHQX...
  • Page 153 S status S2:15 CRT DT DEL DT NEXT PG PREV PG PRG SIZE 7KH PHPRU\ PDS QRZ LQGLFDWHV WKDW WKH LQWHJHU 1 ILOH  VL]H LV  HOHPHQWV HTXLYDOHQW WR  ZRUGV DQG WKH ODVW DGGUHVV LV 1 Allen-Bradley Parts ï...

  • Page 154: Saving And Compiling A Program

    Chapter Saving and Compiling a Program This chapter discusses the procedures used to save and compile ladder programs. Topics include: save and continue editing save and exit offline editing view memory layout Saving and Compiling When you are entering a new program or editing an existing program, the ladder program is stored in the work area of the HHT.
  • Page 155 Toggles between Outputs, None, and All. This option allows you to protect your data table files from external modification by devices on the DH-485 network. [F5], ACCEPT Starts the compile. 3. After you have made your selections press , ACCEPT. [F5] Allen-Bradley Parts 8–2...
  • Page 156 Chapter 8 Compiling and Saving a Program If you selected SAVE_CT, you are returned to the editing display when the compile and save is complete. If you selected SAVE_EX, the following display appears: File Name: 222 Prog Name:1000 File Name Type Size(Instr) System...
  • Page 157 Outputs: Only the output file (O0) is protected from external data modification. This is the default selection. None: External devices may change any data address within the data table files, including the output file (O0). All: The entire data table is protected from external data modification. Allen-Bradley Parts 8–4...
  • Page 158 Chapter 8 Compiling and Saving a Program Viewing Program Memory The memory map function allows you to view your program memory layout. Layout It shows you the type and size of the data files used. It also gives you a summary of the number of the program files created and the number of instructions used in them.
  • Page 159 ––––––––––––– MEMORY LAYOUT ––––––––––––– **** data words used in *** data files **** instr. used in *** program files **** instructions of available memory 3. Press three times to return to the main menu display. [ESC] Allen-Bradley Parts 8–6...

  • Page 160: Configuring Online Communication

    Chapter Configuring Online Communication This chapter describes online communication between the HHT and SLC 500 processors. Topics include: online configuration the Who function Online Configuration As described in chapter 1, the HHT may be connected directly to a port located on an SLC 500 processor or it may be connected to any fixed, SLC 5/01, or SLC 5/02 processor that is active on a DH–485 network.
  • Page 161 , ONLINE. The display changes as [F1] follows: File Name: 222 Prog Name:1000 File Name Type Size(Instr) System Display toggles between the Reserved processor node address and Ladder the processor operating Ladder mode. > OFFLINE UPLOAD DWNLOAD MODE CLR_PRC Allen-Bradley Parts 9–2...
  • Page 162 Chapter 9 Configuring Online Communication Because the program files match, there are 2 menu screens and 10 function keys. The greater than sign ( ), in the lower right corner of the display, > indicates that a second function key menu is available. The following functions are available to you: Function Key Description...
  • Page 163 In the following sections, “selected” refers to the node nearest the top of the display. The current node is also indicated on the status line of the display. To change the node address, or to view additional nodes on the network, use keys. Allen-Bradley Parts 9–4...
  • Page 164 Chapter 9 Configuring Online Communication The following functions are available from the Who display: Function Key Description Allows you to monitor the status of the network [F1], DIAGNSTC or the selected node. Initiates communication with the selected node for uploading/downloading a program, changing the processor operating mode, clearing [F3], ATTACH processor memory, changing processor...
  • Page 165 NAK Sent: NAK Rcvd: Node Addr: 2 RESET 4. From this display, you can reset the messages sent and messages received counters by pressing , RESET. [F5] 5. Press twice to return to the Who menu. [ESC] Allen-Bradley Parts 9–6...
  • Page 166 Chapter 9 Configuring Online Communication Attach The Attach function initiates communication between the HHT and a processor. The Attach function allows you to: upload/download a program change processor operating modes clear the processor memory enter or remove a password/master password transfer memory between processor RAM and EEPROM monitor program execution monitor and change data file values...
  • Page 167 Node Configuration The Node Configuration function allows you to configure a processor or the HHT for online communication. The Node Configuration functions are: change the node address change the maximum address Allen-Bradley Parts change the baud rate 9–8...
  • Page 168 Chapter 9 Configuring Online Communication Begin at the WHO display. Press , NODE_CFG. [F4] Node Addr. Device Max Addr./Owner 5/02 (31) 500–20 (31) 5/01 (31) (31) Node Addr: Baud Rate: 19200 CHG_ADDR MAX_ADDR BAUD The following functions are available from this menu: Function Key Description Allows you to change the node address of your...
  • Page 169 Ownership means that as long as the owner is active on the network, other terminals cannot access the online functions of the owned processor files. Only a programming device can own a processor. Allen-Bradley Parts 9–10...
  • Page 170 Chapter 9 Configuring Online Communication When the owner exits the network or goes offline, another terminal can clear the ownership of the inactive node and gain access to an owned processor file. In this example, the SLC 5/02 processor with node address 5 is owned by the APS terminal with address 0, which is no longer online.
  • Page 171 ATTENTION: If two processors on the DH–485 network are assigned the same node address, it is possible that the processor file in one of the processors will be lost and replaced with the default file. Allen-Bradley Parts 9–12...

  • Page 172: Downloading/Uploading A Program

    Chapter Downloading/Uploading a Program This chapter discusses how to: download a program from the HHT to a processor upload a program from a processor to the HHT Downloading a Program When you have finished creating your program offline, you must download it from the HHT to a processor.
  • Page 173 If the above display appears and the processor is not in the Program mode, do the following: a. Press , MODE. [F4] b. Press , PROGRAM. [F5] c. Press , YES. [F2] d. Press [ESC]. Refer to the following chapter for details regarding processor modes. Allen-Bradley Parts 10–2...
  • Page 174 Chapter 10 Downloading/Uploading a Program 6. Press , DWNLOAD. The following display appears: [F3] Program Directory Programmer Processor Prog: 1000 Prog: 1952 File: File: Exec Files: Exec Files: Data Files: Data Files: DOWNLOAD TO PROCESSOR? 7. Press , YES to confirm. If necessary, the HHT requests you to [F2] compile the program.
  • Page 175 3 as the [F2] current node. The display should appear as follows: Node Addr. Device Max Addr./Owner 500–20 Indicates that node 3 5/01 is the current node. 5/02 TERMINAL Node Addr: Baud Rate: 19200 DIAGNSTC ATTACH NODE_CFG OWNER Allen-Bradley Parts 10–4...
  • Page 176 Chapter 10 Downloading/Uploading a Program 4. Press , ATTACH. If a password is required for program 03CLOCK, [F3] the following display appears: Program Directory Programmer Processor Prog: 1000 Prog: 03CLOCK File: File: Exec Files: Exec Files: Data Files: Data Files: ENTER PASSWORD: or this display appears after the password is entered (for the current online program, which is 03CLOCK) or if a password is not required:...
  • Page 177 Monitor the ladder program in the processor without rung state indication. Set up I/O forces without enables being executed. Use the search function. Monitor last run mode state of data files. Edit data files. Transfer programs to and from a memory module. Allen-Bradley Parts 11–1...
  • Page 178 Chapter 11 Processor Modes Test Mode The Test mode allows you to: Monitor the current ladder program as it is being executed. Use the search function. Force I/O. Monitor and edit data. While you are in the Test mode, the processor scans or executes the ladder program, monitors input devices, and updates the output data files without energizing output circuits or devices.
  • Page 179 , YES. The display changes as follows: [F2] File Name: 222 Prog Name:1000 File Name Type Size(Instr) System Reserved Ladder Ladder Display toggles between the processor node address and the processor operating TEST PROGRAM mode, which is now Run. Allen-Bradley Parts 11–3...

  • Page 180: Monitoring Controller Operation

    Chapter Monitoring Controller Operation This chapter briefly describes monitoring controller operation. Topics include: monitoring a program file monitoring data files monitoring data file displays online data changes Monitoring a Program File The following demonstrates how to monitor a program file while online: 1.
  • Page 181 Data Files 9–255 – User created files. They can be bit, timer, counter, control, and integer files. When offline, use data files 3–255 to set up sequencers, math routines, “recipes,” and look-up tables. When online, use data files to reset timers and counters, and sequencers to test and/or troubleshoot. Allen-Bradley Parts 12–2...
  • Page 182 Chapter 12 Monitoring Controller Operations Accessing Data Files There are four ways to access the data table: Option 1 While offline, press , PROGMAINT, from the menu display, then [F3] , and , EDT_DAT. [ENTER] [F1] Option 2 While monitoring a program offline, press , EDT_DAT.
  • Page 183 Displays the next consecutive file in the data table [F3], PREV_FL Displays the previous file in the data table [F4], NEXT_PG Displays the next page of elements in the existing data file Displays the previous page of elements in the existing data [F5], PREV_PG file Allen-Bradley Parts 12–4...
  • Page 184 Chapter 12 Monitoring Controller Operations Data File Displays The following section provides you with an example of what each data table display appears as. The radix (or number system) that the file elements are displayed in is fixed: binary for Input, Output, and Bit files; decimal for Integer files;...
  • Page 185 Enter 3 for 9600 S2:2 Proc Status 1000 0000 0000 0010 Enter 4 for 19200 S2:15H = 4 S2:0/0 = 0 ADDRESS NEXT FL PREV FL NEXT PG PREV PG ADDRESS NEXT FL PREV FL NEXT PG PREV PG Allen-Bradley Parts 12–6...
  • Page 186 Chapter 12 Monitoring Controller Operations The displays below show the 33–word status file for a SLC 5/02 processor. To move between displays, press [ ], NEXT_PG. To display the next consecutive data file – the bit data file, press [ ], NEXT_FL.
  • Page 187 The preset is currently 10 and the accumulator is 0. Counter C5:0 CD DN UN UA STATUS PRESET ACCUM STATUS=000000 ADDRESS NEXT_FL PREV_FL NEXT_PG PREV_PG To display the next consecutive data file – the control data file, press [ Allen-Bradley Parts NEXT_FL. 12–8...
  • Page 188 Chapter 12 Monitoring Controller Operations Control Data File (R6) The display below show the control data file. The cursor is on the enable bit EN (bit 15) of control element R6:0. The control word bits EN, EU, DN, EM, ER, UL, IN, and FD (bits 15, 14, 13, 12, 11, 10, 9, and 8 respectively) are all reset.
  • Page 189 (ACCUM). Type (maximum value) 32767 and press [ ]. The display appears as follows: ENTER Counter C5:0 CD DN UN UA STATUS PRESET 32767 ACCUM 32766 STATUS=32766 ADDRESS NEXT_FL PREV_FL NEXT_PG PREV_PG Allen-Bradley Parts 12–10...
  • Page 190 Chapter 12 Monitoring Controller Operations 3. Increment the counter by turning on I:1/0. The accumulator value equals the preset value, the done bit DN (bit 13) is set, and rung 2 is true. 4. Increment the counter again. The is in an overflow condition, setting the overflow bit OV (bit 12).
  • Page 191 Note: If you have not yet entered this program and downloaded, refer I:0.0 to chapter 10. The controller configuration and I/O addresses programmed in the HHT must match the controller you download to. This program is written for a fixed controller. O:0.0 Allen-Bradley Parts 13–1...
  • Page 192 Chapter 13 The Force Function Forcing an External Input Installing forces on input data file bits only affects the input force table. However, enabling the installed forces affects the input force table, input data file, and, thus, the program logic. The effects on the program logic of installed and enabled forces can be seen in both the Run and Test modes.
  • Page 193 F appearing on the prompt line. This is also indicated by the FORCED I/O LED on the controller, which is now flashing. 3. Enable the force by pressing [ ], ENABLE. The prompt ARE YOU is indicated. SURE? XIC: I1:0.0/1 FORCE ON 2.0.0.0.1 ARE YOU SURE? F RUN Allen-Bradley Parts 13–3...
  • Page 194 Chapter 13 The Force Function 4. To verify enabling of forces, press [ ]. The force is enabled. The letter on the prompt line is now on continuously. Also, the FORCED I/O LED of the processor is on continuously. XIC: I1:0.0/1 FORCE ON 2.0.0.0.1 F RUN...
  • Page 195 RUN. The FORCED I/O LED of the processor is off. XIC: I1:0.0/1 NO FORCE 2.0.0.0.1 REM_ALL ENABLE 5. Press [ ] to exit the force function: XIC: I1:0.0/1 NO FORCE 2.0.0.0.1 MODE FORCE EDT DAT SEARCH Allen-Bradley Parts 13–5...
  • Page 196 Chapter 13 The Force Function Searching for Forced I/O To search for forced I/O, you can have the cursor located anywhere in the program at the beginning of the search. In the following display, the cursor is located in rung 0, on a forced instruction. The force is enabled. 1.
  • Page 197 FORCE ON 2.0.0.0.1 ENTER TO FIND FORCE Notes: The search locates all forced instructions, regardless of instruction type or address. The search for forced instructions can be done online while monitoring, or offline while editing a file. Allen-Bradley Parts 13–7...
  • Page 198 Chapter 13 The Force Function Forcing an External Output A forced external output circuit is independent of the internal logic of the ladder program and the output data file. Installing forces on output circuits only affects the output force table. Enabling installed forces does not affect the output data file or the program logic.
  • Page 199 FORCE OFF indications appear in the offline ladder diagram displays, although the I/O data files do not change. If you subsequently remove the forces online, then go offline, the FORCE ON and FORCE OFF indications no longer appear in the offline ladder diagram displays. Allen-Bradley Parts 13–9...

  • Page 200: Using Eeproms And Uvproms

    Chapter Using EEPROMs and UVPROMs This chapter describes: using an EEPROM memory module EEPROM burning options using a UVPROM memory module Using an EEPROM Memory You can transfer a program from the processor to an EEPROM and vice Module versa. The procedures are similar. Make sure the EEPROM is installed in the processor.
  • Page 201 XFERRING PROC TO MEMORY momentarily, then returns to this display: MODULE File Name: 222 Prog Name:1000 File Name Type Size(Instr) System Reserved Ladder Ladder PASSWRD XFERMEM EDT_DAT MONITOR> A copy of the program has been transferred to the EEPROM. Allen-Bradley Parts 14–2...
  • Page 202 Chapter 14 Using EEPROMs and UVPROMs Transferring a Program from an EEPROM Memory Module 1. Establish online communication with the processor. Refer to chapter 9. 2. Change the processor mode to Program. Refer to chapter 11. 3. If the DEFAULT file is in the processor, continue to step 4. If the processor and HHT programs do not match, upload or download to make the programs match.
  • Page 203 9. To transfer the program from the memory module to the processor RAM, press [ ], MEM_PRC. File Name: 222 Prog Name:1000 File Name Type Size(Instr) System Reserved Ladder Ladder XFER MEMORY MODULE TO PROC? The prompt line asks you to verify your choice. Allen-Bradley Parts 14–4...
  • Page 204 Chapter 14 Using EEPROMs and UVPROMs 10.Press [ ]. The prompt line indicates XFERRING MEMORY MODULE TO PROC momentarily, then returns to this display: Program Directory Programmer Processor Prog: 1000 Prog: 1066 File: File: Exec Files: Exec Files: Data Files: Data Files: PROGRAM FILES DIFFER OFFLINE...
  • Page 205 INT INTELLEC 8/MDS Hex file format as created by the Advanced Programming Software PROM Translator Utility. Refer to the APS User Manual. The 1747–M1 or 1747–M2 EEPROM would contain the program to be transferred to the 1747–M3 or 1747–M4 UVPROM. Allen-Bradley Parts 14–6...

  • Page 206: Instruction Set Overview

    Chapter A–B Instruction Set Overview This chapter: takes a brief look at the instruction set lists the name, mnemonic, and function of each instruction points out the instructions that can be used only with SLC 5/02 processors Important: To avoid misapplication, do not apply any of the instructions until you have read the detailed descriptions in chapters 16 through 26.
  • Page 207 Used with timers and counters. When conditions preceding it in the rung are true, the RES instruction resets the accumulated value and control bits of the timer or counter. It is also used to reset position value and control bits of a sequencer. Allen-Bradley Parts 15–2...
  • Page 208 Chapter 15 Instruction Set Overview I/O Message and Communications Instructions – Chapter 18 5/02 Instruction Name Only Function - Output Instructions and Mnemonic Immediate Input When conditions preceding it in the rung are true, the with Mask IIM instruction is enabled and interrupts the program scan to read the status of a word of external inputs and transfer it through a mask to the input data file.
  • Page 209 If the Equal values match the instruction is true. Limit Test True/false status of the instruction depends on how a test value compares to specified low and high limits. Allen-Bradley Parts 15–4...
  • Page 210 Chapter 15 Instruction Set Overview Math Instructions – Chapter 20 5/02 Instruction Name Only Function - Output Instructions and Mnemonic When rung conditions are true, the ADD instruction adds source A to source B and stores the result in the destination.

  • Page 211: Move And Logical Instructions

    When rung conditions are true, the COP instruction copies a user defined source file to the destination file. File Fill When rung conditions are true, the FLL instruction loads a source value into a specified number of elements in a user defined file. Allen-Bradley Parts 15–6...

  • Page 212: Bit Shift, Fifo, And Lifo Instructions

    Chapter 15 Instruction Set Overview Bit Shift, FIFO, and LIFO Instructions – Chapter 23 5/02 Instruction Name Only Function - Output Instructions and Mnemonic Bit Shift Left On each false-to-true transition, these instructions Bit Shift Right load a bit of data into a bit array, shift the pattern of data through the array, and unload the end bit of data.
  • Page 213 STS initiates an STI. Interrupt Subroutine Conditional instruction. Placed as the first instruction in a Selectable Timed Interrupt subroutine file or an I/O Event-Driven Interrupt subroutine file. Identifies the subroutine as an interrupt file. Allen-Bradley Parts 15–8...
  • Page 214 Chapter 15 Instruction Set Overview Proportional Integral Derivative Instruction – Chapter 26 5/02 Instruction Name Only Function - Output Instruction and Mnemonic Proportional This instruction is used to control physical properties Integral Derivative such as temperature, pressure, liquid level, or flow rate of process loops.
  • Page 215 Use these instructions for the internal relay logic of your program. timer, counter, and control data files. The instructions use various control bits. the integer data file. The instructions are used (on the bit level) as your program requires. Allen-Bradley Parts 16–1...
  • Page 216 Chapter 16 Bit Instructions Examine if Closed (XIC) Examine if Closed Input Instruction HHT Ladder Display: ZOOM on XIC –] [– 2.0.0.0.1 HHT Zoom Display: NAME: EXAMINE IF CLOSED (online monitor mode) BIT ADDR: I1:1.0/0 ***************0 EDT_DAT I:1.0 Ladder Diagrams and APS Displays: Bit Address State XIC Instruction Logic States:...
  • Page 217 I/O scan, causing the XIO instruction to be true. When the input device completes its circuit, the input terminal will be On; the processor then finds the bit set (1) during an I/O scan, causing the XIO instruction to be false. Allen-Bradley Parts 16–3...
  • Page 218 Chapter 16 Bit Instructions Output Energize (OTE) Output Energize Output Instruction HHT Ladder Display: ZOOM on OTE –( )– 2.3.0.0.2 HHT Zoom Display: NAME: OUTPUT ENERGIZE (online monitor mode) BIT ADDR: O0:2.0/7 ********0******* EDT_DAT O:2.0 Ladder Diagrams and APS Displays: Specific operation of an OTE instruction having an input data file address: The status of an output terminal is reflected in the output data file at a particular bit address.
  • Page 219 (1). An OTU instruction with the same address as the OTL instruction resets (0) the bit in memory. Allen-Bradley Parts 16–5...
  • Page 220 Chapter 16 Bit Instructions When the processor changes from the Run to the Program mode or when power is lost (provided there is battery backup or the capacitor retains memory), the last true output latch or output unlatch instruction in the ladder program continues to control the bit in memory.
  • Page 221 The bit address you use for this instruction must be unique. Do not use it elsewhere in the program. We recommend that you do not use an input or output address to program the address parameter of the OSR instruction. The following rungs illustrate the use of the OSR instruction. Allen-Bradley Parts 16–7...
  • Page 222 Chapter 16 Bit Instructions Fixed, SLC 5/01, SLC 5/02 Processors O:3.0 I:1.0 [OSR] When the input instruction goes from false-to-true, the OSR instruction conditions the rung so that the output goes true for one program scan. The output goes false and remains false for successive scans until the input makes another false-to-true transition.
  • Page 223 When the accumulated value becomes equal to or greater than the preset Allen-Bradley Parts value, the done status bit is set. You can use this bit to control an output device.
  • Page 224 Chapter 17 Timer and Counter Instructions Preset and accumulated values for timers range from 0 to +32,767. If a timer preset or accumulated value is a negative number, a runtime error occurs and places the processor in a fault condition. Preset and accumulated values for counters range from –32,768 to +32,767.
  • Page 225 Upon return to the Run or Test mode, the following can happen: If the rung is true, the accumulated value is reset, and the timing and Allen-Bradley Parts enable bits remain set. If the rung is false, the accumulated value is reset and the control bits are reset.
  • Page 226 Chapter 17 Timer and Counter Instructions Timer Off Delay (TOF) Timer Off-Delay Output Instruction HHT Ladder Display: (TOF) ZOOM on TOF –(TOF)– 2.0.0.0.2 HHT Zoom Display: NAME: TIMER OFF DELAY (online monitor mode) TIMER: T4:1 TIME BASE .01 SEC PRESET: ACCUM: EN TT DN EDT_DAT...
  • Page 227 By retaining its accumulated value, retentive timers measure the cumulative period during which rung conditions are true. You can use this instruction to turn an output on or off depending on your ladder logic. Allen-Bradley Parts 17–5...
  • Page 228 Chapter 17 Timer and Counter Instructions Status Bits The done bit (DN) is set when the accumulated value is equal to the preset value. However, it is not reset when rung conditions become false; it is reset only when the appropriate RES instruction is enabled. The timing bit (TT) is set when rung conditions are true and the accumulated value is less than the preset value.
  • Page 229 The accumulated value is retained after the CTU or CTD instruction goes false, and when power is removed from and then restored to the processor. Also, the on or off status of counter done, overflow, and underflow bits is retentive. Allen-Bradley Parts 17–7...
  • Page 230 Chapter 17 Timer and Counter Instructions Status Bits The control word for counter instructions includes six status bits, indicated in the figure below. 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 CU CD DN OV UN UA Not Used Preset Value Accumulated Value...
  • Page 231 HIGH–SPEED COUNTER (CU) Counter C5:0 Preset (DN) Accum The High–Speed Counter is a variation of the CTU counter. The HSC instruction is enabled when the rung logic is true and disabled when the rung logic is false. Allen-Bradley Parts 17–9...
  • Page 232 Chapter 17 Timer and Counter Instructions Important: This instruction provides high–speed counting on fixed controllers with 24 VDC inputs. One HSC instruction allowed per controller. To use the instruction, you must clip a jumper as described in the installation manual, catalog number 1747–NI002.
  • Page 233 3, executing the HSC logic. After the HSC logic is executed, the DN bit is reset by an unlatch instruction, and program execution returns to the main program file. Allen-Bradley Parts 17–11...
  • Page 234 Chapter 17 Timer and Counter Instructions Program File 2 - Poll for DN Bit in Main Program File Rung C5:0 JUMP TO SUBROUTINE SBR file number C5:0 JUMP TO SUBROUTINE SBR file number C5:0 JUMP TO SUBROUTINE SBR file number Program File 3 - Execute HSC Logic Rung SUBROUTINE...
  • Page 235 ATTENTION: Because the RES instruction resets the accumulated value, and the done, timing, and enabled bits, do not use the RES instruction to reset a TOF instruction. Unpredictable machine operation or injury to personnel may occur. Allen-Bradley Parts 17–13...
  • Page 236 Chapter A–B I/O Message and Communication Instructions This chapter discusses the following output instructions. Instructions for use with fixed, SLC 5/01, and SLC 5/02 processors: – Immediate Input with Mask (IIM) – Immediate Output with Mask (IOM) Instructions for use with SLC 5/02 processors only: –...
  • Page 237 Use this bit as a condition of an SVC instruction to enhance the communications capability of your processor. You may also be concerned with the function of status file bit S:2/15, DH–485 Communications Servicing Selection Bit. Refer to chapter 27. Allen-Bradley Parts 18–2...
  • Page 238 Chapter 18 I/O Message and Communication Instructions Available Configuration Options The following configuration options are available with a SLC 5/02 processor: Peer–to–Peer Write on a local network to another SLC 500 processor Peer–to–Peer Read on a local network to another SLC 500 processor Peer–to–Peer Write on a local network to a 485CIF (PLC2 emulation) Peer–to–Peer Read on a local network to a 485CIF (PLC2 emulation) Entering Parameters...
  • Page 239 If this is a write message instruction, this parameter is the local source file address, the address in the local processor which stores data that is written to the target node. Valid file types are S, B, T, C, R, N. Allen-Bradley Parts 18–4...
  • Page 240 Chapter 18 I/O Message and Communication Instructions After you enter an address, the display changes to the following. 5. Target Node – ZOOM on MSG –(MSG)– 2.0.0.0.* NAME: MESSAGE READ/WRITE MSG TYPE: WRITE LD/LS ADDR:N7:40 TARGET: 500 CPU TARG NODE: 0 CTRL BLK: N7:0 TARG OS/AD: CTRL BLK 7 WORDS...
  • Page 241 MSG LEN: SELECT MESSAGE TYPE. READ WRITE ACCEPT Pressing , ACCEPT, completes the entry of parameters. If you must [F5] change any of the parameters, you can run through the entry of parameters again before you press ACCEPT. Allen-Bradley Parts 18–6...
  • Page 242 Chapter 18 I/O Message and Communication Instructions Control Block Layout The control block layout if you select 500 CPU as the target device: Control Block Layout - 500 CPU Word 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 EN ST DN ER EW NR TO Error Code...
  • Page 243 CTRL BLK: N7:0 TARG OS/AD:N7:6 EN ST DN ER NR TO MSG LEN: EDT_DAT Successful MSG Instruction Timing Diagram Target node processes packet Target node successfully and returns data receives packet. Rung goes True. (read) or writes data (success). Allen-Bradley Parts 18–8...
  • Page 244 &KDSWHU  ,2 0HVVDJH DQG &RPPXQLFDWLRQ ,QVWUXFWLRQV 06* ,QVWUXFWLRQ (UURU &RGHV :KHQ DQ HUURU FRQGLWLRQ RFFXUV WKH HUURU ELW (5 LV VHW 7KH ORZHU E\WH RI WKH ILUVW ZRUG LQ WKH FRQWURO EORFN LQGLFDWHV WKH W\SH RI HUURU (UURU &RGH (UURU &RGH (UURU &RGH 'HVFULSWLRQ RI (UURU &RQGLWLRQ...
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  • Page 246 &KDSWHU  ,2 0HVVDJH DQG &RPPXQLFDWLRQ ,QVWUXFWLRQV ([DPSOH  ï 3URJUDP )LOH  RI 6/&  3URFHVVRU %LW  RI WKH PHVVDJH N7:0 I:1.0 ZRUG 8VHG IRU IDQ FRQWURO 7HPSHUDWXUHïVHQVLQJ T4:0 ,QSXW 'HYLFH (RES) %LW  RI WKH PHVVDJH N7:0 )LUVW 3DVV %LW ZRUG 7KLV LV WKH LQWHUORFN ELW...
  • Page 247 H[HFXWLRQ 1 VKRXOG KDYH D YDOXH RI  RU  GXULQJ WKH PHVVDJH PRUH WKDQ  VHFRQGV <RXU DSSOLFDWLRQ FDQ GHWHFW WKLV HYHQW WDNH UHDG H[HFXWLRQ DSSURSULDWH DFWLRQ WKHQ XQODWFK ELW % 3URJUDP LQLWLDOL]DWLRQ 7KH ILUVW SDVV ELW 6 LQLWLDOL]HV WKH ODGGHU SURJUDPV RQ 5XQ PRGH HQWU\ Allen-Bradley Parts ï...
  • Page 248 &KDSWHU  ,2 0HVVDJH DQG &RPPXQLFDWLRQ ,QVWUXFWLRQV ([DPSOH  [LBL] (EN) READ/WRITE MESSAGE (DN) Read/write WRITE Target Device 500CPU (ER) % LV ODWFKHG WR LQLWLDWH Control Block N7:0 WKH PHVVDJH LQVWUXFWLRQ Control Block Length T4:0 (EN) TIMER ON DELAY ïVHFRQG WLPHU (DFK Timer T4:0 (DN)
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  • Page 254 &KDSWHU  ,2 0HVVDJH DQG &RPPXQLFDWLRQ ,QVWUXFWLRQV ,2 5HIUHVK 5() 6/&  3URFHVVRUV 2QO\ ,2 5HIUHVK 2XWSXW ,QVWUXFWLRQ ++7 /DGGHU 'LVSOD\ (REF) ZOOMon REF í 5() í 2.0.0.0.1 ++7 =RRP 'LVSOD\ NAME: REFRESHI/O PRQLWRU PRGH EDT_DAT /DGGHU 'LDJUDPV DQG $36 'LVSOD\V (REF) 7KH 5() LQVWUXFWLRQ KDV QR SURJUDPPLQJ SDUDPHWHUV :KHQ LW LV HYDOXDWHG DV WUXH WKH SURJUDP VFDQ LV LQWHUUXSWHG WR H[HFXWH WKH ,2 VFDQ ZKLFK LQFOXGHV WKH VHUYLFH FRPPXQLFDWLRQV SRUWLRQ RI WKH RSHUDWLQJ F\FOH ZULWH...
  • Page 255 The following general information applies to comparison instructions. Overview Indexed Word Addresses With SLC 5/02 processors, you have the option of using indexed word addresses for instruction parameters specifying word addresses. Indexed addressing is discussed in chapter 4. Allen-Bradley Parts 19–1...
  • Page 256 Chapter 19 Comparison Instructions Equal (EQU) Equal Input Instruction HHT Ladder Display: ZOOM on EQU –|EQU|– 2.3.0.0.1 HHT Zoom Display: NAME: EQUAL (online monitor mode) SOURCE A: N7:1 SOURCE B: 612 EDT_DAT Ladder Diagrams and APS Displays: EQUAL Source A N7:1 Source B When the values at source A and source B are equal, the instruction is...
  • Page 257 If the two values are equal, this instruction is logically false. Entering Parameters You must enter a word address for source A. You can enter a program constant or a word address for source B. Signed integers are stored in two’s complementary form. Allen-Bradley Parts 19–3...
  • Page 258 Chapter 19 Comparison Instructions Less Than (LES) Less Than Input Instruction HHT Ladder Display: ZOOM on LES –|LES|– 2.3.0.0.1 HHT Zoom Display: NAME: LESS THAN (online monitor mode) SOURCE A: N7:1 SOURCE B: 612 EDT_DAT Ladder Diagrams and APS Displays: LESS THAN Source A N7:1...
  • Page 259 B, this instruction is logically false. Entering Parameters You must enter a word address for source A. You can enter a program constant or a word address for source B. Signed integers are stored in two’s complementary form. Allen-Bradley Parts 19–5...
  • Page 260 Chapter 19 Comparison Instructions Greater Than (GRT) Greater Than Input Instruction HHT Ladder Display: ZOOM on GRT –|GRT|– 2.3.0.0.1 HHT Zoom Display: NAME: GREATER THAN (online monitor mode) SOURCE A: N7:1 SOURCE B: 612 EDT_DAT Ladder Diagrams and APS Displays: GREATER THAN Source A N7:1...
  • Page 261 B, this instruction is logically false. Entering Parameters You must enter a word address for source A. You can enter a program constant or a word address for source B. Signed integers are stored in two’s complementary form. Allen-Bradley Parts 19–7...
  • Page 262 Chapter 19 Comparison Instructions Masked Comparison for Masked Comparison for Equal Input Instruction Equal (MEQ) HHT Ladder Display: ZOOM on MEQ –|MEQ|– 2.3.0.0.1 HHT Zoom Display: NAME: MASKED EQUAL (online monitor mode) SOURCE A: B3:10 0100 0110 0000 0000 MASK: 00FF 00FF COMPARE:...
  • Page 263 If the Test parameter is a program constant, both the Low Limit and High Limit parameters must be word addresses. If the Test parameter is a word address, the Low Limit and High Limit parameters can be be either a program constant or a word address. Allen-Bradley Parts 19–9...
  • Page 264 Chapter 19 Comparison Instructions True/False Status of the Instruction If the Low Limit has a value equal to or less than the High Limit, the instruction is true when the Test value is between the limits or is equal to either limit.
  • Page 265 An instruction that has two source operands will not accept program constants in both operands. Destination – the address (destination) of the result of the operation. Signed integers are stored in two’s complementary form. Refer to appendix B for more information regarding two’s complement form. Allen-Bradley Parts 20–1...

  • Page 266: The Status File

    Chapter 20 Math Instructions Using Arithmetic Status Bits After an instruction is executed, the arithmetic status bits in the status file are updated: Carry (C), S:0/0 – Set if a carry is generated; otherwise cleared. Overflow (V), S:0/1 – Indicates that the actual result of a math instruction does not fit in the designated destination.
  • Page 267 SLC 5/02 processor and have the Math Overflow Selection Bit S:2/14 set, then the unsigned, truncated overflow remains in the destination. Z set if the result is zero; otherwise reset S set if the result is negative; otherwise reset Math Register Contents unchanged. Allen-Bradley Parts 20–3...
  • Page 268 Chapter 20 Math Instructions Subtract (SUB) Subtract Output Instruction HHT Ladder Display: (SUB) ZOOM on SUB –(SUB)– 2.3.0.0.2 HHT Zoom Display: NAME: SUBTRACT (online monitor mode) SOURCE A: N7:0 SOURCE B: N7:1 2150 DEST: N7:2 –1271 EDT_DAT Ladder Diagrams and APS Displays: SUBTRACT Source A N7:0...
  • Page 269 32-bit number is increased by 1 if the carry bit S:0/0 is set and it is decreased by 1 if the number being added (B3:1) is negative. To avoid a major error from occurring at the end of the scan, you must unlatch overflow trap bit S:5/0 as shown. Allen-Bradley Parts 20–5...
  • Page 270 Chapter 20 Math Instructions Add 16-bit value B3:1 to 32-bit value B3:3 B3:2 Add operation Binary Decimal Addend B3:3 B3:2 0000 0000 0000 0011 0001 1001 0100 0000 0003 1940 203,072 Addend B3:1 0101 0101 1010 1000 55A8 21,928 0000 0000 0000 0011 0110 1110 1110 1000 0003 6EE8 225,000 B3:3 B3:2...
  • Page 271 Z set if the result is zero; otherwise reset S set if the result is negative; otherwise reset Math Register Contains the 32–bit signed integer result of the multiply operation. This result is valid at overflow. Allen-Bradley Parts 20–7...
  • Page 272 Chapter 20 Math Instructions Divide (DIV) Divide Output Instruction HHT Ladder Display: (DIV) ZOOM on DIV –(DIV)– 2.3.0.0.2 HHT Zoom Display: NAME: DIVIDE (online monitor mode) SOURCE A: N7:0 6214 SOURCE B: N7:1 DEST: N7:2 EDT_DAT Ladder Diagrams and APS Displays: DIVIDE Source A N7:0...
  • Page 273 Initially contains the dividend of the DDV operation. Upon instruction execution the unrounded quotient is placed in the most significant word of the math register. The remainder is placed in the least significant word of the math register. Allen-Bradley Parts 20–9...
  • Page 274 Chapter 20 Math Instructions Negate (NEG) Negate Output Instruction HHT Ladder Display: (NEG) ZOOM on NEG –(NEG)– 2.3.0.0.2 HHT Zoom Display: NAME: NEGATE (online monitor mode) SOURCE: N7:0 DEST: N7:1 –98 EDT_DAT Ladder Diagrams and APS Displays: NEGATE Source N7:0 Dest N7:1 –98...
  • Page 275 DEST: N7:1 EDT_DAT Ladder Diagrams and APS Displays: CLEAR Dest N7:1 The destination value is cleared to zero. Using Arithmetic Status Bits C always reset V always reset Z always set S always reset Math Register Unchanged. Allen-Bradley Parts 20–11...
  • Page 276 Chapter 20 Math Instructions Convert to BCD (TOD) Convert to BCD Output Instruction HHT Ladder Display: (TOD) ZOOM on TOD –(TOD)– 2.3.0.0.2 HHT Zoom Display: NAME: TO BCD (online monitor mode) SOURCE: N7:0 DEST: S:13 1367 (decimal) EDT_DAT Fixed, SLC 5/01 Processors ZOOM on TOD –(TOD)–...
  • Page 277 N7:3 Decimal 0010 0110 0010 0000 N10:0 4-digit BCD 1001 0111 0110 0000 ZOOM on TOD –(TOD)– 2.3.0.0.2 NAME: TO BCD Destination is displayed as SOURCE: N7:3 9760 -26784, decimal DEST: N10:0 –26784 (equivalent to 9760 BCD). EDT_DAT Allen-Bradley Parts 20–13...
  • Page 278 Chapter 20 Math Instructions Example 2 (Fixed, SLC 5/01, and SLC 5/02 Processors) In the following example, the integer value 32760 stored at N7:3 is converted to BCD. The 5-digit BCD value is stored in the math register. The lower 4 digits of the BCD value is moved to output word O:2 and the remaining digit is moved thru a mask to output word O:3.
  • Page 279 SLC 5/01 processors, the source can only be the math register. If the math register is the source, 32,767 is the maximum value. If a word address is used, 9999 is the maximum value. Destination – word address to contain the converted decimal/integer Allen-Bradley Parts value. 20–15...
  • Page 280 Chapter 20 Math Instructions Using Arithmetic Status Bits C always reset V set if a non-BCD value is contained at the source or the value to be converted is greater than 32,767; otherwise reset. Overflow results in a minor error. Z set when destination value is zero S always reset Math Register (When Used)
  • Page 281 S:14 before executing the FRD instruction. If S:14 is not cleared and a value is contained in this word from another math instruction located elsewhere in the program, an Allen-Bradley Parts incorrect decimal value will be placed in the destination word. 20–17...
  • Page 282 Chapter 20 Math Instructions An example of clearing S:14 before executing the FRD instruction is shown below. I:1.0 MOVE 0001 0010 0011 0100 Source N7:2 4660 Dest S:13 4660 CLEAR Dest S:14 FROM BCD APS displays S:13 and Source S:13 S:14 in BCD.
  • Page 283 It could be used for applications such as rotary switches, keypads, bank switching, etc. Source Destination 15–04 03 02 01 00 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 Allen-Bradley Parts 20–19...
  • Page 284 Chapter 20 Math Instructions Entering Parameters Source – the address that contains the bit decode information. Only the first four bits (0–3) are used by the DCD instruction. The remaining bits may be used for other application specific needs. Change the value of the first four bits of this word to select one bit of the destination word.
  • Page 285 ZOOM on SCL –(SCL)– 2.3.0.0.2 HHT Zoom Display: NAME: SCALE (online monitor mode) SOURCE: N7:0 9760 RATE: 25000 25000 OFFSET: DEST: N7:1 24527 EDT_DAT Ladder Diagrams and APS Displays: SCALE Source N7:0 9760 Rate [/10000] 25000 Offset Dest N7:1 24527 Allen-Bradley Parts 20–21...
  • Page 286 Chapter 20 Math Instructions This instruction can be used to solve linear equations of the form Dest = (Rate/10000) x Source + Offse “Rate” is sometimes referred to as Slope. When the SCL instruction is true, the value at the source address is multiplied by the rate value.
  • Page 287 When the SCL instruction goes true, the result will appear in the word address entered in the destination parameter. SCALE Source N7:0 Rate [/10000] 18000 The source 25 is multiplied by 18000/10000 and added to 32. The Offset result 77 is placed in the destination. Dest N7:1 Allen-Bradley Parts 20–23...
  • Page 288 Chapter A–B Move and Logical Instructions This chapter covers output instructions that allow you to perform move and logical operations on individual words. Use these instructions with fixed, SLC 5/01 and SLC 5/02 processors: Move (MOV) Masked Move (MVM) And (AND) Inclusive Or (OR) Exclusive Or (XOR Not (NOT)
  • Page 289 The processor moves a copy of the source value to the destination location. Entering Parameters Source – a program constant or the address of the data you want to move. Destination – the address where the instruction moves the data. Allen-Bradley Parts 21–2...
  • Page 290 Chapter 21 Move and Logical Instructions Using Arithmetic Status Bits C always reset V always reset Z set if the result is zero; otherwise reset S set if the result is negative (most significant bit is set); otherwise reset Application note: If you wish to move 1 word of data without affecting the math flags, use a copy (COP) instruction with a length of 1 word instead of using the MOV instruction.
  • Page 291 The bits of the mask can be fixed by a constant value, or you can vary them by assigning the mask a direct address. Bits in Allen-Bradley Parts the destination that correspond to 0s in the mask are not altered.
  • Page 292 Chapter 21 Move and Logical Instructions And (AND) Output Instruction HHT Ladder Display: (AND) ZOOM on AND –(AND)– 2.3.0.0.2 HHT Zoom Display: NAME: BITWISE AND (online monitor mode) SOURCE A: B3:6 0001 0001 1101 0111 SOURCE B: B3:7 0000 1001 0010 0100 DEST: B3:8 0000 0001 0000 0100...
  • Page 293 B: Source B bit R: Destination bit Using Arithmetic Status Bits C always reset V always reset Z set if the result is zero; otherwise reset S set if the result is negative (most significant bit is set); otherwise reset Allen-Bradley Parts 21–6...
  • Page 294 Chapter 21 Move and Logical Instructions Exclusive Or (XOR) Exclusive Or Output Instruction HHT Ladder Display: (XOR) ZOOM on XOR –(XOR)– 2.3.0.0.2 HHT Zoom Display: NAME: BITWISE EXCLUSIVE OR (online monitor mode) SOURCE A: B3:0 0001 0101 1010 0001 SOURCE B: B3:1 0010 0000 0010 0101 DEST: B3:2...
  • Page 295 A: Source bit R: Destination bit Using Arithmetic Status Bits C always reset V always reset Z set if the result is zero; otherwise reset S set if the result is negative (most significant bit is set); otherwise reset Allen-Bradley Parts 21–8...

  • Page 296: File Copy And File Fill Instructions

    Chapter File Copy and File Fill Instructions This chapter covers the following instructions for use with the fixed, SLC 5/01, and SLC 5/02 processors: File Copy (COP) File Fill (FLL) File Copy and Fill Instructions These instructions move data from a source file or element to a destination Overview file.
  • Page 297 3 words per element (file types T, C, R), you can specify a maximum length of 42. If the destination file type is 1 word per element (file types I, O, S, B, N), you can specify a maximum length of 128. Allen-Bradley Parts 22–2...
  • Page 298 Chapter 22 File Copy and File Fill Instructions All elements are copied from the specified source file into the specified destination file each scan the rung is true. Elements are copied in ascending order with no transformation of data. They are copied up to the specified number (length) or until the last element of the destination file is reached, whichever occurs first.
  • Page 299 The instruction will not write over a file boundary (such as between files N16 and N17) at the destination. Note that an error is declared if a write is attempted over a file boundary. Allen-Bradley Parts 22–4...

  • Page 300: Bit Shift, Fifo, And Lifo Instructions

    Chapter A–B Bit Shift, FIFO, and LIFO Instructions This chapter covers instructions for use with fixed, SLC 5/01, and SLC 5/02 processors: Bit Shift Left (BSL) Bit Shift Right (BSR) These are output instructions that load data into a bit array one bit at a time. The data is shifted through the array, then unloaded one bit at a time.
  • Page 301 BIT ADDR: I1:1.0/0 EN DN ER UL EDT_DAT Ladder Diagrams and APS Displays: BIT SHIFT LEFT (EN) File #B3:1 (DN) Control R6:0 Bit Address I:1.0/0 Length BIT SHIFT RIGHT (EN) File #B3:1 Control R6:0 (DN) Bit Address I:1.0/0 Length Allen-Bradley Parts 23–2...
  • Page 302 Chapter 23 Bit Shift, FIFO, and LIFO Instructions Entering Parameters File – The address of the bit array you want to manipulate. You must use the file indicator # in the bit array address. The address must start on an element boundary (for example, B3:0/0, not B3:0/4).
  • Page 303 55 54 53 52 51 50 49 48 array DO NOT USE 69 68 67 66 65 64 #B3:2 Data block is shifted one bit at a time from bit 69 to bit 32. Allen-Bradley Parts Bit Address (source) I:23/06 23–4...
  • Page 304 Chapter 23 Bit Shift, FIFO, and LIFO Instructions If you wish to shift more than one bit per scan, you must create a loop using jump (JMP) and label (LBL) instructions. FIFO Load (FFL), FIFO SLC 5/02 Processors Only Unload (FFU) FIFO Load, FIFO Unload FFL, FFU Output Instructions...
  • Page 305 FFL and FFU instructions. Position (word 2) – The next available location where the instruction loads data into the stack. This value changes after each load or unload operation. The same number is used for the FFL and FFU instructions. Allen-Bradley Parts 23–6...
  • Page 306 Chapter 23 Bit Shift, FIFO, and LIFO Instructions Operation Instruction parameters have been programmed in the FFL – FFU instruction pair shown below. FFU instruction unloads data from stack #N7:12 at FIFO LOAD (EN) position 0, N7:12. Source N7:10 Position (DN) FIFO #N7:12...
  • Page 307 FIFO and LIFO instruction applications include assembly/transfer lines, inventory control, and system diagnostics. Entering Parameters Allen-Bradley Parts The instruction parameter information on page 23–6 applies. Substitute instruction mnemonics LIFO for FIFO, LFL for FFL, and LFU for FFU. 23–8...
  • Page 308 Chapter 23 Bit Shift, FIFO, and LIFO Instructions Operation Instruction parameters have been programmed in the LFL – LFU instruction pair shown below. For purposes of comparison, the same parameters are used here as in the FFL – FFU example on page 23–7. LFU instruction unloads data from stack #N7:12 at LIFO LOAD...

  • Page 309: Sequencer Instructions

    When your application requires more than 16 bits, parallel (branch) multiple sequencer instructions. Effect on Index Register in SLC 5/02 Processors Sequencer instructions alter the contents of the index register, S:24. Details appear with the specific instructions. Allen-Bradley Parts 24–1...
  • Page 310 Chapter 24 Sequencer Instructions Sequencer Output (SQO), Sequencer Output Sequencer Compare (SQC) Sequencer Compare Output Instructions HHT Ladder Display: (SQO) (SQC) ZOOM on SQO –(SQO)– 2.3.0.0.2 HHT Zoom Display: NAME: SEQUENCER OUTPUT (online monitor mode) FILE: #B10:1 CONTROL: R6:20 MASK: 0F0F LENGTH: DEST:...
  • Page 311 (R6 data file) that stores the status byte of the instruction, the length of the sequencer file, and the instantaneous position in the file. Length of sequencer file Position Note: You cannot use the control address for any other instruction. Allen-Bradley Parts 24–3...
  • Page 312 Chapter 24 Sequencer Instructions Status Bits of the Control Element EN (bit 15) – The enable bit is set by a false-to-true rung transition and indicates the SQO or SQC instruction is enabled. It follows the rung condition. DN (bit 13) – The done bit is set by the SQO or SQC instruction after it has operated on the last word in the sequencer file.
  • Page 313 Effect on Index Register in SLC 5/02 Processors The value present in the index register S:24 is overwritten when the sequencer output instruction is true. The index register value will equal the position value of the instruction. Allen-Bradley Parts 24–5...
  • Page 314 Chapter 24 Sequencer Instructions Operation - Sequencer Compare The SQC instruction compares a word or file of input data, through a mask, to a word or file of reference data for equality. When the status of all non-masked bits in an input word match those of the corresponding reference word, the instruction sets the found bit (FD) in the respective control word.
  • Page 315 Do not use the control file address for any other instruction. The 3-word control element: 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 Length Allen-Bradley Parts Position 24–7...
  • Page 316 Chapter 24 Sequencer Instructions Status Bits EN (bit 15) – The enable bit. This bit is set on a false-to-true transition of the SQL rung and reset on a true-to-false transition. DN (bit 13) – The done bit. This bit is set after the instruction has operated on the last word in the sequencer load file.
  • Page 317 Effect on Index Registers in SLC 5/02 Processors The value present in the index register S:24 is overwritten when the sequencer load instruction is true. The index register value will equal the position value of the instruction. Allen-Bradley Parts 24–9...
  • Page 318 Chapter A–B Control Instructions This chapter covers the following control instructions. Instructions for Use with fixed, SLC 5/01, and SLC 5/02 processors: Jump to Label (JMP) and Label (LBL) Jump to Subroutine (JSR) and Subroutine (SBR) Return from Subroutine (RET) Master Control Reset (MCR) Temporary End (TND) Suspend (SUS)
  • Page 319 (system status register, word S:3, bits 0–7) to limit the amount of time you spend looping inside of JMP/LBL instructions. Entering Parameters Enter a decimal label number from 0 to 999. You can place up to 1000 labels in your program or subroutine file. Allen-Bradley Parts 25–2...
  • Page 320 Chapter 25 Control Instructions Label (LBL) Label Input Instruction HHT Ladder Display: ZOOM on LBL –|LBL|– 2.3.0.0.1 HHT Zoom Display: NAME: LABEL (online monitor mode) LABEL: EDT_DAT Ladder Diagrams and APS Displays: [LBL] This input instruction is the target of the JMP instruction having the same label number.
  • Page 321 With SLC 5/02 processors, you can nest subroutines up to 8 levels. If you are using an STI subroutine, I/O event–driven interrupt subroutine, or user fault routine, you can nest subroutines up to 3 levels from each. Allen-Bradley Parts 25–4...
  • Page 322 Chapter 25 Control Instructions The example below illustrates jumping to successive subroutines, then returning in reverse order. Main Level 1 Level 2 Level 3 Program Subroutine File 90 Subroutine File 91 Subroutine File 92 Example of Nesting Subroutine to Level 3 Note: Runtime errors (error codes 0025, 0026, 0027, and 0030) occur if more than the allowable levels of subroutines are called (subroutine stack overflow) or if more returns are executed than there are call levels...
  • Page 323 Return from Subroutine Return from Subroutine Output Instruction (RET) HHT Ladder Display: (RET) ZOOM on RET –(RET)– 2.3.0.0.2 HHT Zoom Display: NAME: RETURN (online monitor mode) EDT_DAT Ladder Diagrams and APS Displays: RETURN Allen-Bradley Parts 25–6...
  • Page 324 Chapter 25 Control Instructions This output instruction marks the end of subroutine execution or the end of the subroutine file. It causes the processor to resume execution in the main program file at the instruction following the JSR instruction where it exited the program.
  • Page 325 When used in a subroutine, this instruction does not function the same as an END or RET (which causes the processor to resume operation in the previous file). The processor stops where it is, updates I/O, services Allen-Bradley Parts communications, and goes to the beginning of the main program. 25–8...
  • Page 326 Chapter 25 Control Instructions Important: Use of this instruction inside a nested subroutine or interrupt subroutine terminates execution of all nested subroutines. Suspend (SUS) Suspend Output Instruction HHT Ladder Display: (SUS) ZOOM on SUS –(SUS)– 2.3.0.0.2 HHT Zoom Display: NAME: SUSPEND (online monitor mode) SUS ID:...
  • Page 327 SELECTABLE TIMED ENABLE SELECTABLE TIMED START File Time (x10 ms) The Selectable Timed Interrupt function allows you to interrupt the scan of the main program file automatically, on a periodic basis, in order to scan a Allen-Bradley Parts specified subroutine file. 25–10...
  • Page 328 Chapter 25 Control Instructions Important: The information here is for reference only and is optional. Program these instructions using the information appearing in chapter 30. Selectable Timed Interrupt Disable and Enable (STD, STE) These instructions are generally used in pairs. The purpose is to prevent the STI from occurring during a portion of the ladder program.
  • Page 329 All application examples shown are in the HHT zoom display. Proportional, Integral, SLC 5/02 Processors Only Derivative (PID) It is an output instruction that controls physical properties such as temperature, pressure, liquid level, or flow rate of process loops. Allen-Bradley Parts 26–1...
  • Page 330 Chapter 26 PID Instruction Proportional Integral Derivative Output Instruction HHT Ladder Display: (PID) ZOOM on PID –(PID)– 1/2 2.3.0.0.2 HHT Zoom Display: NAME: PROP INT DERIV MODE: AUTO (monitor mode) GAIN: 255 [/10] OUT LIM: 5% ,95% RESET: 10 [/10 M/R] DEADBND: 5 RATE: [/100 MIN] OUTPUT:...
  • Page 331 An additional value (feedforward or bias) can be added to the control output as an offset. The result of PID calculation (control variable) will drive the process variable you are controlling toward the set point. Allen-Bradley Parts 26–3...
  • Page 332 Chapter 26 PID Instruction The PID Equation The PID instruction uses the following equation: Output + K [( E ) ( E ) dt · D ( PV ) dt ] bias Standard Gains constants: Term Range (Low to High) Reference Controller Gain K 0.1 to 25.5 (dimensionless)
  • Page 333 (for example write the value to N7:4 if your control block is N7:2). Without scaling, the range of this value is 0–16383. Otherwise, the range is scaled setpoint min (Smin) Allen-Bradley Parts (word 8) to scaled setpoint max (Smax) (word 7). 26–5...
  • Page 334 Chapter 26 PID Instruction Minimum output (control block word 12) – If you want to use output limiting or alarms, enter a value. If the output limit bit is also set, this value is the minimum control output percent (word 16) that the control variable (CV) obtains or outputs.
  • Page 335 If CV exceeds this maximum value, the output alarm, upper limit UL bit will be following will occur: set. CV will be set to the value you entered, and the output alarm, upper limit UL bit will be set. Allen-Bradley Parts 26–7...
  • Page 336 Chapter 26 PID Instruction Control (control block word 0, bit 2) – Reverse, the default condition, corresponds to E=SP–PV. Forward corresponds to E=PV–SP. Direct acting (E=PV–SP) will cause the output CV to increase when the input PV is larger than the setpoint SP (for example, a cooling application). Reverse acting (E=SP–PV) will cause the output CV to increase when the input PV is smaller than the setpoint SP (for example, a heating application).
  • Page 337 Control mode bit CM (word 0, bit 2) – This bit is cleared if the control is E=SP–PV (reverse). It is set if the control is E=PV–SP (forward). This Allen-Bradley Parts bit can be set or cleared by instructions in your ladder program.
  • Page 338 Chapter 26 PID Instruction Output limiting enabled bit OL (word 0, bit 3) – This bit is set when you have selected to limit the control variable. This bit can be set or cleared by instructions in your ladder program. Scale setpoint flag SC (word 0, bit 5) –...
  • Page 339 I/O interrupt, which is then interrupted by the PID STI main program or subroutine file, one in an I/O interrupt file, and interrupt.) one in the STI subroutine file. You must alter your ladder program and eliminate the potential nesting of PID loops. Allen-Bradley Parts 26–11...
  • Page 340 Chapter 26 PID Instruction PID and Analog I/O Scaling For the SLC 500 PID instruction, the numerical scale for both the process variable (PV) and the control variable (CV) is 0 to 16383. To use engineering units, such as PSI or degrees, you must first scale your analog I/O ranges within the above numerical scale.
  • Page 341 3277 to 16384, while the scaled range (PV) is 0 to 16383. Rung 3:3 SCALE Source I:1.0 Rate [/10000] 12499 Offset –4096 Dest N10:28 Rung 3:4 Control Block N10:0 Process Variable N10:28 Allen-Bradley Parts Control Variable N10:29 Control Block Length 26–13...
  • Page 342 Chapter 26 PID Instruction The PID control variable is the input for the scale instruction. The PID instruction guarantees that the CV remains within the range of 0 to 16383. This value is to be scaled to the range of 6242 to 31208, which represents the numeric range Rung 3:5 that is needed to produce 4 to 20mA analog output signal.
  • Page 343 AUTO <RX FDQ FKDQJH WKH 6HWSRLQW 'HDGEDQG *DLQ 5HVHW 5DWH 2XWSXW PLQ DQG 2XWSXW PD[ SDUDPHWHUV E\ ZULWLQJ WR WKH DSSURSULDWH ZRUG ZLWKLQ WKH FRQWURO EORFN RI WKH 3,' 7KH FRQWURO EORFN LV VKRZQ RQ SDJH ï Allen-Bradley Parts ï...
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  • Page 348 &KDSWHU  3,' ,QVWUXFWLRQ ([DPSOH ï 7R 0DQXDOO\ &RQWURO WKH &9 2XWSXW $0 %LW 0DQXDO I:2.0 N7:10 $0 %LW $XWR N7:10 I:2.0 $FFHSW &9 $0 %LW N7:10 I:2.0 FROMBCD [OSR] Source I1:1.0 Dest N7:0 LIMIT TEST MULTIPLY Low Lim Source A N7:0 Test N7:0...
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  • Page 350 &KDSWHU  3,' ,QVWUXFWLRQ ([DPSOH ï 7LPH 3URSRUWLRQLQJ 2XWSXWV Control Block N7:2 Process Variable N7:0 Control Variable N7:1 Control Block Length TIMER ON DELAY (EN) Timer T4:0 Time Base 0.01 (DN) Preset 1000 Accum &\FOH 7LPH RI WKH 2XWSXW O:1.0 GREATERTHAN Source A T4:0.ACC...
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  • Page 353 I/O Interrupt Enabled S:11, S;12 I/O Slot Enables S:29 User Fault Routine File Number S:13, S:14 Math Register S:30 Selectable Timed Interrupt Setpoint S:15L Node Address S:31 Selectable Timed Interrupt File Number Allen-Bradley Parts S:15H Baud Rate S:32 I/O Interrupt Executing 27–1...
  • Page 354 Chapter 27 The Status File The following tables describe the status file functions, beginning at address S:0 and ending at address S:32. If a bullet ( ) is present in the columns headed SLC 5/02 and SLC 5/01, Fixed, the function applies to the indicated processor(s).
  • Page 355 The processor then attempts to enter the Run mode. When this bit remains cleared (default value), the processor remains in a major fault state at power up. To program this feature, set this bit using the EDT_DAT function. Allen-Bradley Parts 27–3...
  • Page 356 Chapter 27 The Status File 5/01, Address Description 5/02 Fixed S:1/9 Startup Protection Fault Bit Read/write. When this bit is set and power is cycled while the processor is in the Run mode, the processor will execute your fault routine prior to the execution of the first scan of your program. You then have the option of clearing the Major Error Halted bit S:1/13 to resume operation in the Run mode.
  • Page 357 Then store the program in the memory module. This feature is particularly useful when you are troubleshooting hardware failures with spares" (replacement modules). This feature can also be used to facilitate application logic upgrades in the field without the need of a programming device. Allen-Bradley Parts 27–5...
  • Page 358 Chapter 27 The Status File 5/01, Address Description 5/02 Fixed S:1/13 Major Error Halted Bit Read/write. This bit is set by the processor any time a major error is encountered. The processor then enters a fault condition. Word S:6 Fault Code will contain a code which can be used to diagnose the fault condition.
  • Page 359 (word 31) and STI rate (word 30) are non-zero. If clear when the interrupt occurs, the STI subroutine does not execute and the STI pending bit is set. The STI Timer continues to run when disabled. The STI instruction clears this bit. Allen-Bradley Parts 27–7...
  • Page 360 Chapter 27 The Status File 5/01, Address Description 5/02 Fixed S:2/2 STI (Selectable Timed Interrupt) Executing Bit Read only. This bit, when set, indicates that the STI timer has timed out and the STI subroutine is currently being executed. Application example: You could examine this bit in your fault routine to determine if your STI was executing when the fault occurred.
  • Page 361 SLC 5/02 processor is receiving a message from a device on the network, possibly through a bridge or gateway. This setting is compatible with Allen Bradley PLC inter processor communication. S:2/9 Reserved thru S:2/13 Allen-Bradley Parts 27–9...
  • Page 362 Chapter 27 The Status File 5/01, Address Description 5/02 Fixed S:2/14 Math Overflow Selection Bit Applies to Series C and later SLC 5/02 processors only. Set this bit when you intend to use 32 bit addition and subtraction. When S:2/14 is set, and the result of an ADD, SUB, MUL, or DIV instruction cannot be represented in the destination address (underflow or overflow), the overflow bit S:0/1 is set,...
  • Page 363 In a case such as this, the additional time spent by the processor to service all communications at the end of the scan is insignificant compared to the time it takes to complete one scan. You could increase communication throughput even further by using an SVC instruction. See chapter 18. Allen-Bradley Parts 27–11...
  • Page 364 Chapter 27 The Status File 5/01, Address Description 5/02 Fixed S:3L Current/Last 10 ms Scan Time Byte Read/write. The value of this byte tells you how much time elapses in a program cycle. A program cycle includes the ladder program scan, I/O scan, and servicing the communication port.
  • Page 365 S:4/3 (O:1/0 in this case) must be evaluated at least once every 79.999 ms. 160 ms Both S:4/3 and Output O:1/0 toggle every 80 ms. O:1/0 must be evaluated S:4/3 cycles in 160 ms at least once every 79.999 ms. Allen-Bradley Parts 27–13...
  • Page 366 Chapter 27 The Status File 5/01, Address Description 5/02 Fixed Minor Error Bits The bits of this word are set by the processor to indicate that a minor error has occurred in your ladder program. Minor errors, bits 0-7, revert to major error 0020H if any bit is detected as being set at the end of the scan.
  • Page 367 M0-M1 referenced instruction, take appropriate action, and then clear bit S:5/4 using an OTU instruction with S:5/4 or a CLR instruction with S:5.0. S:5/5, Reserved S:5/6, Read/write. Reserved for minor errors that revert to major errors at S:5/7 the end of the scan. Allen-Bradley Parts 27–15...
  • Page 368 Chapter 27 The Status File 5/01, Address Description 5/02 Fixed S:5/8 Memory Module Boot Bit Read/write. When this bit is set by the processor, it indicates that a memory module program has been transferred to the processor. This bit is not cleared by the processor. Your program can examine the state of this bit every Run mode entry to determine if the memory module content has been transferred.
  • Page 369 Error code descriptions and classifications are listed on pages 27-18 through 27-22. Categories: powerup errors going to run errors runtime errors user program instruction errors I/O errors See chapter 28 for cause/recovery information on faults. Allen-Bradley Parts 27–17...
  • Page 370 Chapter 27 The Status File Fault Classification Processor Description User Error 5/01, Address Code Powerup Errors Non User Non Recov Recov 5/02 Fixed (Hex) 0001 NVRAM error. 0002 Unexpected hardware watchdog timeout. 0003 Memory module memory error. 0004 Memory integrity check failed (runtime). Fault Classification Processor Description...
  • Page 371 0028 Invalid or non existent startup protection" fault routine file value. 0029 Indexed address reference outside of entire data file space (range of B3:0 through the last file). 002A Indexed address reference beyond specific referenced data file. Allen-Bradley Parts 27–19...
  • Page 372 Chapter 27 The Status File Fault Classification Processor Description User Error 5/01, Address Code User Program Instruction Errors Non User Non Recov Recov 5/02 Fixed (Hex) 0030 Attempt was made to jump to one too many nested subroutine files. Can also mean that a program has potentially recursive routines.
  • Page 373 A specialty I/O module has not responded to a command as xx59 being completed within the required time limit. xx5A Hardware interrupt problem (stuck"). G file configuration error - user program G file size exceeds xx5B capacity of the module. Allen-Bradley Parts 27–21...
  • Page 374 Chapter 27 The Status File Fault Classification Processor Description User Error 5/01, Address Code I/O Errors Non User Non Recov Recov 5/02 Fixed (Hex) M0-M1 file configuration error - user program M0-M1 file xx5C size exceeds capacity of the module. xx5D Interrupt service requested is not supported by the processor.
  • Page 375 0-31. These bits are set by the processor when a node exists on the DH-485 link that your processor is connected to. The bits are cleared when a node is not present on the link . Allen-Bradley Parts 27–23...
  • Page 376 Chapter 27 The Status File 5/01, Address Description 5/02 Fixed S:11 I/O Slot Enables Read/write. These two words are bit mapped to represent the 30 S:12 possible I/O slots in an SLC 500 system. S:11/0 represents I/O slot 0 for fixed I/O systems (slot 0 is used for the CPU in modular systems); S:11/1 through S:12/14 represent I/O slots 1-30.
  • Page 377 EDT_DAT alteration of your selection, program this value using a MOV and MVM instruction in an unconditional rung as shown below. Example, showing runtime protection of node address 3: MOVE Source Dest N7:0 MASKED MOVE Source N7:0 Mask 00FF Dest S:15 Allen-Bradley Parts 27–25...
  • Page 378 Chapter 27 The Status File 5/01, Address Description 5/02 Fixed S:15H Baud Rate Read/write. This byte value contains a code used to select the baud rate of the processor on the DH-485 link. SLC 5/02 processors provide a baud rate of 19200, 9600, 2400, or 1200.
  • Page 379 There is no known use for this feature when addressed by your ladder program. Note: The HHT can save a SLC 5/02 program that has this option enabled, but the Test Single Step mode is not available with the HHT. Allen-Bradley Parts 27–27...
  • Page 380 Chapter 27 The Status File 5/01, Address Description 5/02 Fixed S:20 Test - Fault/Powerdown - Rung/File Read/write. These registers indicate the executable rung (word S:20) S:21 and file (word S:21) number that the processor last executed before a major error or powerdown occurred. To enable this feature, you must select the Test Single Step option at the time you save your program.
  • Page 381 Index Register Read/write. This word indicates the element offset used in indexed addressing. When an STI, I/O Slot, or Fault Routine interrupts normal execution of your program, the original value of this register is restored when execution resumes. Allen-Bradley Parts 27–29...
  • Page 382 Chapter 27 The Status File 5/01, Address Description 5/02 Fixed S:25 I/O Interrupt Pending Read only. These two words are bit mapped to the 30 I/O slots. Bit S:26 S:25/1 through S:26/14 refer to slots 1-30. Bits S:25/0 and S:26/15 are reserved.
  • Page 383 ISR. You may also use this value to discern interrupt slot identity when multiplexing two or more specialty I/O module interrupts to the same ISR. I/O interrupts are discussed in chapter 31. Allen-Bradley Parts 27–31...
  • Page 384 Chapter 27 The Status File Status File Display -SLC The status file displays that apply to SLC 5/02 processors are shown below. 5/02 Processors The displays are accessible offline and online under the EDT DAT function. To move between data files: Press NEXT FL or PREV FL. To move between displays: Press NEXT PG or PREV PG.
  • Page 385 Enter 3 for 9600 S2:2 Proc Status 1000 0000 0000 0010 Enter 4 for 19200 S2:15H = 4 S2:0/0 = 0 ADDRESS NEXT FL PREV FL NEXT PG PREV PG ADDRESS NEXT FL PREV FL NEXT PG PREV PG Allen-Bradley Parts 27–33...

  • Page 386: Troubleshooting Faults

    Chapter Troubleshooting Faults This chapter: lists the major error fault codes indicates the probable causes of faults recommends corrective action Chapter 27 also lists the error codes, under word S:6. Troubleshooting Overview The following general information applies to troubleshooting. User Fault Routine Not in Effect You can clear a fault by one of the following methods: Manually clear minor fault bits S:5/0 –...
  • Page 387 S2:6 to 0. Error Code Description, The following tables list error types as: Cause, and Powerup Recommended Action Going-to-Run Runtime User Program Instruction Allen-Bradley Parts Each table lists the error code description, the probable cause, and the recommended corrective action. 28–2...
  • Page 388 Chapter 28 Troubleshooting Faults Powerup Errors Error Code Description Probable Cause Recommended Action (Hex) 0001 NVRAM error. Correct the problem, reload the program, Either Noise, and run. You can use the autoload feature lightning, with a memory module to automatically improper grounding, reload the program and enter the Run mode.
  • Page 389 S:5 in chapter 27. sequencer or shift register instruction error was detected, a major error was detected while executing a user fault routine, or M0-M1 file addresses were referenced in the user program for a disabled slot. Allen-Bradley Parts 28–4...
  • Page 390 Chapter 28 Troubleshooting Faults Error Code Description Probable Cause Recommended Action (Hex) 0021 A remote power failure of an expansion I/O Fixed and FRN 1 to 4 SLC 5/01 Fixed and FRN 1 to 4 SLC 5/01 rack has occurred. processors: Power was removed or the processors: Cycle power on the local power dipped below specification for an...
  • Page 391 Either replace the processor with one detected. does not support an instruction residing in that supports the user program, or the user program. modify the user program so that all instructions are supported by the processor, then reload the program and run. Allen-Bradley Parts 28–6...
  • Page 392 Chapter 28 Troubleshooting Faults Error Code Description Probable Cause Recommended Action (Hex) 0032 A sequencer instruction length/position The program is referencing an element Correct the user program or allocate more parameter points past the end of a data beyond a file boundary set up by the data file space using the memory map, file.
  • Page 393 Either replace the module with the detected as being the wrong type. different type than was configured for that correct module, clear the fault, and run, slot by the user. change the I/O configuration for the slot, reload the program and run. Allen-Bradley Parts 28–8...
  • Page 394 Chapter 28 Troubleshooting Faults Error Code Description Probable Cause Recommended Action (Hex) xx55 A discrete I/O module required for the user If this is a discrete I/O module, the I/O If this is a discrete I/O module, replace it program is detected as having the wrong count is different from that selected in with a module having the I/O count I/O count.
  • Page 395 This code also can mean that an I/O fault and run, or module has reset itself. add the module to the I/O configuration, reference the module in the user program where required, reload the program and run. Allen-Bradley Parts 28–10...
  • Page 396 Chapter Understanding the User Fault Routine - SLC 5/02 Processor Only This chapter applies to the SLC 5/02 processor only. It covers the following topics: recoverable and non–recoverable user faults application examples of user fault subroutines Overview of the User Fault The SLC 5/02 processor allows you to designate a subroutine file as a User Routine Fault Routine.
  • Page 397 Length of LFU, LFL, FFU, FFL, BSL, or BSR points past end of data file. 0034 A negative value for a timer accumulator or preset value was detected. Invalid value for a PID parameter. Code 0036 is discussed further in 0036 chapter 26. Allen-Bradley Parts 29–2...
  • Page 398 Chapter 29 Understanding the User Fault Routine 5/02 Processor Only I/O ERRORS Recoverable only if you disable slot xx in the user fault routine xx50 A rack data error is detected. xx52 A module required for the user program is detected as missing or removed. At going to run, a user program declares a slot as unused, and that slot is xx53 detected as having an I/O module inserted.
  • Page 399 Invalid or non existent module interrupt subroutine file. xx93 Unsupported I/O module specific major error. In the run or test mode, a module has been detected as being inserted Allen-Bradley Parts xx94 under power. Can also mean that an I/O module has reset itself. 29–4...
  • Page 400 Chapter 29 Understanding the User Fault Routine 5/02 Processor Only Creating a User Fault To utilize the user fault routine, create a subroutine file (3–255), then enter Subroutine this file number in word S:29 of the status file. In the status file display below, subroutine file 3 is designated as “Err File,”...
  • Page 401 0020 MINOR ERROR AT END OF SCAN 0034 NEGATIVE VALUE IN TIMER PRE OR ACC If the fault code (S:6) is 0020H, subroutine file 4 is executed. If the fault code is 0034H, subroutine file 5 is executed. Allen-Bradley Parts 29–6...
  • Page 402 Chapter 29 Understanding the User Fault Routine 5/02 Processor Only C5:0 SUBROUTINE COUNT UP (CU) Counter C5:0 Preset (DN) Accum GREATER THAN RETURN Source A C5:0.ACC Source B RETURN Subroutine File 4 - Executed for error 0020 MINOR ERROR AT END OF SCAN If the overflow trap bit S:5/0 is set, counter C5:0 will increment.
  • Page 403 S2:29 Err File: 0 Indx Cross File: No S2:24 Index Reg: 0 Single Step: No S2:0/0 = 0 S2:5/0 = 0 ADDRESS NEXT FL PREV FL NEXT PG PREV PG ADDRESS NEXT FL PREV FL NEXT PG PREV PG Allen-Bradley Parts 29–8...
  • Page 404 Chapter A–B Understanding Selectable Timed Interrupts - SLC 5/02 Processor Only This chapter applies to the SLC 5/02 processor only. It covers the following topics: STI operation STI parameters STD and STE instructions STS instruction INT instruction STI Overview The STI (selectable timed interrupt) function can be used with the SLC 5/02 processor only.
  • Page 405 3.7 milliseconds max. for the SLC 5/02 series B processor, and 2.4 milliseconds max. for the SLC 5/02 series C and later. During the latency period, the processor is performing operations that cannot be disturbed by the STI interrupt function. Allen-Bradley Parts 30–2...
  • Page 406 Chapter 30 Understanding Selectable Timed Interrupts - 5/02 Processor Only Interrupt Priorities Interrupt priorities are as follows: 1. Fault routine 2. STI subroutine 3. I/O interrupt subroutine (ISR) An executing interrupt can only be interrupted by an interrupt having higher priority.
  • Page 407 When this occurs, the STI timer continues to operate at the rate present in word S:30. If the overrun bit becomes set, take the corrective action your application dictates, then clear the bit. Allen-Bradley Parts 30–4...
  • Page 408 Chapter 30 Understanding Selectable Timed Interrupts - 5/02 Processor Only Enter and monitor STI parameters at the status file displays under EDT_DAT. Parameters are pointed out in the displays that follow. Status File Arithmetic Flags S2:0 Proc Status 0000 0000 0000 0000 S2:1 Proc Status 0000 0000 0000 0001 S2:2 Proc Status...
  • Page 409 STD instruction is executed. This instruction has no effect on the operation of the STI timer or setpoint. When the enable bit is set, the first execution of the STI subroutine can occur at any fraction of the timing cycle up to a full timing cycle later. Allen-Bradley Parts 30–6...
  • Page 410 Chapter 30 Understanding Selectable Timed Interrupts - 5/02 Processor Only STD/STE Zone Example In the program below, the STI function is in effect. The STD and STE instructions in rungs 6 and 12 are included in the ladder program to avoid having STI subroutine execution at any point in rungs 7 thru 11.
  • Page 411 At the same time, the STI timer is reset and begins timing; at timeout, the STI subroutine execution occurs. When the rung goes false, the STI function remains enabled at the setpoint and file number you’ve entered in the STS instruction. Allen-Bradley Parts 30–8...
  • Page 412 Chapter 30 Understanding Selectable Timed Interrupts - 5/02 Processor Only INT Instruction The Interrupt Subroutine (INT) instruction is used in selectable timed interrupt subroutines and I/O event–driven interrupt subroutines to distinguish the subroutine as an interrupt subroutine versus a regular subroutine.

  • Page 413: Understanding I/O Interrupts - Slc 5/02 Processor Only

    (range 3–255) that you want the I/O module to execute. Configuring I/O is discussed in chapter 6. Create the subroutine file that you have specified in the I/O module slot configuration. Creating a subroutine file is discussed in chapter 4. Allen-Bradley Parts 31–1...
  • Page 414 Chapter 31 Understanding I/O Interrupts - 5/02 Processor Only Operation When you download your program and enter the Run mode, the I/O interrupt begins operation as follows: The specialty I/O module determines that it needs servicing and generates an interrupt request to the SLC processor. The processor is interrupted from what it is doing, and the specified interrupt subroutine file (ISR) is scanned.
  • Page 415 For example, if slot 2 (ISR 20) and slot 3 (ISR 11) request interrupt service at the same instant, the processor will first scan ISR 20 to completion, then ISR 11 to completion. Allen-Bradley Parts 31–3...
  • Page 416 Chapter 31 Understanding I/O Interrupts - 5/02 Processor Only Status File Data Saved Data in the following words is saved on entry to the I/O interrupt subroutine and re-written upon exiting the I/O interrupt subroutine. S:0 Arithmetic flags S:13 and S:14 Math register S:24 Index register I/O Interrupt Parameters The I/O interrupt parameters below have status file addresses.
  • Page 417 ADDRESS NEXT FL PREV FL NEXT PG PREV PG A – Words S:11 and S:12. I/O slot enable bits. B – Words S:27 and S:28. I/O interrupt enable bits. C – Words S:25 and S:26. I/O interrupt pending bits. Allen-Bradley Parts 31–5...
  • Page 418 Chapter 31 Understanding I/O Interrupts - 5/02 Processor Only IID and IIE Instructions The IID and IIE instructions are used to create zones in which I/O interrupts cannot occur. These instructions are not required to configure a basic I/O interrupt application. I/O Interrupt Disable Output Instruction I/O Interrupt Enable...
  • Page 419 Setting/clearing the I/O interrupt enable bits (S:27 and S:28) with a programming device or standard instruction such as MVM takes effect at the END of the scan only. Parameter – Enter a 1 (set) in a slot position to indicate an enabled I/O interrupt. Allen-Bradley Parts 31–7...
  • Page 420 Chapter 31 Understanding I/O Interrupts - 5/02 Processor Only IID/IIE Zone Example In the program below, slots 1, 2, and 7 are capable of generating I/O interrupts. The IID and IIE instructions in rungs 6 and 12 are included to avoid having I/O interrupt ISRs execute as a result of interrupt requests from slots 1, 2, or 7.
  • Page 421 I/O interrupt is reset (aborted). HHT Ladder Display: When the cursor is on the RPI instruction, the slots having reset Pending I/O Interrupt bits are indicated here by 0s. RPI:0000 0000... 2.0.0.0.2 (RPI) MODE FORCE EDT DAT SEARCH Allen-Bradley Parts 31–9...
  • Page 422 Appendix HHT Messages and Error Definitions This appendix provides details about the messages that appear on the prompt line of the HHT display. These messages prompt you regarding programming procedures, restrictions, and limitations. They also bring your attention to errors such as incorrect procedures, incorrect data entry, failure of selftest functions, and hardware/software incompatibility.
  • Page 423 Appendix A Message: Appears when: Respond by: Important: Important: Allen-Bradley Parts A–2...
  • Page 424 Appendix A Message: Appears when: Respond by: A–3...
  • Page 425 Appendix A Message: Appears when: Respond by: Allen-Bradley Parts A–4...
  • Page 426 Appendix A Message: Appears when: Respond by: [F4] [F3] [F1] [F2] [F5] [F5] A–5...
  • Page 427 Appendix A Message: Appears when: Respond by: Important: Allen-Bradley Parts A–6...
  • Page 428 Appendix A Message: Appears when: Respond by: A–7...
  • Page 429 Appendix A Message: Appears when: Respond by: Important: Allen-Bradley Parts A–8...
  • Page 430 Appendix Number Systems, Hex Mask This appendix: describes the different number systems you need to understand for use of the HHT with SLC 500 family controllers covers binary, Binary Coded Decimal (BCD), and hexadecimal. explains the use of a Hex mask used to filter data in certain programming instructions Binary Numbers The processor memory stores 16-bit binary numbers.
  • Page 431 This position is always 1 for negative numbers. The negative binary number may be converted to decimal as follows: 16 bit pattern = 1111111111111111 ) – 2 = ( 16384 8192 4096 2048 1024 – 32768 32767 – 32768 –1 Allen-Bradley Parts B–2...
  • Page 432 Appendix B Number Systems, Hex Mask Another example: 16–bit pattern = 1111 1000 0010 0011 – 2 = ( 16384 8192 4096 2048 – 32768 30755 – 32768 = –2013 An easier way to calculate a negative value is to locate the last “1” in the string of 1s beginning at the left, then subtract its value from the total value of positions to the right of that position.
  • Page 433 The position values of hexadecimal numbers are powers of 16, beginning with 16 at the right: Example: Hexadecimal number 218A has a decimal equivalent value of 8586: 2x16 = 8192 8192 1x16 = 256 8x16 = 128 10x16 = 10 8586 Allen-Bradley Parts B–4...
  • Page 434 Appendix B Number Systems, Hex Mask Hexadecimal and binary numbers have the following equivalence: Hexadecimal = 8586 Binary = 8586 8192 +1x2 Example: Decimal number –8586 in equivalent binary and hexadecimal forms: Binary = -8586 Hexadecimal = 56950 (negative number, -8586) Hex number DE76 = 13x16 +14x16 +7x16...
  • Page 435 Data in bits 8–15 of the source word is not passed to the destination word. Destination bits 8–15 are not affected (they are left in their last state). Source Word Mask Word Destination Word (all bits 0 initially) Allen-Bradley Parts B–6...

  • Page 436: Memory Usage, Instruction Execution Times

    Appendix A–B Memory Usage, Instruction Execution Times This appendix covers the following topics: memory usage instruction execution times for the fixed and SLC 5/01 processors instruction execution times for the SLC 5/02 processor series A and B instruction execution times for the SLC 5/02 processor series C and later Memory Usage SLC 500 controllers have the following user memory capacities: Type of Processor...
  • Page 437 Appendix C Memory Usage, Instruction Execution Times Fixed and SLC 5/01 Instruction Words for the Fixed and SLC 5/01 Processors Processors Instruction Instruction Instruction Instruction Words Words (approx) (approx) 0.75 0.75 0.75 Allen-Bradley Parts C–2...
  • Page 438 Appendix C Memory Usage, Instruction Execution Times Estimating Total Memory Usage of Your System Using a Fixed or SLC 5/01 Processor 1. Calculate the total instruction words used by the instructions in your program and enter the result. Refer to the table on page C–2. 2.
  • Page 439 49 I/O data words 49 x 0.75 = 36.75 30 slot 30 x 0.75 = 22.50 Overhead 67.00 I/O Configuration Total 126.25 Estimated total memory usage: 289.75 (round to 290) 4096 – 290 = 3806 instruction words remaining in processor Allen-Bradley Parts C–4...
  • Page 440 Appendix C Memory Usage, Instruction Execution Times Instruction Execution Times for the Fixed and SLC 5/01 Processors Execution Time Execution Time in Microseconds in Microseconds Instruction Instruction (approx.) (approx.) False True False True For the rung example at the right: 1) If instruction 1 is false, instructions 2, 3, 4, 5, 6, 7 take zero execution time.
  • Page 441 Instruction Words for the SLC 5/02 Processor Instruction Instruction Instruction Instruction Instruction Instruction Words Words Words (approx) (approx) (approx) 1.25 1.75 1.25 34.75 1.25 0.75 0.75 1.25 0.75 1.25 23.25 Allen-Bradley Parts C–6...
  • Page 442 Appendix C Memory Usage, Instruction Execution Times Estimating Total Memory Usage of Your System Using a SLC 5/02 Processor 1. Calculate the total instruction words used by the instructions in your program and enter the result. Refer to the table on page C–6. 2.
  • Page 443 Rung logic is solved left to right. Branches are solved top to bottom. This only includes the amount of time needed to set up" the operation requested. It does not include the time it takes to service the actual communications. Allen-Bradley Parts C–8...
  • Page 444 Appendix C Memory Usage, Instruction Execution Times Instructions Having Indexed Addresses For each operand having an indexed address, add 50 microseconds to the execution time for a true instruction. For example, if a MOV instruction has an indexed address for both the source and destination, the execution time when the instruction is true is 24 + 50 + 50 = 124 microseconds.
  • Page 445 Rung logic is solved left to right. Branches are solved top to bottom. This only includes the amount of time needed to set up" the operation requested. It does not include the time it takes to service the actual communications. Allen-Bradley Parts C–10...
  • Page 446 Appendix C Memory Usage, Instruction Execution Times Example: 1747 L524 series C processor, 30 slot configuration, (15) 1746 IA16, (10) 1746 OA8, (1) 1747 DCM full configuration, (1) 1746 NI4, (1) 1746 NIO4I 50 XIC and XIO 50 x 1.00 = 50.00 15 OTE instructions 15 x 0.75 = 11.25 5 TON instructions...
  • Page 447 In this example, 34 words are copied from #B:3.0 to M0:1.0. Add 950 + (400 x 34) = 14550 microseconds to the execution time listed on page C–10. This comes to 471 (calculated from page C–10 table) plus 14550 = 15021 microseconds total, or 15.0 milliseconds. Allen-Bradley Parts C–12...
  • Page 448 Appendix A–B Estimating Scan Time This appendix: contains worksheets that allow you to estimate the scan time for your particular controller configuration and program includes scan time calculation for an example controller and program Use the instruction execution times listed in appendix C. Events in the Operating Cycle The diagram and table below breaks down the processor operating cycle into events.
  • Page 449 Single Step – When using this function with a 5/02 processor, you can execute your program one rung or section at a time. This function is used for debugging purposes. Multi–Word Module – Example of multi–word modules are DCM, analog, and DSN. Allen-Bradley Parts D–2...
  • Page 450 Appendix D Estimating Scan Time Worksheet A — Estimating the Scan Time of Your Fixed Controller Procedure Min Scan Time Max ScanTime Estimate your input scan time (µs). Determine the type of controller that you have. If you have a 20 I/O processor, write 313 on line (a). If you have a 30 or 40 I/O processor, write 429 on line (a).
  • Page 451 2310. (Maximum scan time accounts for programmer being attached to processor.) / 1000 / 1000 µ C. Convert secs. to msecs., divide by 1000. Estimated minimum and maximum scan times for your 1747-L511 or 1747-L514 application: msecs. msecs. Allen-Bradley Parts D–4...
  • Page 452 Appendix D Estimating Scan Time Worksheet C — Estimating the Scan Time of Your 1747–L524 Processor Procedure Min Scan Time Max ScanTime 1. Estimate your input scan time (µs). A. Calculate the processor input scan of your discrete input modules. Number of 8 point modules ________ x 126 = a.)________ Number of 16 point modules...
  • Page 453 TIMER ON DELAY (EN) Timer T4:0 Time Base 0.01 (DN) Preset 6000 Accum T4:0 288 microseconds GREATER THAN TO BCD Source A T4:0.ACC Source T4:0.ACC Total: 465 microseconds Source B 5999 Dest S:13 MOVE Source S:13 Dest O:1.0 Allen-Bradley Parts D–6...
  • Page 454 Appendix D Estimating Scan Time Example: Worksheet B – Estimating the Scan Time of a 1747–L514 Processor Application Procedure: Min Scan Time: Max ScanTime: 1. Estimate your input scan time (µs). A. Calculate the processor input scan of your discrete input modules. Number of 8 point modules x 197 = Number of 16 point modules...
  • Page 455 Index Symbols Numbers Allen-Bradley Parts...
  • Page 456 Index I–2...
  • Page 457 Index I–3 Allen-Bradley Parts...
  • Page 458 Index I–4...
  • Page 459 Index I–5 Allen-Bradley Parts...
  • Page 460 Index I–6...
  • Page 461 Index I–7 Allen-Bradley Parts...
  • Page 462 Index I–8...
  • Page 463 Index I–9 Allen-Bradley Parts...
  • Page 464 Index I–10...
  • Page 465 Allen-Bradley Parts 1747 NP002, Series A...

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