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1.6 Block diagram
External to
FPGA
I1
O1
ACQ
REG
STACKS
NAF
CAMAC
FIFOs
Master
USB Controller
OUT FIFO
IN FIFO
WIENER, Plein & Baus GmbH
ACQ
REG
- User NIM input
- User NIM "Busy" output
- Data Acquisition Control
- Register Block
- CAMAC Command Stacks (2 kBytes)
- NAF Sequence Generator
- CAMAC Bus, Including Arbitration
- Three-Stage Piplined FIFO Array (22 kBytes)
- Control Unit
- FX2 CY7C68013 IC
- USB Out FIFO (Relative to Host)
- USB In FIFO (Relative to Host)
STACKS
Data
Control
7
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