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4.1 General structure of Out Packets
Since internally, the USB controller of the CC-USB is set up as a 16-bit wide FIFO (First- In-
First-Out Memory), the In and Out Packets are organized as collections of 16-bit words. For
the purpose of the software, and more specifically, of the Windows Application
Programming Interface (API) routines, the data are packed in byte-wide buffers, a process
that may remain transparent to the user when proper set of routines (DLLs) is used. Also,
much of the technical information on writing and reading back data from the internal devices
of the CC-USB may be considered redundant, when a set of routines is available to perform
the task. This information is, however, necessary for writing such routines.
First (16-bit) word in an Out Packet identifies the internal device/address for which the
packet is intended and whether the packet represents a request for data or represents the data
to be stored/interpreted to/by the target device. The latter information is coded in bit 3
(value=4) of the header word, with bit 3 set for requests for data. The meaning of the second
word in the Out Packet depends on the address and represents the sub-address in the case of
the Register Block and the number of words to follow, in the case of the CAMAC Stacks
(CDS and CSS) and the CAMAC NAF Generator (CNAF). The subsequent words in the
buffer, if any, represent the data to be stored in the target device or the data to be interpreted
and acted upon by the target device (in the case of the CNAF). A detailed description of Out
Packets for the four target devices is given below.
4.2 Writing Data to the Register Block
The Out Packet for writing data to various registers of the Register block is composed of the
following words:
1. Target Address = 1
2. Register Sub-Address
3. Data To be Written
In the case of the LAM mask register (sub-address 8), additional 8 bits are sent in the
additional, fourth word:
4. High Bits of the Data
4.3 Reading Back Data from the Register Block
To read back data from the Register block, one must first send a request Out Packet to the
Register Block consisting of two words:
1. Target Address + 4 = 5
2. Register Sub-Address
WIENER, Plein & Baus GmbH
the target address identifying the register block
sub-address of a particular register in the block (see Table 2,
further above).
a 16-bit data word.
16-bit data word containing.
the target address of the Register Block + the data request bit
(bit 3)
sub-address of the register of interest (see Table 2.)
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