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Allen-Bradley Mini-PLC Mini-PLC-2/16 User Manual

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Mini PLC 2/02, 2/16, 2/17 Processor

(cat. no. 1772 LZ, LZP, LX, LXP,

LW, LWP)

User Manual

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Summary of Contents for Allen-Bradley Mini-PLC Mini-PLC-2/16

Page 1 Mini PLC 2/02, 2/16, 2/17 Processor (cat. no. 1772 LZ, LZP, LX, LXP, LW, LWP) User Manual...
Page 2 No patent liability is assumed by Allen-Bradley Company with respect to use of information, circuits, equipment or software described in this text. Reproduction of the contents of this manual, in whole or in part, without written permission of the Allen-Bradley Company is prohibited.
Page 3 Summary of Changes Summary of Changes Summary of Changes This release of the publication contains updated information: For this updated information: See: revised conventions chapter 1 clarified ATTENTION statement about using chapter 3 1770 XZ batteries revised illustrations showing the new chassis chapter 3 (1771 A1B, A2B, A3B, A3B1, and A4B) chapter 4...
Page 4: Table Of Contents
Table of Contents Summary of Changes ......Using This Manual ....... Chapter Objectives .
Page 5 Table of Contents Step 10 - Connecting to the Field Wiring Arms ....4 32 Step 11 - Connecting Power to the Processor or Power Supply .
Page 6 Table of Contents Branch Start/End ........Nesting .
Page 7 Table of Contents EAF Math Instructions ......14 1 Chapter Objectives ........14 1 Two Operand EAFs .
Page 8 Table of Contents Block Transfer ........18 1 Chapter Objectives .
Page 9 Table of Contents Selectable Timed Interrupt ......22 1 Chapter Objectives ........22 1 Introduction .
Page 10 Table of Contents Specifications ........Processor Comparison Chart .
Page 11: Using This Manual
Chapter Using This Manual Chapter Objectives Read this chapter before you use your processor. Important: This manual is for the series D Mini-PLC-2/02, Mini-PLC-2/16 and Mini-PLC-2/17 processors. See the Series Changes on page 3-2 for the differences with other processor series. Differences This manual describes the Mini-PLC-2/02, Mini-PLC-2/16 and Mini-PLC-2/17 processors.
Page 12: What's This User Manual Contains
This manual is procedure oriented. It tells you how to program and operate your Mini-PLC-2/02, Mini-PLC-2/16, and Mini-PLC-2/17 processor. If you need to learn more about these processors, contact your local Allen-Bradley representative or distributor. Vocabulary To make this manual easier to read and understand, we refer to the:...
Page 13: Conventions
Chapter 1 Using This Manual Conventions A word equals 16 bits; a byte equals 8 bits (1/2 of a word). Words in [ ] denote a key name or symbol. Words in < > denote information that you must provide - for example, an address value. All word addresses are displayed in the octal numbering system.
Page 14: Related Publications
The publication index, publication SD 499, lists all available publications to further inform you about products related to the Mini-PLC-2/02, Mini-PLC-2/16, and Mini-PLC-2/17 processors. Consult your local Allen-Bradley distributor or sales engineer for information regarding this publication or any needed information.
Page 15: Fundamentals Of A Programmable Controller
Chapter Fundamentals of a Programmable Controller Chapter Objectives In this chapter, you review general fundamentals common to our programmable controllers. This chapter: describes what a programmable controller does describe the functions of a programmable controller describes the four major sections of a programmable controller gives an example of a simple program Traditional Controls You are probably familiar with the traditional methods of machine control.
Page 16: Programmable Systems
Chapter 2 Fundamentals of a Programmable Controller Programmable Systems Systems run by programmable controllers operate in much the same way. Programmable controllers can perform many of the functions of traditional controls. Input sensing devices report machine conditions; output devices respond to commands. Programmable Control Panel Controller...
Page 17 Chapter 2 Fundamentals of a Programmable Controller Power Supply Processor (Decision Making) Action Information Input Output Limit, Proximity, Pressure, Solenoids Temperature Switches Motor Starters Indicators Push Buttons Alarms Logic Logic Analog Analog Processor The first section of a programmable controller is the processor. The processor might be called the “brains”...
Page 18 Chapter 2 Fundamentals of a Programmable Controller Memory Memory serves three functions: stores information in the data table that the CPU may need stores sets of instructions called a program stores messages Data Table The area of memory where data is controlled and used, is called the data table.
Page 19 Chapter 2 Fundamentals of a Programmable Controller I/O Image Tables The input image table reflects the status of the input terminals. The output image table reflects the status of bits controlled by the program. Each image table is divided into a number of smaller units called bits. A bit is the smallest unit of memory.
Page 20 Chapter 2 Fundamentals of a Programmable Controller Program Storage Program storage takes up the largest portion of memory. This is where the user’s program is stored. Each program is made up of a set of statements. Each statement does two things: It describes an action to be taken.
Page 21 Chapter 2 Fundamentals of a Programmable Controller Message Storage The third area of memory, message storage, begins after the end statement in the user’s program. Two alphanumeric characters can be stored in a word. Messages are entered into memory from either a 1770-T3 terminal or a peripheral device.
Page 22 Chapter 2 Fundamentals of a Programmable Controller Output Modules The output modules of a programmable controller have four functions: termination indication conditioning isolation Termination The output provides terminals for the field wiring going to the output devices on the machine. Indication The output of most modules provides a visual indication of the selected state of each output device with LED indicators.
Page 23: Control Sequence
Chapter 2 Fundamentals of a Programmable Controller Control Sequence Let’s look at a simple example to see the sequence of events that take place in controlling a machine with a programmable controller (Figure 2.1). Suppose you are making a part. The motor driven conveyor carries a unit to the work area.
Page 24: Scan Sequence
Chapter 2 Fundamentals of a Programmable Controller Scan Sequence On power up, the processor begins the scan sequence (Figure 2.2) with a program pre-scan. This pre-scan is completed as if the entire program lies within an active MCR zone. Next the processor completes the I/O scan. During the I/O scan, data from input modules is transferred to the input image table.
Page 25 Chapter 2 Fundamentals of a Programmable Controller Next, the processor scans the program. It does this statement by statement. Each statement is scanned in this way: For each input instruction, the processor checks, or “reads,” the image table to see if the condition has been met. If the set of conditions has been met, the CPU writes a 1 into the bit location in the output image table corresponding to the output terminal to be energized.
Page 26 Chapter 2 Fundamentals of a Programmable Controller The processor scans the program. Our program states that if (conditions) input bit 02 is on, turn on output 02. If input bit 02 is off then output bit 02 is off. Since the alter condition is not true, the processor turns off output bit 02.
Page 27: Hardware Features
Chapter Hardware Features Chapter Objectives This chapter is a summary of the Mini-PLC-2/02, -2/16, and -2/17 processors. In this chapter, you will read about: major features processor features series changes special features optional equipment Major Features A complete processor system consists of the following major components: a processor I/O chassis power supply...
Page 28: Series Changes
Chapter 3 Hardware Features basic instruction set: - relay-like instructions - up to 488 timers and counters in the processors - program control instructions - data manipulation and comparison - three-digit math (add, subtract, multiply, and divide) advanced instruction set: - jump instructions and subroutine programming - block transfer instructions - data-transfer file instructions...
Page 29: Special Features
Chapter 3 Hardware Features Table 3.A Additional Features of Mini PLC 2 Processors 12.5msec/ 1/2AA Last 1/2 Slot 7.5msec/ Batt K Scan Batt Switch State Addr Shift K Scan Memory Mini PLC 2/02 Series A Series D Mini PLC 2/16 Series A Series B Rev A or B...
Page 30 Chapter 3 Hardware Features Figure 3.1 Without a Power Supply PROC indicator lights green for normal operation and red for a processor fault. Off indicates that you are in Program Mode or a possible run time error. You reset this LED by cycling power. PROC BATT (Red) lights when battery should be replaced.
Page 31 Chapter 3 Hardware Features Figure 3.2 With a Power Supply PROC indicator lights green for normal operation and red for a processor fault. Off indicates that you are in Program Mode or a possible run time error. You reset this LED by cycling power. Green LED lights for normal PROC power supply operation.
Page 32 Chapter 3 Hardware Features PROG – You can enter and edit your program from the 1770-T3 industrial terminal. User program and I/O are not scanned when the switch is in this position and outputs are disabled. You cannot change to another mode of operation with the 1770-T3 terminal when the switch is in this position.
Page 33: Optional Equipment
Chapter 3 Hardware Features ATTENTION: Use only an Allen-Bradley authorized 1770-XZ 3.6V “1/2AA” size (Tadiran TL 2150 Type 1/2AA/s lithium thionyl chloride battery with pressure contacts. Using an unauthorized battery could result in sub-standard performance of your processor. See chapter 4 for details about battery installation and disposal.
Page 34 Chapter 3 Hardware Features We recommend that you use a series C, revision C or later 1770-T3 terminal; earlier versions do not provide full functionality. You can use a 1770-T1 or 1770-T2 industrial terminal to program the processors; however, only instructions supported by these terminals can be programmed.
Page 35 Chapter 3 Hardware Features Connect one end of the PLC-2 Program Panel Interconnect Cable (cat. no. 1772-TC) to CHANNEL A at the rear of the industrial terminal. Connect the other end of the cable to the socket labeled INTFC at the front of the processor.
Page 36 Chapter 3 Hardware Features After a short while the following display appears. DIAGNOSTICS PASSED MODE SELECTION KEYBOARD MODULE 1770-FD C SERIES B/H FOR USE WITH INSERT THE FOLLOWING MODE: KEYTOP OVERLAY: PROCESSORS: 1770-KBA 10 = PLC 1770-KCB 11 = PLC-2 MINI-PLC-2,PLC-2 PLC-2/02 PLC-2/05,PLC-2/15...
Page 37 Chapter 3 Hardware Features Some keys have two symbols occupying one key (Figure 3.5). To display the top section of each key, press your shift key before the desired symbol. For example: To display: Press individually: [Shift] A Data Monitor Functions –– You can display on a CRT and print directly to a data terminal –...
Page 38 Chapter 3 Hardware Features This Power Supply: Receives Power from: And Supplies this Power to the Chassis: 1771 P3 an external 120V ac power source +5V dc 1771 P4 1771 P5 an external 24V dc power source 1771 P7 an external 120V or 220V ac power source ATTENTION: Do not parallel a 1771-P5 power supply and a 1772-LWP, -LXP, or -LZP processor because of power-up and...
Page 39 Chapter 3 Hardware Features Transferring a Program into the EEPROM (Burning the EEPROM) Put the processor in the remote program or program mode of operation. Place the keyswitch into the MEM STORE position, then to PROG, and then back to MEM STORE within one second until the green PROC RUN indicator turns ON.
Page 40: Installing Your Programmable Controller
Allen Bradley Hardware Catalog Number The quantity of the hardware you need depends on your application. Consult your local Allen-Bradley sales engineer or distributor for more information concerning these items. In addition to our hardware, we recommend: a metal enclosure to protect your processor from electromagnetic...
Page 41: Planning Your Processor System
Chapter 4 Planning Your A well-planned layout is essential for the installation of your processor. Processor System You should consider the following factors: location environment mechanical protection conductor categories raceway layout power distribution surge suppression Location Determining the proper location should be your primary concern. We specify: This Characteristic: Should Meet this Specification:...
Page 42 Chapter 4 Mechanical Protection You provide the enclosure for your processor system. This enclosure is the primary means of protecting your processor system from atmospheric contaminants such as oil, moisture, dust, corrosive materials, or other harmful substances. We suggest that you use an enclosure that conforms to the National Electrical Manufacturer’s Association standard (NEMA Standard Publication No.
Page 43 Chapter 4 Category-2 Conductors Category-2 conductors are, in general, low-power conductors that are, therefore, less tolerant of noise than category-1 conductors and should also generate less noise. They include: serial communication cables — They connect between processors or to remote I/O adapter modules, programming terminals, computers, or data terminals.
Page 44 Chapter 4 All category-2 conductors must be properly shielded, where applicable, and routed in a separate raceway. If a category-2 conductor must cross power feed lines, it should do so at right angles. Route category-2 conductors at least 1 foot from 120V ac power lines, 2 feet from 240V ac power lines, and 3 feet from 480V ac power lines.
Page 45 Chapter 4 To determine the required rating of the transformer, add the external-transformer rating for the power supply and all other power requirements (input circuits, output circuits). The power requirements must take into consideration the surge currents of devices controlled by the processor.
Page 46 Chapter 4 Figure 4.1 Grounded ac Power Distribution System with Master Control Relay – 102300-I...
Page 47 Chapter 4 Figure 4.2 Ungrounded ac Power Distribution System with Master Control Relay FUSE FUSE – 10301...
Page 48 Chapter 4 Second Transformer Allen-Bradley power supplies have circuits which suppress electromagnetic interference from other equipment. However, it is useful to isolate output circuits from power supplies and input circuits to guard against output transients from being induced into inputs and power supplies.
Page 49 Chapter 4 Figure 4.3 Power Supplies and Input Circuits Receiving Power through a Separate Transformer 10302-I Ground Connection When bringing ac power into the enclosure, do not connect its raceway through an equipment-grounding conductor to the ground bus on the back-panel.
Page 50 EMI. Figure 4.4 shows typical suppression circuitry for different types of loads. Allen-Bradley bulletin 700 relays and bulletin 509 and 709 motor starters have surge suppressors available as an option. Table 4.B lists these Allen-Bradley products and their suppressors. 4-11...
Page 51 Chapter 4 Figure 4.4 Typical Suppression Networks Suppressor for 3 phase apparatus Suppressor for 3 phase apparatus Suppressor for small apparatus Suppressor for small apparatus Suppressor for large apparatus Suppressor for dc relays – 12057-I Table 4.B Allen Bradley Suppressors Allen Bradley Equipment Suppressor Catalog Number...
Page 52 Chapter 4 How to Install This section provides general installation guidelines. The input and output Your Processor devices that control your manufacturing operations determine the specifics of your installation. Figure 4.5 shows the location of your major pieces of hardware. Figure 4.5 The Locations of the Major Pieces of Hardware 13491...
Page 53: Step 1 - Mounting The Backpanel
Chapter 4 Installing your processor involves twelve steps. Perform these steps in order. Mounting the backpanel (page 4-14) Mounting and grounding components on the backpanel (page 4-15) Setting the switches within the switch group assembly (page 4-22) Installing keying bands and field wiring arms (page 4-24) Installing I/O modules (page 4-26) Installing backup battery (page 4-28) Installing the EEPROM memory module (page 4-29)
Page 54 Chapter 4 Figure 4.6 Assembly Diagram of Studs, Bus, and Backpanel to Your Enclosure Bolt Mounting of a Ground Bus or a Chassis to the Backpanel Stud Mounting of this Backpanel to the Back Wall of the Enclosure Stud Mounting of a Ground Bus or Chassis to the Backpanel Step 2 - Mounting and Use 6.35 mm (0.25 in.) bolts to mount the I/O chassis on the enclosure...
Page 55 Chapter 4 Figure 4.7 Programmable Controller Components Must Not be Spaced Less Than These Minimums Figure 4.8 You Need These Dimensions to Mount an I/O Chassis (cat.no. 1771 A1B, A2B, A3B, A4B) 4-16...
Page 56 Chapter 4 Before grounding your processor system, consult the following sources of information: National Electrical Code, published by the National Fire Protection Association of Boston, Massachusetts local codes and ordinances Mounting Processor Components After planning your layout, you can begin mounting the chassis. In mounting each chassis: Make sure each chassis lies flat.
Page 57 Chapter 4 If the mounting brackets of a chassis do not lay flat before the nuts are tightened, use additional washers as shims so that the chassis will not be warped by tightening the nuts. Warping a chassis could damage the backplane and cause poor connections.
Page 58 Chapter 4 Figure 4.10 Ground Bus Connections 10309-I Figure 4.11 Details of Ground Connection at Enclosure Wall 10310-I Connect an equipment grounding conductor directly from each chassis to an individual bolt on the ground bus (Figure 4.12). For those chassis with a ground stud, use the ground stud for this connection.
Page 59 Chapter 4 If the power supply has its own groundable chassis, do not connect the GND terminal of the power supply. However, when you connect power to a power supply without a groundable chassis of its own (such as an ac-input power-supply module), you must also use 12 AWG copper wire to connect its GND terminal to the ground stud or mounting bolt connected to the ground bus (Figure 4.12).
Page 60 Chapter 4 Figure 4.12 Grounding Configuration (Typical) 4-21...
Page 61: Step 3 - Setting The Switches Within The Switch Group Assembly
Chapter 4 Step 3 - Setting the Switches within the Switch Group Assembly Figure 4.13 Locating Switch Group Assembly on the Backplane of an I/O Chassis Table 4.C and Table 4.D explain how each switch is used by the processor. Switches 2 and 3 are not used.
Page 62 Chapter 4 Table 4.C Set Switches 1, 4, 5 and 8 If you want: Then set: 4-23...
Page 63: Step 4 - Installing Keying Bands And Field Wiring Arms
Chapter 4 Table 4.D Set Switches 6 and 7 Then Without and EEPROM installed in your processor PROCESSOR MEMORY INVALID Then With an EEPROM installed in your processor PROCESSOR MEMORY INVALID Step 4 - Installing Keying We ship plastic keying bands with each I/O chassis. With your fingers, Bands and Field insert two keying bands in the top backplane connectors of the I/O chassis.
Page 64 Chapter 4 Figure 4.14 Place the Keying Bands on the Backplane of the I/O Chassis É É É É É É É É 10313-I Use the numbers to the right of the backplane socket as a guide when positioning the keying bands. See the installation instructions for the keying position of each I/O module.
Page 65: Step 5 - Installing I/O Modules
Chapter 4 Figure 4.15 Snap the Field Wiring Arm onto the I/O Chassis Step 5 - Installing Insert each I/O module into its properly keyed slot by sliding it onto the I/O Modules plastic tracks of the I/O chassis (Figure 4.16). Snap the module locking latch over the I/O module.
Page 66 Chapter 4 Figure 4.16 Place Each I/O Module into its Corresponding Keyed Slot in the I/O Chassis ATTENTION: Do not force and I/O module into a backplane connector. Forcing an I/O module can damage the backplane connector or the I/O module. Calculate the total current requirement for all installed modules to ensure that the sum does not exceed the limit of the I/O chassis’...
Page 67: Step 6 - Backup Battery
Chapter 4 ATTENTION: We recommend that you use the following series of modules when using slot-mounted power supplies: Isolated ac (120V) Output Module (1711-OD) series C Isolated ac (220V) Output Module (1771-OR) series B Contact Output Module (1771-OYL, -OZL, or -OW) These modules are compatible with the “soft-start”...
Page 68: Step 7 - Installing The Eeprom Memory Module
Chapter 4 Replace the battery cover. Tighten the screw. How to Dispose of the Battery Batteries should be collected for disposal in a manner to prevent short circuiting, compacting, or destruction of case integrity and hermetic seal. ATTENTION: Do not incinerate or dispose of lithium batteries in general trash collection.
Page 69 Chapter 4 Place the processor on a clean flat surface with the bottom of the module facing you. Position the EEPROM memory module in the memory module slot with its label facing upward. Insert and press firmly for proper connection (Figure 4.17). Figure 4.17 Inserting the EEPROM Memory Module into the Processor 10316-I...
Page 70: Step 8 - Installing The Processor
Chapter 4 Step 8 - Installing the Slide your processor into the leftmost slot of the I/O chassis (Figure 4.18) Processor Figure 4.18 Place the Processor in the Left Most Slot of the I/O Chassis ATTENTION: Do not place your processor in the I/O chassis without keying bands.
Page 71: Step 10 - Connecting To The Field Wiring Arms
Chapter 4 Step 10 - Connecting to the Your I/O devices connect to the I/O module’s field wiring arm. Every I/O Field Wiring Arms module must be properly wired and every I/O connection must be made at the proper field wiring arm terminal. Refer to the specific I/O module publication for connection diagrams.
Page 72 Chapter 4 For a single-conductor wire or multi-conductor cable, perform the following steps. For a multi-conductor shielded cable, proceed to the next section (page 4-34). Single Conductor Wire or Multi Conductor Cable Strip about 3/8 inch insulation to expose the end of the wire Loosen a terminal screw and place the wire under the pressure plate of the terminal.
Page 73 Chapter 4 Repeat steps 2 and 3 until you wire the appropriate I/O devices to the field wiring arm. Connect the drain wire to ground. Gather all wires and neatly bundle them using tie wraps. Label all wires with a 5-digit I/O address code at each wire connection.
Page 74 Chapter 4 Multi-conductor shielded cable is Belden type 8761. It consists of twisted pairs of conductor wires wrapped in two layers of shielding. Our wiring procedure shows one pair of conductor wires. The required number of I/O terminals determines the number of conductor wires needed within the cable for your application.
Page 75 Chapter 4 Cut the insulation and filler cords. Fold the drain wire back to separate it from the conductor wire. Strip about 3/8 inch insulation to expose the end of the wire. Loosen a terminal screw and place the wire under the pressure plate of the terminal screw.
Page 76: Step 11 - Connecting Power To The Processor Or Power Supply
Chapter 4 Repeat steps 6 and 7 until you wire the appropriate I/O devices to the field wiring arm. Connect the drain wire to ground. 10. Gather all of your wires and neatly bundle them using tie wraps. 11. Label all of your wires with a 5-digit I/O address code at each wire connection.
Page 77 Chapter 4 Table 4.E Processor Operate and Shutdown Voltages On this system If the line voltage 120V 220V The processor should You provide the appropriate power cable to connect a processor with a power supply (1771-P3, -P4, -P5 power supplies) to its terminal strip. A processor without a power supply receives its power from the backplane of the I/O chassis.
Page 78 Chapter 4 Figure 4.20 Top View of the ac Power Plug Connecting a Power Supply To connect the wires to the 1771-P3, -P4, or -P5 power supplies do the following: Strip 3/8 inch insulation from the end of the wire. Figure 4.21 shows an ac powered 1771-P3 or -P4 power supply.
Page 79 Chapter 4 Figure 4.21 Connect Your Power Cable to the ac Power Supply's Terminal Strip 120V 10321-I Figure 4.22 Connect Your Power Cable to the dc Power Supply's Terminal Strip Connecting More Than One Power Supply When you use two power supplies (Figure 4.23) connect the: paralleling cable between each power supply incoming power source to that terminal strips of the power supplies 4-40...
Page 80 Chapter 4 Figure 4.23 Connecting More Than One Power Supply 13496 To easily remove your I/O modules that are between the two power supplies, place the paralleling cable across the top of the I/O chassis (Figure 4.23). 4-41...
Page 81: Step 12 - Connecting The Industrial Terminal
Chapter 4 Setting the Input Voltage Selector Switch The processors can operate on 120 or 220 V ac. Select the required operating voltage by setting the Input Voltage Selector Switch at the rear of the processor (Figure 4.24). The processor is shipped set for 120V operation.
Page 82: Master Control Relay
In cases where unexpected machine motion could damage equipment or injure personnel, you should provide a hard-wired master control relay for emergency power shutdown. Allen-Bradley suggests you include several emergency stop switches in the master control relay circuit. When any of the emergency stop switches is opened, power to the input and output devices is removed.
Page 83: Starting Your Processor
Chapter Starting Your Processor Chapter Objectives This chapter covers the initial start-up of your processor system. It explains how to: document the processor check the operation of your processor before supplying power understand hardware addressing start the processor system test the input and output devices Verify Your System's Verify your I/O devices’...
Page 84 Chapter 5 Starting Your Processor Figure 5.1 Connection Diagram Addressing Worksheet...
Page 85 Chapter 5 Starting Your Processor Status Indicators for Most I/O modules have status indicators on the front panel. Each indicator I/O Modules corresponds to a terminal on the I/O module’s field wiring arm (Figure 5.2). When status indicators on input modules light, power is present at the input terminal.
Page 86: Addressing Your Hardware
Chapter 5 Starting Your Processor Addressing Your Hardware You must properly address your hardware so that it relates to your ladder diagram program. In the ladder diagram program, the input or output instruction address is associated with a particular I/O module terminal and is identified by a 5-digit address (Figure 5.3).
Page 87 Chapter 5 Starting Your Processor In Figure 5.3, reading from left to right, the: first number denotes the type of module: - 0 output - 1 input second number denotes the I/O rack: - In 2-slot addressing, the rack number is always 1. - In 1-slot addressing, the rack number is either 1 or 2.
Page 88 Chapter 5 Starting Your Processor Using 8-Point I/O Modules I/O modules generally provide eight input terminals or eight output terminals. Figure 5.4 illustrates the 2-slot I/O group concept with two 8-point input modules. Figure 5.5 illustrates the 2-slot I/O group concept with an 8-point input and an 8-point output module.
Page 89 Chapter 5 Starting Your Processor Figure 5.5 Illustration of 2 Slot Addressing with 8 point Input and Output Modules 2 slot I/O group input output terminals terminals Output image table word corresponding to the I/O group 17 16 15 14 10 07 06 05 03 02 01 00 output bits used...
Page 90 Chapter 5 Starting Your Processor Figure 5.6 Illustration of 2 Slot Addressing with 16 Point Input and Output Modules 2 slot I/O group input output terminals terminals 16 point input and output modules use two words (one input, one output) of the image table.
Page 91 Chapter 5 Starting Your Processor Assigning I/O Rack Numbers When you select 2-slot addressing, each pair of slots (one I/O group) is assigned to the corresponding pair of words in the input and output image tables. You assign one I/O rack number to eight I/O groups (Figure 5.7). Figure 5.7 I/O Image Table and Corresponding Hardware for One Assigned Rack Number for 2 Slot Addressing...
Page 92 Chapter 5 Starting Your Processor 1 Slot Addressing The processor addresses one I/O module slot as one I/O group. Each 1-slot I/O group is represented by a word in the input image table and a word in the output image table. You have 16 input bits and 16 output bits available for each slot.
Page 93 Chapter 5 Starting Your Processor Figure 5.8 Illustration of 1 Slot Addressing with 16 Point I/O Modules 1 slot 1 slot I/O group I/O group input output terminals terminals Output image table word Output image table word corresponding to the I/O group. corresponding to the I/O group.
Page 94 Chapter 5 Starting Your Processor Assigning I/O Rack Numbers When you select 1-slot addressing, each slot is an I/O group. You still assign one I/O rack number to eight I/O groups; therefore, in a 16-slot I/O chassis you now have two I/O racks (Figure 5.9). Figure 5.9 Assigning I/O Rack Numbers with 1 Slot Addressing I/O group number...
Page 95 Chapter 5 Starting Your Processor Figure 5.10 Example of 1 Slot Addressing I/O group number rack 1 rack 2 I/O group 1 I/O group 1 address address 1 1 1 1 2 1 input rack I/O group 13499 Using 32-Point I/O Modules 32-point I/O modules provide 32 input or 32 output terminals.
Page 96 Chapter 5 Starting Your Processor 1/2 Slot Addressing When you select 1/2-slot addressing, the processor addresses one-half of an I/O module slot as one I/O group. The physical address of each I/O slot corresponds to two input and two output image table words. The type of module you install (8, 16 or 32 I/O points) determines the number of bits in these words that are used.
Page 97 Chapter 5 Starting Your Processor Figure 5.11 Illustration of 1/2 Slot Addressing Using a 32 Point I/O Module 32 point Input Module Bit # Bit # Input Word 0 Image Table Words Allocated Output Word 0 for I/O Group 0 1/2 slot 1/2 slot I/O Group...
Page 98 Chapter 5 Starting Your Processor Assigning I/O Rack Numbers When you select 1/2-slot addressing, each slot corresponds to two I/O groups. You still assign one rack number to eight groups; however, with 1/2-slot addressing this requires only four slots. Thus, in a 16-slot chassis, you now can have four I/O racks (Figure 5.12).
Page 99 Chapter 5 Starting Your Processor Figure 5.13 illustrates addressing 4 modules, each with the same I/O group number, but in the four different racks of a single I/O chassis. Figure 5.13 Group Address of a Module in Four Different Racks 10337-I I/O group number Rack 1...
Page 100: Before You Supply Ac Power
Chapter 5 Starting Your Processor Before You Supply AC Power ATTENTION: Unexpected machine motion during system start-up can damage equipment and injure personnel. Disconnect any device that might cause machine motion to occur when it is energized. Before you supply ac power to your processor do the following: Measure the ac line voltage and make sure it corresponds to the system power supply.
Page 101 Chapter 5 Starting Your Processor Using Pushbuttons ATTENTION: Use only trained personnel to conduct this test. Have a trained person at appropriate emergency stop switches to de-energize output devices that could cause hazardous operation. To use a pushbutton to test your output devices, do the following: Connect a normally-open/momentary-close pushbutton switch as an input device to an input module.
Page 102: Testing Input Devices
Chapter 5 Starting Your Processor Using the 1771 SIM Module The Switch/Indicator module is compatible with any 1771 I/O chassis. It has 8 switches to simulate 8 inputs and it has 8 LED’s to indicate when an addressed output is active. It requires no external power. See publication 1771-2.106 for more information.
Page 103 If the instruction does not intensify, then: repeat the test procedure check your input module call your Allen-Bradley sales engineer or distributor If the indicator does not light, check: power source for the input device wiring from the input device connection to the field wiring arm’s terminal...
Page 104: Maintaining And Troubleshooting Your Processor
Chapter Maintaining and Troubleshooting Your Processor Chapter Objectives This chapter describes techniques of maintaining and troubleshooting your processor. When you have finished, you should be: aware of items requiring maintenance able to troubleshoot your processor. General The processor is designed to minimize the need for maintenance and troubleshooting procedures.
Page 105 Chapter 6 Maintaining and Troubleshooting Your Processor The most likely source of a problem is your hardware. This includes the wiring, I/O devices, I/O power source, and system power. You should be able to trace the source of the problem if you observe I/O device behavior and processor indicators.
Page 106 Chapter 6 Maintaining and Troubleshooting Your Processor Table 6.F The PROC Indicating LED Will Help You Troubleshoot Your Processor If the PROC indicator And the processor You should Green is in the Run mode operating normally No action required program is executing outputs are enabled.
Page 107: Memory Organization
Chapter Memory Organization Chapter Objectives This chapter discusses: hardware and its relationship to your program memory and its components This chapter provides detailed concepts of the memory’s organization and its structure. Understanding these concepts aids you in programming your processor. Introduction Before we explain memory organization and its structure, read the following definitions:...
Page 108: Memory Areas
Chapter 7 Memory Areas Memory is divided into three major areas: data table, user program, and message storage area. These areas store input status, output status, and program instructions and messages. Data Table The first part of memory is the data table (Figure 7.1). The processors are factory configured for 128 words.
Page 109 Chapter 7 Figure 7.2 Data Table Factory Configured for 2 Slot Addressing...
Page 110 Chapter 7 Figure 7.3 Data Table Configured for 1 Slot Addressing 1920 1792 3577 3968 3840 7577 7808 7680 17177 2048 3777 4096 7777 7936 17377 10349–I...
Page 111 Chapter 7 Figure 7.4 Data Table Configured for 1/2 Slot Addressing 1920 1792 3577 17 3968 3840 7577 7808 7680 17177 2048 3777 17 4096 7777 7936 17377 10350–I...
Page 112 Chapter 7 Data Table Areas The following areas make up the data table. They are: processor work area no. 1 output image table bit/word storage (020-027) timer/counter accumulated values and internal storage processor work area no. 2 input image table bit/word storage (120-127) timer/counter preset values and internal storage Chapter 2 describes the input and output image tables.
Page 113: Adjusting The Data Table
Chapter 7 Adjusting the Data Table You can adjust the size of a data table at any time during programming or editing. Using the 1770-T3 terminal, you can expand the data table in steps of two words from 48 words to 256 words and then in steps of 128 words to 1,920 words for a Mini-PLC-2/02, 3,968 words for a Mini-PLC-2/16 or 7,808 words for a Mini-PLC-2/17.
Page 114 Chapter 7 Table 7.A The Data Table Sizes Between 48 and 256 Words Number of Data Number of Data Number of Data Timers and Table Size Timers and Table Size Timers and Table Size Counters Counters Counters For 92 words, enter 022. DATA TABLE CONFIGURATION...
Page 115: Expanding The Data Table Between 130 And 256 Words
Chapter 7 Three things happen to the display. The cursor returns to the NUMBER OF 128–WORD D.T. BLOCKS. NUMBER OF T/C changes to 022. DATA TABLE SIZE becomes 92. Expanding the Data Table To expand your data table to any size between 130 and 256 words, do this: Between 130 and 256 Words DATA TABLE CONFIGURATION Three things happen to the data table configuration:...
Page 116 Chapter 7 Table 7.B The Data Table Sizes Between 384 and 7,808 words Enter Data Table Size Enter Data Table Size After you have adjusted the data table, press CANCEL COMMAND and we will continue. 7-10...
Page 117: User Program
Chapter 7 User Program The second major part of memory is the user program (Figure 7.1). It is divided into two areas: This Area: Stores this: The user program area begins at the end of the data table. Message Storage The third major part of memory is the message storage area (Figure 7.1).
Page 118 Chapter 7 Examining the Memory If you want to examine the memory layout: SEARCH The word SEARCH appears in the lower left hand corner of the screen. Memory Layout Display Mini PLC 2/17 Mini PLC 2/16 Mini PLC 2/02 This illustrates the memory layout display for a 128 word data table. Even if there are no messages or programs in the memory, the END statement is there and it requires one word.
Page 119: Scan Theory
Chapter Scan Theory Chapter Objectives In this chapter you will read about: scan function scan time Scan Function The processor controls the status of output devices or instructions in accordance with program logic. Every instruction in your program requires execution time. These times vary greatly depending upon the instruction, the amount of data to be operated on, and whether the instruction is true or false.
Page 120 Chapter 8 Figure 8.1 The Processor Scans With This Sequence Scan Program Scan Upon power-up, the processor begins the scan sequence with a program pre-scan. The processor then proceeds with the I/O scan. Data from output image table is written to the output modules. Data from the input modules is read into the input image table.
Page 121: Average Scan Time
Chapter 8 Next, the processor scans the program statement by statement: For each condition, the processor checks, or “reads,” the image table to see if the condition has been met. If the set of conditions has been met, the processor writes a one into the bit location in the output image table corresponding to the output terminal to be energized.
Page 122 Chapter 8 Add the execution values for each instruction by using Table 8.A. The sum of these values added to the I/O scan time is the average scan time. Table 8.A These Are the Approximate Execution Time Per Scan (in average microseconds) and Words Per Scan for Each Instruction Instruction Instruction Name...
Page 123 Chapter 8 Table 8.A (continued) These Are the Approximate Execution Time Per Scan (in average microseconds) and Words Per Scan for Each Instruction Instruction Instruction Name Symbol True False average Words Per µ average Instruction sec. µ sec. µ µ...
Page 124 Chapter 8 Table 8.A (continued) These Are the Approximate Execution Time Per Scan (in average microseconds) and Words Per Scan for Each Instruction Instruction Instruction Name Symbol True False average Words Per µ average Instruction sec. µ sec. µ µ µ...
Page 125 Chapter 8 Table 8.A (continued) These Are the Approximate Execution Time Per Scan (in average microseconds) and Words Per Scan for Each Instruction Instruction Instruction Name Symbol True False average Words Per µ average Instruction sec. µ sec. µ µ...
Page 126 Chapter 8 Here is an explanation of the rungs in Figure 8.2: Rung 1 - The count increments its accumulated value each time this rung is true. Rung 2 - This rung enables the counter to increment on the next scan. If we did not have this rung, the counter would always be true and it would not increment.
Page 127: Relay Like Instructions
Chapter Relay Like Instructions Chapter Objectives This chapter describes the relay-like instructions. This chapter shows how to: define the conditions needed before the action takes place enter, edit or remove relay-like instructions Programming Logic A program is a list of instructions that the processor executes. These instructions can examine or change the status of bits in the data table of the processor.
Page 128 Chapter 9 Relay Like Instructions Here, a series of conditions (C2, C2, C3) must be true before action A is performed. C1 = Input switch 1. When the switch is on, this condition is true. This switch turns on a conveyer belt. C2 = Input sensor 1.
Page 129: Bit Examining
Chapter 9 Relay Like Instructions Addresses The processor scans the status of inputs and controls output devices. It does not go to the input or output terminals to see if outputs are on or off. Rather, it checks the status of the input and output devices by scanning corresponding bits in the input and output image area of the data table.
Page 130: Examine On And Examine Off
Chapter 9 Relay Like Instructions Examine On and Examine Off The Examine On (–] [–) and Examine Off (–]/[–) instructions tell the processor to examine a bit at a specified data table location. Bit Examining Examine On Bit Examining Examine Off This Instruction: Becomes: When the...
Page 131: Bit Controlling
Chapter 9 Relay Like Instructions Editing a Partially Completed or a Completed Rung Edit an Examine On or Examine Off by performing the following steps. If you are editing a completed rung, proceed to step 1. If you are editing a partially completed rung, enter the next instruction and proceed to step 1.
Page 132: Output Latch/Unlatch
Chapter 9 Relay Like Instructions Editing in a Completed Rung Edit the Output Energize instruction by performing the following steps. However, you cannot remove an output instruction. Position the cursor over the Output Energize instruction you want to change. Press –( )– or any other appropriate output instruction key. Enter <address>.
Page 133 Chapter 9 Relay Like Instructions Keystrokes Enter an Output Latch or Unlatch instruction by performing the following steps. Press either –(L)– or –(U)– as required. Enter <address>. Important: You can initially condition the latch or unlatch instruction to on or off by positioning the cursor over the Output Latch or Output Unlatch instruction and pressing 1 or 0, respectively.
Page 134: Branching Instructions
Chapter 9 Relay Like Instructions Branching Instructions Use branching instructions when you want several parallel sets of conditions to make an output action possible. A program with branching says, “If this set of conditions is true, or if that set of conditions is true, perform the following action.”...
Page 135: Branch Start/End
Chapter 9 Relay Like Instructions Branch Start/End A Branch Start instruction begins each parallel logic branch of a rung. It allows more than one combination of input conditions to energize an output device. It is programmed before the first instruction of each parallel branch.
Page 136 Chapter 9 Relay Like Instructions Important: Once you press the Branch End instruction, the statement disappears. BRANCH END OMITTED While inserting a Branch Start instruction to an existing rung during online programming, the actual output status (on or off) may not be the logically expected state of the rung.
Page 137: Nesting
Chapter 9 Relay Like Instructions Nesting The following rung shows a nested branch. Creating nested branches is not possible because the Branch End instruction completes a branch group. But the above rung shows a single branch group with two branch end instruction. Above, the Examine On instruction with the address 11012 is actually a branch group within a branch group.
Page 138: Program Control Instructions
Chapter Program Control Instructions Chapter Objectives This chapter describes these program control instructions: output override immediate I/O update Introduction Some applications need programming techniques designed to override a group of non-retentive outputs or update I/O ahead of the usual I/O scan time.
Page 139 Chapter 10 Program Control Instruction A Master Control Reset (MCR) establishes a zone in the user program in which all non-retentive outputs are turned off simultaneously. Important: Retentive instructions (-(U)-, -(L)-, -(RTO)-) should not be placed within an MCR zone, because the MCR zone maintains retentive instructions in the last active state when the start fence goes false.
Page 140 Chapter 10 Program Control Instructions Figure 10.1 Master Control Reset End Fence 10-3...
Page 141 Chapter 10 Program Control Instruction Figure 10.2 Zone Control Reset End Fence If the start fence becomes: True - Each rung condition controls their output instruction. False - All output instructions within the zone are left in their last state. ATTENTION: MCR or ZCL zones must not overlap or nest.
Page 142: Immediate I/O Update Instructions
Chapter 10 Program Control Instructions Editing in a Completed Rung Edit these instructions by performing the following steps: Position the cursor over the MCR or ZCL instruction you want to change. Press either -(MCR)- or -(ZCL)- or any other appropriate instruction type key.
Page 143 Chapter 10 Program Control Instruction Figure 10.3 Immediate Input Instruction I/O scan Program scan Immediate Input instruction interrupts program scan 2 slot I/O group Examine bits in word Returns to 112 here in program program scan Word 112 16 bits from one module module group group written into input (input)
Page 144 Chapter 10 Program Control Instructions Figure 10.4 Immediate Output Instruction I/O Scan Program Scan control bits of word 014 here in program Immediate Output instruction interrupts program scan returns to word 014 program scan 2 slot writes all 16 bits from one I/O group output image table word to one module group...
Page 145 Chapter 10 Program Control Instruction Removing an Immediate Output Instruction The only way to remove an Immediate Output Update instruction is to remove the entire rung. See chapter 11. Removing an Immediate Input Instruction Remove an Immediate Input Update instruction by performing the following steps.
Page 146: Timers And Counters
Chapter Timers and Counters Chapter Objectives This chapter describes two instructions that keep track of timed intervals or counted events: timers counters Introduction Timer and counter instructions are output instructions internal to the processor. They provide many of the capabilities available with timing relays and solid state timing/counting devices.
Page 147: Timer Instructions
Chapter 11 Timers and Counters Preset Value (PR) Storage begins at an address 100 words greater than its corresponding AC value. Function: Timers number of elapsed timed intervals Counters number of counted events Both when the accumulated value equals the preset value, AC = PR, a status bit is set and can be examined to turn an output device on or off.
Page 148 Chapter 11 Timers and Counters When the timer on delay rung condition becomes: True Timer cycle begins. Timer increments its AC value. Bit 15 is set when AC=PR and the timer stops timing. Bit 17 is set. False Accumulated value resets to 000. Bits 15 and 17 are reset.
Page 149: Retentive Timer On
Chapter 11 Timers and Counters Enter <time base>. For This Press: Time Base: [1] [0] [0] [1] 0.01 [0] [0] Enter <preset value>. Editing in a Completed Rung Edit the Timer On or Timer Off Delay instruction by performing the following steps.
Page 150: Retentive Timer Reset
Chapter 11 Timers and Counters When the rung condition becomes: True Timer begins counting time-base intervals. Bit 15 is set when AC=PR and the timer stops timing. Bit 17 is set. False Accumulated value is retained. Bit 15 - no action is taken. Bit 17 is reset.
Page 151 Chapter 11 Timers and Counters Keystrokes Enter a Retentive Timer On or a Retentive Timer Reset instruction by performing the following steps. Press either –(RTO)– or –(RTR)–. Enter <address>. Perform steps 3, 4 and 5 for a Retentive Timer On instruction only. Enter <time base>.
Page 152: Counter Instructions
Chapter 11 Timers and Counters Counter Instructions A counter counts the number of events that occur and stores this count in its accumulated value word. Counters can be located anywhere in the data table. An event is defined as a false-to-true transition. Counter instructions have no time base..
Page 153 Chapter 11 Timers and Counters False Accumulated value is retained. Bit 14 - no action is taken. Bit 15 - no action is taken. Bit 17 is reset. The Up Counter instruction retains its AC value when: You change the mode to program or remote program. The rung condition turns false.
Page 154 Chapter 11 Timers and Counters Important: When a down counter preset is 000, the underflow bit 14 will not be set when the count goes below 0 and the count complete bit 15 will not be reset when AC < PR. Counter Reset The Counter Reset instruction resets the up counter or down counter instructions accumulated value and status bits to 0.
Page 155 Chapter 11 Timers and Counters Editing in a Completed Rung You edit an Up Counter, a Down Counter, or a Counter Reset instruction by performing the following steps. Position the cursor over the Up Counter, Down Counter or Counter Reset you want to change. Press either -(CTU)-, -(CTD)-, -(CTR)-, or any other appropriate instruction type.
Page 156: Data Manipulation And Comparison Instructions
Chapter Data Manipulation and Comparison Instructions Chapter Objectives In this chapter, you will read about two types of instructions used to transfer and compare data and how to use these instructions to perform operations of data that is stored in the data table. These types of instructions are: transfer instructions compare instructions...
Page 157 Chapter 12 Data Manipulatuion and Comparison Instructions A Put instruction receives all 16 bits of data from the immediately preceding Get instruction and stores the data at the specified data table word location. Use with a Get instruction to form a data transfer rung. This instruction is programmed in the output side of the ladder diagram rung.
Page 158: Equal To
Chapter 12 Data Manipulation and Comparison Instructions Editing a Get Instruction on a Partially Completed Rung Enter the next instruction. Position the cursor over the GET instruction. Press -[G]- or any other appropriate instruction type key. Enter <address>. Enter <data> if appropriate. Editing a Get or Put Instruction in a Completed Rung Position the cursor over the GET or PUT instruction.
Page 159 Chapter 12 Data Manipulatuion and Comparison Instructions If the rung condition becomes: True If there is equality. False If there is no equality. Keystrokes Enter an Equal To instruction by performing the following steps. Press -[=]-. Enter <address>. Enter <reference value> if appropriate. Removing an Equal To Instruction Remove an Equal To instruction by performing the following steps.
Page 160 Chapter 12 Data Manipulation and Comparison Instructions When YYY is less than 654, the Get/Less Than comparison is true and 010/02 is energized. The rung condition becomes: True If the get value is less than the reference value stored in the Less Than instruction.
Page 161 Chapter 12 Data Manipulatuion and Comparison Instructions Programmed with a Get Byte instruction located in the condition area of the ladder diagram. Do not place compare instructions between the Get Byte and Limit Test instruction. The Get Byte and Limit Test instructions work only with octal values (ranging from 000 to 377).
Page 162 Chapter 12 Data Manipulation and Comparison Instructions Case 2. Lower Limit YYY Upper Limit 0451 True True False True If YYY is equal to or less than 200 and equal to or greater than 170, the comparison is false and logic continuity is not established. If YYY greater than 200 or less than 170, the comparison is true and logic continuity is established.
Page 163: Operations Involving Transfer And Comparison Instructions
Chapter 12 Data Manipulatuion and Comparison Instructions Operations Involving Transfer You can perform four operations involving transfer and and Comparison Instructions comparison instructions. equal to or less than greater than equal to or greater than get byte/put Equal To or Less Than The Equal To/Less Than comparison is made using the Get, Less Than, Equal To, and branching instructions.
Page 164 Chapter 12 Data Manipulation and Comparison Instructions Press -[=]-. 10. Enter the same address as that entered for the Less Than instruction. 11. Enter <reference value>. 12. Press [ ] 13. Press -( )-. 14. Enter <address>. Editing the Operation See the editing for the Get, Less Than, Equal To, and branching instructions.
Page 165 Chapter 12 Data Manipulatuion and Comparison Instructions Editing the Operation See the editing for the Get and Less Than instructions Equal To or Greater Than This comparison is made using the Get, Less Than, Equal To, and branching instructions. The Get value is assigned a reference value. The Less Than and Equal To values are changing and are compared to the Get value.
Page 166: Get Byte
Chapter 12 Data Manipulation and Comparison Instructions Editing the Operation See the editing Get, Less Than, Equal To, and branching instructions. Get Byte The Get Byte instruction addresses either the upper or lower byte of a data table word. A 1 is entered after the word address for the upper byte; a 0 is entered for the lower byte.
Page 167 Chapter 12 Data Manipulatuion and Comparison Instructions The Get Byte instruction addresses either the upper or lower byte of a data table word. A 1 is entered after the word address for an upper byte; a 0 is entered for the lower byte. There are two ways to perform a Get Byte/Put instruction.
Page 168 Chapter 12 Data Manipulation and Comparison Instructions Press -(PUT)-. Enter <address>. Editing the Operation Edit a Get Byte/Put instruction by performing the following steps. Position the cursor over -[B]-. Press -[B]-. Enter <address>. Enter <byte designation>. Important: Repeat steps 2, 3 and 4 when using two Get Byte instructions. Press -(PUT)-.
Page 169: Three Digit Math Instructions
Chapter Three Digit Math Instructions Chapter Objectives This chapter explains the three-digit math instructions. Three Digit Math Your processor can perform four operations using three-digit math: addition subtraction multiplication division These operations are not signed functions. Addition Reports the sum of two values from the two Get instructions immediately preceding the addition instruction.
Page 170 Chapter 13 Three Digit Math Instructions Subtraction Reports the difference between two Get values immediately preceding the subtraction instruction. The second get word value is subtracted from the first get word value. Programmed in the output position of the ladder diagram rung.
Page 171: Entering A Three Digit Math Instruction
Chapter 13 Three Digit Math Instructions Division Reports the quotient of two values stored in the two Get instructions immediately preceding division instruction. Programmed in the output position of the ladder diagram rung. The quotient is stored in two divide instruction words.
Page 172 Chapter 13 Three Digit Math Instructions Editing a Completed Rung Edit a three-digit math operation by performing the following steps. See chapter 12 and follow the editing procedure for a Get instruction. Position the cursor over the math function. Press the appropriate instruction key. Enter <address(es)>.
Page 173: Eaf Math Instructions
Chapter EAF Math Instructions Chapter Objectives This chapter describes the EAF (Execute Auxiliary Function) math instructions. Table 14.A lists these instructions. Table 14.A EAF Function Numbers If you want to perform Use this an operation of this type function number The Mini PLC 2/02, Mini PLC 2/16, and Mini PLC 2/17 can perform these functions.
Page 174 Chapter 14 EAF Math Instructions Figure 14.1 EAF Two Operand Word and Digit Format in the Data Table Data 17 16 15 14 10 7 Address Digit 1 Digit 2 Digit 3 Operand A Digit 4 Digit 5 Digit 6 Digit 7 Digit 8 Digit 9...
Page 175 Chapter 14 EAF Math Instructions Operand B can have as many as 4 data table words. They must be in the same rung as the EAF. Conditioning statements are not permitted between these Gets and the EAF. This operand can use as many as 4 Gets, and their addresses do not have to be consecutive.
Page 176 Chapter 14 EAF Math Instructions Bits 14-17 of the result word are reserved for status bits: This Bit: Stores this: overflow/underflow 1 indicates overflow/underflow 0 result is in range zero indicator 1 zero result 0 non zero result sign bit 1 negative ( ) 0 positive (+) not used...
Page 177 Chapter 14 EAF Math Instructions Figure 14.2 EAF Word Format in the Data Table After Address Entry Data 17 16 15 14 10 7 Address Digit 1 Digit 2 Digit 3 Operand A Digit 4 Digit 5 Digit 6 Digit 7 Digit 8 Digit 9 Digit 10...
Page 178: Addition And Subtraction
Chapter 14 EAF Math Instructions Figure 14.3 EAF Input and Result Rung EXECUTE AUX Result FUNCTION FUNCTION NUMBER: DATA ADDR: Operand A RESULT ADDR: Operand B Keystrokes Enter an EAF input and result rung (like Figure 14.3) be performing the following steps.
Page 179 Chapter 14 EAF Math Instructions Figure 14.4 EAF Addition Function Input and Display Rungs EXECUTE AUX FUNCTION FUNCTION NUMBER: DATA ADDR: RESULT ADDR: Enter values for operands A and B. Entry of Operand A = 256384 and Operand B = 102746 produces the Result 359130 for addition (Figure 14.4) or 153638 for subtraction.
Page 180: Multiplication And Division
Chapter 14 EAF Math Instructions Multiplication and Division This EAF multiplies (or divides) two numbers. Word formats for multiplication and division are the same. The only difference between the two EAFs is their function numbers: multiplication is 03 and division is 04. Both of these functions limit calculations to six digits per operand, stored anywhere within the 12 available digits.
Page 181: Y To The X
Chapter 14 EAF Math Instructions Figure 14.7 EAF Multiplication Format in the Data Table After Execution Data 17 16 15 14 10 7 Address Operand A Operand B Result Address Result 10351-I Y to the X This EAF instruction is a feature of the Mini-PLC-2/17 processor only and +/–x finds the value of the equation y = r.
Page 182: One Operand Eafs
Chapter 14 EAF Math Instructions Figure 14.8 EAF Power Function Input and Display Rungs EXECUTE AUX FUNCTION FUNCTION NUMBER: DATA ADDR: RESULT ADDR: Enter the values for the base and the exponent. Entry of y = 2 in word 050 and x = 5 in word 041 produces the result 32.
Page 183 Chapter 14 EAF Math Instructions Figure 14.10 EAF One Operand Word and Digit Format in the Data Table Data 17 16 15 14 10 7 Address Digit 1 Digit 2 Digit 3 Operand A Digit 4 Digit 5 Digit 6 Digit 7 Digit 8 Digit 9...
Page 184: To The
Chapter 14 EAF Math Instructions To enter the number ABC DEF . GHI use three Gets or three data table words. ––––[G]–––[G]–––[G]––– ABC DEF . GHI xxx +/– ABC DEF GHI To enter the number ABC DEF . GHI JKL use four Gets or four data table words.
Page 185 Chapter 14 EAF Math Instructions Data Table Format After Address Entry Be careful not to select data and result addresses so that they overlap. Figure 14.11 EAF Word Format in the Data Table After Address Entry Data Address 17 16 15 14 10 7 Digit 1...
Page 186 Chapter 14 EAF Math Instructions Keystrokes Enter a one operand EAF (like Figure 14.12) by performing the following steps. Press Enter result and data branch. Enter the values for the Operand. Complete the parallel branches. Press [Shift] [EAF]. Enter the appropriate function number (Table 14.A). Enter the data and result addresses of the EAF instruction.
Page 187 Chapter 14 EAF Math Instructions Exponential Enter an exponential function EAF rung like that shown in Figure 14.13. Figure 14.13 EAF Exponential Function Input and Display Rung EXECUTE AUX FUNCTION FUNCTION NUMBER: DATA ADDR: RESULT ADDR: Enter values for the operand. You can enter these values from the keyboard of your 1770-T3 terminal or through ladder diagram functions.
Page 188 Chapter 14 EAF Math Instructions Square Root This function finds the value of +x = y. The Operand and Result words have the format: + xxx xxx . xxx xxx = + yyy yyy . yyy yyy If you want to find the square root of a negative number, this function ignores the minus sign and finds the square root of the absolute value of the number.
Page 189 Chapter 14 EAF Math Instructions Figure 14.16 EAF Square Root Format in the Data Table After Execution Data Address 17 16 15 14 10 7 Operand A Result Address Result 10356-I 10 to the X The 10 to the x function finds the value of 10 = y.
Page 190 Chapter 14 EAF Math Instructions Figure 14.18 EAF Power of 10 Format in the Data Table After Execution Data Address 17 16 15 14 10 7 Operand A Result Address Result 10357-I Reciprocal The Reciprocal EAF instruction is a feature of the Mini-PLC-2/17 processor only.
Page 191: Bcd To Binary
Chapter 14 EAF Math Instructions Figure 14.20 EAF Reciprocal Format in the Data Table After Execution Data Address 17 16 15 14 10 7 Operand A Result Address Result 10358-I BCD to Binary The BCD to Binary conversion function converts a BCD Conversion number into a binary number.
Page 192: Binary To Bcd
Chapter 14 EAF Math Instructions Enter the BCD number. Entry of the BCD number 004 095 produces the hexadecimal number FFF. If the Operand is greater than +32 767, the result 7FFFh is stored in the data table. However, you will see only FFF below the instruction.
Page 193 Chapter 14 EAF Math Instructions Enter a Binary number. Entry of the binary number FFF produces the BCD number 004 095. If you enter 7FFF (use SEARCH 53 and set the bits), 32 767 is displayed. All negative values are stored as two’s complement.
Page 194: Eaf Logarithmic, Trigonometric, And Fifo Instructions
Chapter EAF Logarithmic, Trigonometric, and FIFO Instructions Chapter Objectives This chapter describes the Logarithmic, Trigonometric, and FIFO Load, and FIFO Unload EAF instructions. Table 15.A EAF Function Numbers If you want to perform Use this an operation of this type function number The Mini PLC 2/02, Mini PLC 2/16 and Mini PLC 2/17 can perform these functions...
Page 195 Chapter 15 Figure 15.1 EAF One Operand Word and Digit Format in the Data Table Data 17 16 15 14 10 7 Address Result Address The Operand and the Result words have the format xxx xxx . xxx xxx. You can enter them from the keyboard of your 1770-T3 terminal or through ladder diagram instructions.
Page 196 Chapter 15 To enter the number ABC DEF use two Gets or two data table words. ––––[G]–––[G]––– ABC DEF . xxx xxx +/– ABC DEF To enter the number ABC DEF . GHI use three Gets or three data table words. ––––[G]–––[G]–––[G]–––...
Page 197 Chapter 15 Data Table Format After Address Entry Be careful not to select operand (data) and result addresses so that they overlap. Figure 15.2 EAF Word Format in the Data Table After Address Entry Data 17 16 15 14 10 7 Address Result Address...
Page 198: Log To Base 10 Or Log To Base E
Chapter 15 Keystrokes Enter an EAF input and result rung (like Figure 15.3) by performing the following steps. Press Enter the result branch with its four Gets. Press and enter the operand with its four Gets. Enter the values for the Operand. Complete the parallel branches.
Page 199: Sine And Cosine
Chapter 15 Enter the value for the operand. Entry of operand (base 10) = 648 produces the result 2.811572. Figure 15.5 shows how the result is stored in the data table. Figure 15.5 EAF Log to Base 10 Format in the Data Table After Execution Data 17 16 15 14...
Page 200: Fifo Load And Fifo Unload
Chapter 15 0.866025 for the sine function and and 0.500 for the cosine function. Figure 15.7 shows how it is stored in the data table. Figure 15.7 EAF Sine Function Format After Execution Data 17 16 15 14 10 7 Address Result Address...
Page 201 Chapter 15 Bits 14-17 of the result word are reserved for status bits: This Bit: Stores this: Important: The FIFO Load and FIFO Unload instructions must have the same File Address, Result Address and File Length. Data is loaded into and unloaded from the same addressed file.
Page 202 Chapter 15 Figure 15.8 FIFO Load and FIFO Unload Ladder Diagram Important: Read chapter 19 and become familiar with the concepts introduced in this chapter before attempting FIFO instructions. Figure 15.9 shows data (111) in the Input Word 060 ready to be loaded into the File.
Page 203 Chapter 15 FIFO Load Figure 15.9 First Data Is Ready to Be Loaded 15-10...
Page 204 Chapter 15 Figure 15.10 shows how the first data is stored in the data table before the FIFO Load is energized. Figure 15.10 First Data Stored in the Data Table 15-11...
Page 205 Chapter 15 Figure 15.11 shows a full file. Inspect word 050 (Figure 15.12), you will find that bit 15 is set (1) indicating the file is full. Bit 17 follows the condition of the rung. Bit 17 is set (1) if the FIFO Load rung is true. Bit 17 is reset (0) if the rung is false.
Page 206 Chapter 15 Figure 15.12 shows how a full file is stored in the data table. Figure 15.12 This Is a Full File Stored in the Data Table If you want to load zero as valid FIFO data, insert zeros in the Input Word. Do a SEARCH 53, enter the address of the input word, and set any one of the upper four bits on.
Page 207 Chapter 15 Figure 15.13 Zero as Valid FIFO Data 15-14...
Page 208 Chapter 15 Figure 15.14 shows how zero is stored in the file as valid FIFO data. Figure 15.14 Zero Stored in the Data Table 15-15...
Page 209 Chapter 15 If you want to keep zero as valid FIFO data, leave the bit set and it will progress through the file as any other word would. However, if you want to get rid of zero, you could reset the bit with ladder logic. The Result Word will not reflect the change until the next data is transferred into or out of the file.
Page 210 Chapter 15 Figure 15.16 First Data Has Been Unloaded 15-17...
Page 211 Chapter 15 Figure 15.17 shows how the first unloaded data is stored in the data table. Figure 15.17 Unloaded Data Stored in the Data Table 15-18...
Page 212 This chapter describes the EAF Process Control instructions, which are a feature of the Mini-PLC-2/17 processor only. (06) Averaging (07) Standard Deviation (27) Set Clock (10) Set Date (11) Set Leap Year and Day of the Week (12) Read Clock (15) Read Date (16)
Page 213: Eaf Process Control Instructions
Process Control Instructions The PID EAF instruction provides the following features: Selectable dependent or independent gain PID equations Manual to automatic mode with bumpless transfer Derivative term calculates from PV or error Process variable and setpoint scaled to engineering units Output alarms Output limiting with anti-reset windup Zero crossing dead band...
Page 214 Process Control Instructions This is accomplished by evaluating the PID equation whose output goes to a control device. An additional value may be added to the control output either as a bias to decrease offset when using proportional control, or as a feedforward control value.
Page 215 Process Control Instructions Independent Gains Using the independent gain equation you adjust the proportional, integral and derivative terms separately. KD[E * E(n * 1)] CO + K Bias KD[PV * PV(n * 1] CO + K Bias where: control output proportional gain constant (unitless) integral gain constant (1/sec) derivative gain constant (sec)
Page 216 Process Control Instructions The number of PID loops, loop update time, and type of input and output modules are important considerations for using the PID instruction. Number of PID loops The number of PID loops that a Mini PLC 2/17 processor can handle depends on the update time required by the loops.
Page 217 Process Control Instructions In both cases, PID data must be limited to a range of 0-4095. Set your analog input and output modules accordingly (by selection or by default in most analog modules). The PID Output (resultant address) is always formatted in 12-bit binary, with a range of 0-4095.
Page 218 Process Control Instructions Important:Do not set this bit when entering the PID instruction in Program mode. Since the PID instruction has not been executed yet, there is nothing to resume in Run mode. Set this bit only after the PID instruction has been executed in Run mode at least once.
Page 219 Process Control Instructions - Equation (Set by User) Independent Gain =0 Dependent Gain = 1 - Mode (Set by User) Auto = ) Manual = 1 - Control Action (Set by User) Direct (SP-PV) = 0 Reverse (PV-SP) = 1 - Output Limiting (Set by User) No = 0 Yes = 1...
Page 220 Process Control Instructions x10 (Set by User) Do not move decimal = 0 Move decimal to right = 1 /10 (Set by User) Do not move decimal = 0 Move decimal = 1 - Feedforward/Bias Sign (Set by User) Pos = 0 Neg = 1 - Maximum Scaling Sign (Set by User) Pos = 0...
Page 221 Process Control Instructions All range values are unitless unless noted otherwise. Word 03 Range Range 0000 9999 0000 9999 Word 04 Range Range 00.00 99.99 00.00 99.99 Word 05 Term K Term 1/TI Range Range Bit Set 00.00 99.99 0.000 9.999 Bit reset 0.000 9.999 Units...
Page 222 Process Control Instructions Word 10 Range Range 0000 9999 0000 9999 Units 0000 9999 Word 11 Range Range 0000 100% 0000 100% Units Units Percent Percent Word 12 Range Range 0000 100% 0000 100% Unites Units Percent Percent Word 13 Range Range 0000 100%...
Page 223 Process Control Instructions The following example programs show how to use the PID EAF. Figure 16.3 and the associated rung description give a detailed explanation of the basic sections of a PID program. We recommend that you study this example thoroughly before proceeding to the other example programs. The three programs that follow were programmed specifically for 1771-IF and 1771-OF modules.
Page 224 Process Control Instructions Rung 1 This is a timing rung that toggles the block transfer. The timing value (preset x time base) must equal the loop update time of the PID instruction. Rung 2 The Block Transfer Read instruction rung inputs the process variable (PV), tieback (TB) and feedforward/bias, if used.
Page 225 Process Control Instructions Figure 16.4 shows you how to enter and display an STI to execute a controlled PID function. The program that follows is programmed specifically for 1771-IE, -IF, -OF, -IX and -IY modules. For the 1771-IFE, -IL and -IR modules, add the module initialization rungs in the main program (see Figure 16.5).
Page 226 Process Control Instructions RUNG 1 0051 RUNG 2 BLOCK XFER READ DATA ADDR: 0030 MODULE ADDR: BLOCK LENGTH: FILE: 0200-0223 RUNG 3 0050 0204 RUNG 4 EXECUTE AUX FUNCTION FUNCTION NUMBER: DATA ADDR: 0400 RESULT ADDR: 0230 0050 0205 RUNG 5 EXECUTE AUX FUNCTION FUNCTION NUMBER:...
Page 227 Process Control Instructions 0050 0210 RUNG 10 EXECUTE AUX FUNCTION FUNCTION NUMBER: DATA ADDR: 1000 RESULT ADDR: 0240 0050 0211 RUNG 11 EXECUTE AUX FUNCTION FUNCTION NUMBER: DATA ADDR: 1100 RESULT ADDR: 0241 0050 0212 RUNG 12 EXECUTE AUX FUNCTION FUNCTION NUMBER: DATA ADDR: 1200...
Page 228 Process Control Instructions 0050 0214 RUNG 16 EXECUTE AUX FUNCTION FUNCTION NUMBER: DATA ADDR: 1400 RESULT ADDR: 0250 0050 0215 RUNG 17 EXECUTE AUX FUNCTION FUNCTION NUMBER: DATA ADDR: 1500 RESULT ADDR: 0251 0050 0216 RUNG 18 EXECUTE AUX FUNCTION FUNCTION NUMBER: DATA ADDR: 1600...
Page 229 Process Control Instructions 0050 0220 RUNG 22 EXECUTE AUX FUNCTION FUNCTION NUMBER: DATA ADDR: 2000 RESULT ADDR: 0260 0050 0221 RUNG 23 EXECUTE AUX FUNCTION FUNCTION NUMBER: DATA ADDR: 2100 RESULT ADDR: 0261 0050 0222 RUNG 24 EXECUTE AUX FUNCTION FUNCTION NUMBER: DATA ADDR: 2200...
Page 230 Process Control Instructions If you are using an 1771-IFE, -IL, -IR or -IXE module, place all module configuration rungs except rung 2 in the main program. Place rung 2 in the subroutine. Figure 16.5 shows what the modified STI block transfer looks like.
Page 231 Process Control Instructions Rungs An additional group of PID instructions would cause the 16 – 21 STI to exceed its allowed limit (33 ms for a 50 ms interrupt). This is the first four of a second group of eight PID instructions.
Page 232 Process Control Instructions This list identifies the function of the ladder diagram symbols. 110/00 Manual Push Button 110/01 Auto Push Button 110/02 Enter Push Button 320/04 Set-Output bit PID Set-Output value 115/00 Manual Override Output Value PID CO Value Figure 16.7 shows how you can cascade two loops by assigning the control output (CO) of one loop as the set point (SP) of the next loop.
Page 233 Process Control Instructions 0044 PR 150 AC 000 BLOCK XFER READ DATA ADDR: 0030 MODULE ADDR: BLOCK LENGTH: FILE: 0350-0351 0575 0350 EXECUTE AUX FUNCTION FUNCTION NUMBER: DATA ADDR: 0400 RESULT ADDR: 0500 0050 FILE TO FILE MOVE COUNTER ADDR: 0050 POSITION: FILE LENGTH:...
Page 234 Process Control Instructions De-scaling is necessary to force the PID input range to 0 to 4095 when using an input module that does not return this range. A thermocouple input module is a good example. It returns a scaled temperature range, typically -300 to +1200 Fahrenheit.
Page 235 Process Control Instructions Subscripts Units you are converting from Units you are converting to Since the converted range is always 0 to 4095, the equation simplifies to: * Smin + 4095 * Smin (Smax To simplify the actual programming, break the equation down into: 4095 + K (M * Smin...
Page 236 Process Control Instructions The following ladder logic solution to the de-scaling equation assumes that Smax and Smin are between 0-999. For values less than 0 or greater than 999, additional math instructions would have to be programmed. Rung 1 Subtraction of Smin1 from M1. In this case, the input is at maximum, 550 Rung 2 This is the EAF math multiplication instruction necessary to...
Page 237 Process Control Instructions Cascade (Word 01, Bit 05) Set/reset this bit for cascading two loops. When the bit is set, the loop is the secondary (fast) loop of the cascade. When the bit is reset, the loop is the primary (slow) loop of the cascade or not part of a cascade configuration.
Page 238 Process Control Instructions Derivative Gain Constant (Word 06) When using the Independent Gain Equation, this is the derivative gain (sec). When using the Dependent Gains equation, this is the derivative time constant T (min). Derivative Uses Error (Word 01, Bit 06) You can select whether the derivative term in either PID equation acts on changes in error or process variable.
Page 239 Process Control Instructions Feedforward or Bias (Word 07) This input is added to the calculated control output of the PID equation. It is used when a bias is needed or if feedforward control is desired. This value can be a storage constant or a calculated variable of process measurement.
Page 240 Process Control Instructions Input Format Bit (Word 01, Bit 07) Allows the Process Variable (PV) and Tieback (TB) to be input in Binary or BCD (series C or later). Reset (0) PV and TB are in Binary Set (1) PV and TB are in BCD Integral Gain (Word 05) When using the Independent Gain Equation, this value is the integral gain constant K...
Page 241 Process Control Instructions Maximum Control Output (Word 12) This limits the maximum value of the Control Output. Defined as 0-100% of the 0-4095 Control Output range. This value works in conjunction with the Output Limiting feature and the Maximum Output Alarm. Maximum Scaling Value (Word 08) The scaling value which corresponds to the maximum setpoint and process variable in engineering units (such as PSI or oF).
Page 242 Process Control Instructions Output Limiting (Word 01, Bit 03) Set/Reset this bit to enable/inhibit output limiting. Reset (0) Output limiting inhibited Set (1) Output limiting enabled Set the output limits as a percentage (0-100%) of control output. When the instruction detects that the output has reached either of these limits, the instruction sets an alarm bit in word 01 of the PID control block and prevents the output from exceeding either value.
Page 243 Process Control Instructions Important:This bit should not be set until a valid Control Output value is calculated and stored at the Result Address (i.e., until the PID instruction has been executed at least once in Run mode). Scaling Input scaling lets you specify the engineering units for the set point and Dead Band values and to display the process variable and error values in the same engineering units.
Page 244 Process Control Instructions Set Output will not override Output Limiting. The Control Output abides by the Output Limiting value. For example, if Output Limiting is enabled and the Minimum Output is 30% and the set output is set to 0% and enabled, the Control Output goes to 30%.
Page 245 Process Control Instructions These arithmetic functions have applications in various industries. You can use the average function for averaging thermocouple inputs or other process variables. You can use standard deviation and averaging for trend analysis and report generation. Bits 14-17 of the most significant word of the result word are reserved for status bits: not used done bit...
Page 246 Process Control Instructions The first result word in the averaging EAF occurs in the second word after the beginning of the result word address. The first 4 words of the standard deviation result are reserved for internal processor functions. Averaging The averaging instruction determines the arithmetic average of a group of three digit BCD values.
Page 247 Process Control Instructions THREE DIGIT AVERAGE: 0033 PR 003 AC 000 0034 PR 005 AC 000 0034 FILE TO WORD MOVE COUNTER ADDR: 0034 POSITION: FILE LENGTH: FILE A: 0201-0205 FILE A: 0036 EXECUTE AUX FUNCTION FUNCTION NUMBER: DATA ADDR: 0047 RESULT ADDR: 0040...
Page 248 Process Control Instructions Rung 3 This is an unconditional File-to-Word Move instruction containing the values you want to average. Addresses 201 through 205 are externally indexed by the counter 0034 and the position starting value must be zero (see rung 2). Rung 4 This is the averaging EAF rung.
Page 249 Process Control Instructions Rung 6 This rung displays the result with a decimal point implied but not shown between the two words. Word 041 contains the 3 most significant digits and word (042) contains the 3 least significant digits. The values of these words are not valid until the done bit (04115) is ON.
Page 250 Process Control Instructions THREE DIGIT STANDARD DEVIATION: 0033 PR 003 AC 000 0034 PR 005 AC 000 0034 FILE TO WORD MOVE COUNTER ADDR: 0034 POSITION: FILE LENGTH: FILE A: 0201-0205 FILE A: 0036 EXECUTE AUX FUNCTION FUNCTION NUMBER: Changing Data DATA ADDR: 0047 Always 1...
Page 251 Process Control Instructions Rung 3 This is an unconditional File-to-Word Move instruction containing the values for which you want to calculate the standard deviation. Addresses 201 through 205 are externally indexed by the counter 0034. The starting position must be one (see rung 2). Rung 4 This is the EAF rung.
Page 252 Process Control Instructions Rung 5 This is the Data Address of the EAF instruction. It points the next value added to the calculation (present position). This is an optional display rung. Rung 6 This rung displays the result of the EAF instruction. Words 040 through 043 are used for internal calculations and must not be manipulated.
Page 253 Process Control Instructions Averaging The averaging instruction determines the arithmetic average of a group of six digit BCD values. The maximum number of values you can average is 999 or is limited by the data table area available. The Averaging instruction uses the formula: where: six digit signed BCD values...
Page 254 Process Control Instructions Rung 1 The EAF rung calculates an average upon a false-to-true transition of bit 15000. This bit must remain energized until the done bit (bit 16115 in this example) is energized. Word 0030 the number of samples you want to average. Word 0031 the number of samples to sum per scan (from 1 to the total number of samples).
Page 255 Process Control Instructions Standard Deviation The Standard Deviation instruction determines the standard deviation of a group of six digit values. The maximum number of values the instruction can handle is 999 or is limited by the data table area available. Standard deviation instruction uses the formula: where: = the group of values whose standard deviation you want to...
Page 256 Process Control Instructions If you want to calculate the standard deviation of a new set of values, you must: Reset to zero the data in the data address word (0040 in this example). Reset to zero the data in the result words (0160-0173) in this example).
Page 257 Process Control Instructions EXECUTE AUX FUNCTION FUNCTION NUMBER: DATA ADDR: RESULT ADDR: EXECUTE AUX FUNCTION FUNCTION NUMBER: DATA ADDR: RESULT ADDR: Keystrokes Enter an EAF (like Figure 16.14) by performing the following steps. Enter the Examine On and Get instructions. Press [Shift] [EAF].
Page 258 Process Control Instructions EXECUTE AUX FUNCTION FUNCTION NUMBER: DATA ADDR: RESULT ADDR: EXECUTE AUX FUNCTION FUNCTION NUMBER: DATA ADDR: RESULT ADDR: Enter the time and set the condition bit (01100) true. Then, start the clock by resetting the condition bit. Dates are entered as numbers.
Page 259 Process Control Instructions Leap year is displayed as a number representing the number of years since the last leap year. For example: –[GET]–[GET]– In the first Get: 000 represents leap year 001 represents the first year since leap year 002 represents the second year since leap year 003 represents the third year since leap year In the second Get, the day of the week is displayed as a number from 1-7.
Page 260: Jump
Chapter Jump Instructions and Subroutine Programming This chapter describes the instructions you can use to selectively jump over Chapter Objectives portions of a program. The instructions are: Jump Jump to Subroutine Label Return This chapter describes how jump instructions and subroutine programming direct the path of the program scan through the main program and the subroutine area.
Page 261 Chapter 17 Jump Instructions and Subroutine Prorgramming Jump to Subroutine The Jump to Subroutine instruction is an output instruction. It has an octal identification number from 00-07. When its rung is true, it instructs the processor to jump from the main program to the label instruction having the same number in the subroutine area.
Page 262: Entering Jump Instructions
Chapter 17 Jump Instructions and Subroutine Programming Return The Return instruction is an output instruction. It is used only in the subroutine area to terminate a subroutine or selectable timed interrupt and return the processor to the main program or, in the case of nested subroutines, return program execution to the preceding subroutine.
Page 263 Chapter 17 Jump Instructions and Subroutine Prorgramming Figure 17.1 Subroutine Area Octal Total Word Decimal Address Words Timer Counter Preset Values (PR) (or Bit Word Storage) Data Table Varies Main Program Subroutine Area Varies Varies User Program Subroutines Varies Varies Message Storage Area (if used) Message...
Page 264 Chapter 17 Jump Instructions and Subroutine Programming You can program a maximum of 8 subroutines in the subroutine area. Each subroutine begins with a Label instruction and ends with a return instruction. The Return should be an unconditional rung. The subroutine area serves as the end of the main program and defines the beginning of the subroutine area (Figure 17.2).
Page 265 Chapter 17 Jump Instructions and Subroutine Prorgramming The boundary marker subroutine area appears. A Subroutine Area instruction can only be programmed after the last instruction in the main program. The Subroutine Area instruction cannot be inserted between rungs in the main program. It requires 1 word of memory, it can be programmed only once, and it cannot be removed except by clearing the memory.
Page 266 This chapter describes 3 types of block transfer: read write bi-directional Block transfer is a combination of an instruction and support rungs used to transfer as many as 64 16-bit words of data in one scan from I/O modules to/from the data table. This transfer method is used by intelligent I/O modules such as the analog, PID, servo positioning, stepper positioning, ASCII, thermocouple, or encoder/counter modules.
Page 267 The block transfer read or write operation (Figure 18.2) is initiated in the program scan and completed in the I/O scan as follows: Program scan – When the rung goes true, the instruction is enabled. The number of words to be transferred and the read or write bit that controls the direction of transfer are set by a bit pattern in the control byte in the output image table.
Page 268 The module address is stored in the timer/counter accumulated area in the same manner as an accumulated value of a timer. The word address at which the module address is stored is called the data address of the instruction. Once the module address is found, the processor locates the address of the file to which (or from which) the data is transferred.
Page 269 The format of a block transfer read and a block transfer write instruction with default values is shown in Figure 18.3. Here is an explanation of each value: 18-4...
Page 270 The data address stores the module address of the block transfer module. The data address must be assigned the first available address in the timer/counter accumulated area of the data table. This depends on the number of I/O racks being used (Table 18.B). When more than 1 block transfer module is used, consecutive data addresses must be assigned ahead of addresses for timer and counter instructions.
Page 271 The module address is stored in BCD with the first digit representing the rack number, the second digit the I/O group number and the third digit the slot number. When block transfer is performed, the processor searches the timer/counter accumulated area of the data table for a match of the module address.
Page 272 Unequal Block Lengths Consult the documentation for the block transfer module for programming guidelines when setting the block lengths to unequal values. ATTENTION: When the block lengths of bi-directional block transfer instructions are set to unequal values, the rung containing the alternate instruction must not be enabled until the done bit of the first transfer is set.
Page 273: Block Transfer Read
Misuse and/or inadvertent changes of instruction data can cause run-time errors when: The module address is given a non-existent I/O rack number. A read transfer overruns the file into a processor work area or into user program by an inadvertent change of the block length code. Block transfer reads data from an I/O module into the processor’s input image table in one I/O scan.
Page 274 10225-I 18-9...
Page 275 Keystrokes Enter a block transfer read (like this example) by performing the following steps. BLOCK Block Transfer 0 appears in the lower left corner of the screen, above the XFER processor’s current programming mode. Note that the words BLOCK TRANSFER READ are flashing. Insert the following values.
Page 276: Block Transfer Write
A block transfer writes data from the processor’s output image table to an I/O module in one scan. Programmed as an output instruction. Block length depends on the type of module you are using. Request for transfer is made in the program scan. I/O scan is interrupted for the transfer.
Page 277: Bi Directional Block Transfer
You can enter data directly into the block to be transferred. Position the cursor over the block transfer instruction and press [Display] [1]. See chapter 9. Bi-directional block transfer is the sequential performance of both operations. The order of operation is generally determined by the module. Two data addresses must be used.
Page 278 18-13...
Page 279 Keystrokes Enter a bi-directional block transfer (like this example) by performing the following steps. BLOCK Block Transfer 0 appears in the lower left corner of the screen, above the XFER processor’s current programming mode. The Block Transfer enable bit is 01007; the done bit is 11007. Note that the words BLOCK TRANSFER READ are flashing.
Page 280 BLOCK Block Transfer 0 appears in the lower left corner of the screen, above the XFER processor’s current programming mode. Note that the words BLOCK TRANSFER WRITE are flashing. Insert the following values. The cursor will move automatically through the block transfer read instruction. The values are: The read instruction should look like this: 18-15...
Page 281 Under certain conditions, you might want to transfer part of a file rather than the entire file. For example, a processor could be programmed to read the first two or three channels of an analog input module periodically but read all channels less frequently. To do this, use 2 or more Block Transfer Read instructions: one for each desired transfer length.
Page 282 Buffer block transfer data so you can validate it before you use it. Data that is read from the block transfer module and transferred to data table locations must be buffered. Data that is written to the module need not be buffered because block transfer modules perform this function internally.
Page 283 One technique of buffering data is to store the transferred data in a temporary buffer file. If the data in the buffer is valid, it is immediately transferred to another file in the data table where it can be used. If invalid, it is not transferred but written over in the next transfer.
Page 284 When rung 1 is true, bit 014/07 (the block transfer enable bit) is turned on and block transfer is requested. Block transfer is enabled during the program scan. The transfer is performed during an interruption of the next I/O scan. Data from the 18-19...
Page 285: Two Get Method
module is loaded into words 050-052. When block transfer is complete, done bit 114/07 is set in the input image table byte. This indicates the block transfer was successfully performed. The processor then continues with the I/O scan and program scan. In rung 2, bit 114/07 is still on and a diagnostic bit is examined to ensure the data read from the module is valid.
Page 286 The first Get instruction (Figure 18.9) identifies the rack location of the block transfer module. The location must be stored in the first available address in the timer/counter accumulated value area of the data table, starting with 030. When more than one block transfer module is used, consecutive addresses must be assigned in this area.
Page 287 The Output Energize instruction (Figure 18.9) initiates the block transfer. It is given an address that indicates the module location and the type of block transfer operation. The first digit of the address is always 0 for output byte, even though an input or output block transfer module can be used.
Page 288 The second Get instruction of both rungs will be assigned addresses 100 words above the first Get instructions. As “data,” they will store the starting address for block transfer data such as 050 and 060. The Output Energize instruction is addressed for a write operation in rung 1 and a read operation in rung 2.
Page 289 Of these support rungs, buffering data must be programmed to ensure the block transfer data is valid. Other techniques, such as an Immediate Output instruction or a scan monitor, can also be programmed. The IOT instruction requests a block transfer more than once per scan by assigning it the output word address corresponding to the module’s location.
Page 290 18-25...
Page 291 Each block transfer module has a default value that specifies the maximum number of words that can be transferred. Either the default value or some lesser value can be selected. For bi-directional block transfers, use the default value of the module. The default value varies from one kind of module to another, consult the appropriate module documentation for specifics.
Page 292 For example, 5 words can be transferred by setting bits 00 and 02 high unconditionally in output image table word 014. The binary equivalent of 5, as stated in the look-up table, is 000101. 18-27...
Page 293: Data Transfer File Instructions
Chapter Data Transfer File Instructions Chapter Objectives This chapter describes the data transfer file instructions: File-to-File Move Word-to-File Move File-to-Word Move Figure 19.1 Types of File Instructions Key Sequence 1770 T3 Display Instruction Notes FILE Output Instruction FILE-TO-FILE MOVE COUNTER ADDR: Modes Complete, Distributed, and Incremental POSITION: FILE LENGTH:...
Page 294: File To File Move Instruction
Chapter 19 Data Transfer File Instruction The word address defines: the location in the data table to which or from which the data will be moved. this word address can be manipulated by ladder diagram logic File to File Move Instruction This instruction copies a source file and transfers it to the destination file address.
Page 295 Chapter 19 Data Transfer File Instuction Figure 19.2 Types of Counter Indexing PR 007 AC 000 WORD TO FILE MOVE COUNTER ADDR: POSITION: FILE LENGTH: Externally indexed file instruction WORD ADDR: FILE R: 500-506 PR 007 AC 000 FILE TO WORD MOVE COUNTER ADDR: POSITION: FILE LENGTH:...
Page 296 Chapter 19 Data Transfer File Instruction When the rung condition goes false, both the done and enable bits are reset and the counter resets to position 001. If the rung was enabled for only one scan, the done bit would come on during that scan and remain set for one additional scan.
Page 297 Chapter 19 Data Transfer File Instuction Table 19.A Modes of Operation Mode of Operation R = Rate Per Scan Number of Words Operated Upon Complete R = File Length Entire file per scan Distributed complete 0<R< File Length R words per scan Incremental R = 0 One word per rung...
Page 298 Chapter 19 Data Transfer File Instruction Keystrokes Enter a File-to-File Move instruction by performing the following steps. BLOCK Block Transfer 0 appears in the lower left corner of the screen, above the XFER processor’s current programming mode. The word SEARCH appears in the lower left corner of the Industrial SEARCH Terminal Screen.
Page 299 Chapter 19 Data Transfer File Instuction FILE TO FILE MOVE COUNTER ADDR: POSITION: FILE LENGTH: FILE A: 110- 110 FILE R: 110- 110 RATE PER SCAN: Now the cursor is on the first digit of the file length. FILE TO FILE MOVE COUNTER ADDR: POSITION: FILE LENGTH:...
Page 300 Chapter 19 Data Transfer File Instruction FILE TO FILE MOVE COUNTER ADDR: POSITION: FILE LENGTH: FILE A: 400- 406 FILE R: 500- 506 RATE PER SCAN: You can now proceed to add data to your file. Position your cursor on the words file to file move.
Page 301 Chapter 19 Data Transfer File Instuction Important: If you made a mistake, you can correct it by moving the cursor left or right to the incorrect number and then pressing the correct number key. HEXDECIMAL DATA MONITOR FILE TO FILE MOVE POSITION: 001 FILE LENGTH: COUNTER ADDR:...
Page 302 Chapter 19 Data Transfer File Instruction Proceed by loading each position of file A with following data: Position 003 0879 Position 004 0162 Position 005 1982 Position 006 9715 Position 007 5761 Important: You do not have to enter data in each position. You can skip position numbers.
Page 303 Chapter 19 Data Transfer File Instuction Editing in a Completed Rung Edit a File-to-File Move instruction by performing the following steps in the hexadecimal data monitor display. CANCEL The FILE TO FILE MOVE instruction rung is displayed. COMMAND The word SEARCH appears in the lower left corner of the industrial SEARCH terminal screen.
Page 304 Chapter 19 Data Transfer File Instruction We will change the data in the command buffer from 0162 to 0281. HEXDECIMAL DATA MONITOR FILE TO FILE MOVE POSITION: 001 FILE LENGTH: COUNTER ADDR: FILE R: FILE A: 500 506 400 406 POSITION FILE A DATA FILE R DATA...
Page 305: Word To File Move Instruction
Chapter 19 Data Transfer File Instuction Word to File Move Instruction This instruction duplicates and transfers the data of a word from the data table to a specified word within your destination file. Here are some characteristics of a Word-to-File Move: Programmed as an output instruction;...
Page 306: File To Word Move Instruction
Chapter 19 Data Transfer File Instruction Keystrokes Enter a Word-File Move instruction by performing the following steps. First, enter a conditioned rung with a CTU instruction for 030. FILE PR 001 AC 001 FILE TO FILE MOVE COUNTER ADDR: POSITION: FILE LENGTH: WORD ADDR: FILE R:...
Page 307 Chapter 19 Data Transfer File Instuction When the rung becomes: True The data of a word is transferred from File A to a designated (output) word address. False No action is taken. ATTENTION: The counter address for the Word-to-File Move and the File-to-Word Move instructions should be used only for the intended instruction and the corresponding instructions which manipulate the accumulated value.
Page 308: Data Monitor Display
Chapter 19 Data Transfer File Instruction Here is an explanation of each value: This Value: Stores This: Counter address Address of the instruction's file position in the accumulated value area of the data table. Position Current word being operated upon (accumulated value of the counter).
Page 309 Chapter 19 Data Transfer File Instuction Figure 19.3 Data Monitor Displays BINARY DATA MONITOR FILE TO FILE MOVE Counter Addr: 200 File Length: Header POSITION: 001 File A: 400 406 File R: 500 506 POSITION FILE A DATA FILE R DATA 00010010 01010111 00010010...
Page 310: Adjusting The Data Table Size
Chapter 19 Data Transfer File Instruction Table 19.B Data Monitor Functions Display [DISPLAY] [0] Displays the binary data monitor Print [DISPLAY] [0] Prints the first 20 lines of binary data monitor. [RECORD] Display [DISPLAY] [1] Displays the hexadecimal data monitor Print [DISPLAY] [1] Prints the first 20 lines of hexadecimal data monitor.
Page 311: Bit Shift Registers
Chapter Bit Shift Registers Chapter Objectives This chapter describes bit shift instructions. The bit shift instructions are: The Bit Shift Left or Right instructions move one bit to the left or right upon the false-true transition of a rung. They are output instructions that construct and manipulate a synchronous bit shift register from 1-999 bits in length.
Page 312 Chapter 20 Bit Shift Registers Figure 20.1 How the Processor Shifts a Bit to the Left Word Address Input BIt A Bit Address 17 16 15 14 13 12 11 10 07 06 05 04 03 02 01 00 16 15 14 13 12 11 10 9 Bit one of Bit Shift Register Output Bit B...
Page 313 Chapter 20 Bit Shift Registers If the bit shift register of Figure 20.1 is 123 bits long, shifting ends at bit 12 of word 407. In this case, bits to the left of bit 12 in word 407 are not used for the bit shift register. However, they cannot be used for any other purpose.
Page 314 Chapter 20 Bit Shift Registers A display represented by Figure 20.2 shows the format of a Bit Shift Left. Figure 20.2 Bit Shift Left Format BIT SHIFT LEFT COUNTER ADDR: NUMBER OF BITS: FILE: 110-110 INPUT: 010/00 OUTPUT: 010/00 Numbers shown are default values. The number of default address digits initially displayed, 3, 4, or 5 will depend on the size of the data table.
Page 315: Bit Shift Right
Chapter 20 Bit Shift Registers Bit Shift Right The Bit Shift Right output instruction constructs a synchronous bit shift register from 1 to 999 bits in length. Figure 20.4 shows a 128 bit register starting and ending at words 400 and 407. Figure 20.4 How the Processor Shifts a Bit to the Right Word Address...
Page 316 Chapter 20 Bit Shift Registers Upon false-to-true rung transition, input bit B from a particular input word will be inserted into the last bit of the bit shift register. In Figure 20.4, bit 128 moves right and displaces bit 127; bit 127 displaces bit 126. Each bit displaces the one on its right until the first bit in the word, 113, is reached.
Page 317 Chapter 20 Bit Shift Registers To program a Bit Shift Right instruction: The prompt SHIFT REGISTER 12 appears in the lower left hand corner of the screen. BIT SHIFT LEFT COUNTER ADDR: NUMBER OF BITS: FILE: 110-110 INPUT: 010/00 OUTPUT: 010/00 The format that appears and the technique for insertion of numbers, will be identical to that for Bit Shift Left except that the title will read Bit...
Page 318 Chapter 20 Bit Shift Registers Here are some characteristics of an Examine Off Bit Shift instruction: Program as an input instruction Key sequence [Shift] [Reg] [1] [8] Requires 3 words of your program Programming an Examine Off Bit Shift Instruction To program an Examine Off Bit Shift: The prompt SHIFT REGISTER 12 appears in the lower left hand corner of the screen.
Page 319: Examine On Bit Shift
Chapter 20 Bit Shift Registers After you have entered the following conditions: The file starts at word 400 Bit number 67 is for an off (0) condition The instruction should look like Figure 20.7. Figure 20.7 Examine Off Bit Shift Example Rung EXAMINE OFF SHIFT BIT FILE:...
Page 320 Chapter 20 Bit Shift Registers Programming an Examine On Bit Shift Instruction To program an Examine On Bit Shift Instruction: The prompt SHIFT REGISTER 12 appears in the lower left hand corner of the screen. EXAMINE ON SHIFT BIT FILE: BIT NO.
Page 321 Chapter 20 Bit Shift Registers The instruction should look like Figure 20.9: Figure 20.9 Examine On Bit Shift Example Rung EXAMINE ON SHIFT BIT FILE: BIT NO. Set Bit Shift The Set Bit Shift output instruction sets a specified bit in a bit shift register. You specify the bit number of the bit to be set and the starting address of the file.
Page 322: Set Bit Shift
Chapter 20 Bit Shift Registers A display represented by Figure 20.10 shows the format of a Set Bit Shift. Figure 20.10 Set Bit Shift Format SET SHIFT BIT FILE: BIT NO. Numbers shown are default values. The number of default address digits initially displayed, 3, 4, or 5 will depend on the size of the data table.
Page 323: Reset Bit Shift
Chapter 20 Bit Shift Registers Reset Bit Shift The Reset Shift Bit output instruction turns off a specified bit in a bit shift register. You specify the bit number of the bit to be turned off and the starting address of the file. The instruction executes upon a true rung condition.
Page 324 Chapter 20 Bit Shift Registers A display represented by Figure 20.12 shows the format of a Reset Bit Shift. Figure 20.12 Reset Bit Shift Format RESET SHIFT BIT FILE: BIT NO. Numbers shown are default values. The number of default address digits initially displayed, 3, 4, or 5 will depend on the size of the data table.
Page 325: Sequencers
Chapter Sequencers Chapter Objectives This describes the three types of sequence instructions: sequencer input sequencer output sequencer load These instructions either transfer information from the data table to output word addresses, compare I/O word information with information stored in tables, or transfer I/O word information into the data table. Comparison with File Sequencer instructions are similar to file instructions but have some Instructions...
Page 326 Chapter 21 Sequencers Figure 21.2 Sequencer Table Format in the Data Table Data Table Step 001 00 11 01 01 11 00 01 01 01 11 01 00 00 01 11 01 Word #1 00 01 01 01 10 10 00 00 00 01 11 01 11 00 10 10 Step 001...
Page 327: Programming Limitations
Chapter 21 Sequencer Figure 21.3 Masking Transfer Data Sequencer Word (Current Step) Mask Word Output Word prior to Sequencer Operations Output word result after Sequencer Operations 10393-I Other instructions can change a mask in the user program. If a changing mask is required for different steps in the sequencer operation, a Get/Put or file move can be used.
Page 328 Chapter 21 Sequencers Figure 21.4 Sequencer Instructions Key Sequence 1770 T3 Display Instruction Notes SEQ 0 Output instruction SEQUENCER OUTPUT Increments, then transfers data. COUNTER ADDR: Same data transferred each scan that the rung is true. CURRENT STEP: Counter is indexed by the instruction. SEQ LENGTH: Unused output bits can be masked.
Page 329: Sequencer Input
Chapter 21 Sequencer Sequencer Input The Sequencer Input instruction compares all 16 bits of input data to data stored in its file (data table) for equality. Here are some characteristics of the sequencer input instruction. You can compare up to 64 bits. This instruction is programmed as an input instruction (can be programmed in the same rung as a sequencer output instruction).
Page 330 Chapter 21 Sequencers The cursor moves to the digit 4 and DATA TABLE SIZE changes to 512. This gives you a 512 word data table. After you adjust the data table press CANCEL COMMAND. You are now ready to insert this program. SEQUENCER INPUT SEQUENCER OUTPUT COUNTER ADDR:...
Page 331 Chapter 21 Sequencer The instruction should look like this: SEQUENCER INPUT COUNTER ADDR: CURRENT STEP: SEQ LENGTH: WORDS PER STEP: FILE: 400- MASK: 070- INPUT WORDS To continue, enter your data using the binary data monitor mode. You will get your data from the worksheet in Figure 21.5. A filled in block means that a 1 should be inserted in the corresponding bit position.
Page 332 Chapter 21 Sequencers Figure 21.5 Completed Sequencer Input Worksheet ALLEN BRADLEY Programmable Controller PAGE Sequencer Table Bit Assignments PROJECT NAME PROCESSOR Bottle Filling Applications Mini–PLC–2/16 DESIGNER DATA TABLE ADDR Engineer Input SEQUENCER COUNTER ADDR: FILE SEQ LENGTH: Timer 200 WORD ADDR: MASK ADDR: WORD #1 WORD #2...
Page 333 Chapter 21 Sequencer Start by positioning your cursor on the words SEQUENCER INPUT. Use the arrow keys to move the cursor. The word display appears in the lower left hand corner of the screen. DISPLAY BINARY DATA MONITOR SEQUENCER OUTPUT STEP: SEQUENCER LENGTH: COUNTER ADDR:...
Page 334 Chapter 21 Sequencers BINARY DATA MONITOR SEQUENCER OUTPUT STEP: SEQUENCER LENGTH: COUNTER ADDR: FILE: 400- 413 OUTPUT ADDR: DATA: 00000000 00000000 00000000 00000000 INSERT MASK ADDR: DATA: 00000000 00000000 00000000 00000000 STEP WORD 1 WORD 2 00000010 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000...
Page 335 Chapter 21 Sequencer BINARY DATA MONITOR SEQUENCER OUTPUT STEP: SEQUENCER LENGTH: COUNTER ADDR: FILE: 600- 613 OUTPUT ADDR: DATA: 00000000 00000000 00000000 00000000 MASK ADDR: DATA: INSERT 00000000 00000000 00000000 00000000 STEP WORD 1 WORD 2 00000010 00000000 00000000 00000000 00000010 00000001 00000000 00000000 00000000 00000000...
Page 336 Chapter 21 Sequencers BINARY DATA MONITOR SEQUENCER OUTPUT STEP: SEQUENCER LENGTH: COUNTER ADDR: FILE: 400- 413 OUTPUT ADDR: DATA: 00000000 00000000 00000000 00000000 MASK ADDR: DATA: 00000000 00000000 00000000 00000000 STEP WORD 1 WORD 2 00000010 00000000 00000000 00000000 00000010 00000001 00000000 00000000 00000010 00010001 00000000 00000000...
Page 337: Sequencer Output
Chapter 21 Sequencer BINARY DATA MONITOR SEQUENCER OUTPUT STEP: SEQUENCER LENGTH: COUNTER ADDR: FILE: 400- 413 OUTPUT ADDR: SHIFT DATA: 00000000 00000000 00000000 00000000 MASK ADDR: DATA: 00000010 01010001 00000000 00000000 STEP WORD 1 WORD 2 00000010 00000000 00000000 00000000 00000010 00000001 00000000 00000000 00000010 00010001...
Page 338 Chapter 21 Sequencers ATTENTION: The counter address for the Sequencer Output instruction should be reserved for that instruction. Do not manipulate the counter accumulated or preset values. Inadvertent changes to these values could result in hazardous machine operation or a RUN TIME ERROR. Damage to equipment and/or personal injury could result.
Page 339 Chapter 21 Sequencer Your sequencer output instruction should look like this: SEQUENCER INPUT SEQUENCER INPUT COUNTER ADDR: COUNTER ADDR: CURRENT STEP: CURRENT STEP: SEQ LENGTH: SEQ LENGTH: WORDS PER STEP: WORDS PER STEP: FILE: FILE: 400- 600- MASK: MASK: 070- 075- INPUT WORDS INPUT WORDS...
Page 340 Chapter 21 Sequencers Figure 21.6 Completed Sequencer Output Worksheet ALLEN BRADLEY Programmable Controller PAGE Sequencer Table Bit Assignments PROJECT NAME Bottle Filling Applications PROCESSOR Mini–PLC–2/16 DESIGNER DATA TABLE ADDR Engineer OUTPUT SEQUENCER COUNTER ADDR: FILE SEQ LENGTH: WORD ADDR: MASK ADDR: WORD #1 WORD #2 WORD #3...
Page 341 Chapter 21 Sequencer Start by positioning your cursor on the words SEQUENCER OUTPUT. Use the arrow keys to move the cursor. The word DISPLAY appears in the lower left hand corner of the screen. DISPLAY BINARY DATA MONITOR SEQUENCER OUTPUT STEP: SEQUENCER LENGTH: COUNTER ADDR:...
Page 342 Chapter 21 Sequencers BINARY DATA MONITOR SEQUENCER OUTPUT STEP: SEQUENCER LENGTH: COUNTER ADDR: FILE: 600- 613 OUTPUT ADDR: DATA: 00000000 00000000 00000000 00000000 MASK ADDR: INSERT DATA: 00000000 00000000 00000000 00000000 STEP WORD 1 WORD 2 00000000 00001010 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000...
Page 343 Chapter 21 Sequencer Cursor down one line. The cursor is on the last digit of DATA of the third word in the command buffer. The digits in step 3 for word 3 are intensified. Continue adding your data: 003: 00001000 00100010 004: 00100000 00100010 005: 00000000 00100010 006: 00000010 00001010...
Page 344: Sequencer Load
Chapter 21 Sequencers BINARY DATA MONITOR SEQUENCER OUTPUT STEP: SEQUENCER LENGTH: COUNTER ADDR: FILE: 600- 613 OUTPUT ADDR: DATA: 00000000 00000000 00000000 00000000 MASK ADDR: DATA: 00101010 10101010 00000000 00000000 INSERT STEP WORD 1 WORD 2 00000000 00001010 00000000 00000000 00000000 00001010 00000000 00000000 00001000 01000001...
Page 345 Chapter 21 Sequencer ATTENTION: The counter address of the sequencer load instruction should be reserved for that instruction. Do not manipulate the counter accumulated or preset word. Changes to these values could result in unexpected machine operation with damage to equipment and injury to personnel. You are now ready to program your sequencer load instruction.
Page 346 Chapter 21 Sequencers Figure 21.7 Completed Sequencer Load Worksheet ALLEN BRADLEY Programmable Controller Sequencer Table Bit Assignments PAGE PROJECT NAME PROCESSOR Bottle Filling Applications Mini–PLC-2/16 DESIGNER DATA TABLE ADDR Engineer Load SEQUENCER COUNTER ADDR: FILE SEQ LENGTH: WORD ADDR: MASK ADDR: WORD #1 WORD #2 WORD #3...
Page 347 Chapter 21 Sequencer Load your data from Figure 21.6 exactly as you did in the Sequence Input and Output instructions. CANCEL To display your rung. COMMAND Your Sequencer Load instruction should look like this. BINARY DATA MONITOR SEQUENCER OUTPUT STEP: SEQUENCER LENGTH: COUNTER ADDR: FILE:...
Page 348: Selectable Timed Interrupt
Chapter Selectable Timed Interrupt Chapter Objectives This chapter describes a method to execute subroutines at timed intervals. This method is called selectable timed interrupt (STI). Introduction A selectable timed interrupt is a special subroutine that can be programmed into the subroutine area and can be executed at timed intervals. General programming facts are: The first instruction in the first rung of the subroutine area must be a Get instruction.
Page 349 Chapter 22 Selectable Timed Interrupt Figure 22.1 Sample Program Rungs Sample Program RUNG 1 PR 100 AC 000 RUNG 2 RUNG 3 PR 999 AC 000 User Program RUNG 4 PR 100 AC 000 RUNG 5 PR 999 AC 000 RUNG 6 Subroutine Area RUNG 7...
Page 350: Selectable Timed Interrupt
Chapter 22 Selectable Timed Interrupt The processor scans the user program (rungs 1-6) until it reaches the subroutine area. The processor then identifies the subroutine area as having an STI if: The STI subroutine begins in the first rung of the subroutine area The first instruction of the STI rung is a Get instruction ATTENTION: The Get instruction must be used solely for the purpose of designating the time period of the STI.
Page 351: Operational Overview
Chapter 22 Selectable Timed Interrupt Operational Overview Service time (Figure 22.2b) is factory set at approximately 2/3 of the timed interrupt period. Your subroutine execution time plus program transition time (Figure 22.2c) should not exceed the maximum allowable service time (Figure 22.2b). When the program transition time plus subroutine execution time does not exceed service time, there is sufficient time for the processor to scan the subroutine.
Page 352: Report Generation
Chapter Report Generation Chapter Objectives This chapter describes how to generate messages containing: ASCII characters graphic characters variable information You can use the report generation function of the 1770-T3 industrial terminal to generate messages that contain ASCII and graphic characters, and variable data table information.
Page 353: Report Generation Commands
Chapter 23 Report Generation Commands Use the report generation commands (Table 23.A) to enter control words and to store, print, report, and delete messages and to display an index of existing messages. Table 23.A Report Generation Commands Command Key Sequence Description Message Control Word File - MS, 0 Bits from eight consecutive user-selected words control the 64 additional...
Page 354 Chapter 23 You must be in report generation. These lines appear in the lower left hand corner of the screen. RECORD CHANNEL C: 9600 BAUD; INPUT = ON; HANDSHAKE = ON RECORD The previous messages disappear. The following messages appear in the upper left hand corner of the screen.
Page 355 Chapter 23 Table 23.B Example Message Control Word and Message Number Relationship Control Message Numbers Words Important Message Store - MS Accessible only in the Program or Remote Program mode, use this command to enter messages in memory. Access the message store command by: You must be in report generation.
Page 356 Chapter 23 Table 23.C Address Delimiters Delimiter Format Explanation Message Report Format The desired delimiter is entered before and after the bit, byte, or word address. The delimiter tells the industrial terminal to print the current status or value of the bit, byte, or word at the address. You can enter as many consecutive addresses as needed by sharing the same delimiter, such as *XXX*XXX*XXX*.
Page 357 Chapter 23 The words END OF MESSAGE STORE appear on the screen. Returns the display to the ladder diagram. Message Print - MP Accessible in any mode, the message print command is to print the contents of a message to verify it. You can print a message with the following keystrokes: You must be in report generation.
Page 358 Chapter 23 Message Report - MR Accessible in any mode, the message report command prints a message with the current data table value or bit status that corresponds to an address between the delimiters. For example, the message report command gives the following: bit 013/05 is off and counter 030 accumulated value is 000.
Page 359: Entering A Message
Chapter 23 Message Index - MI Accessible in any mode, the message index command prints an MI list of the message numbers used and the amount of memory (in words) used for each message. In addition, the number of unused memory words available is listed.
Page 360 Chapter 23 Figure 23.1 Alphanumeric and Alphanumeric/Graphic Keytop Overlays Alphanumeric Keytop Overlay (1770-KAA) 1982 ALLEN-BRADLEY Alphanumeric/Graphic Keytop Overlay (1770-KAB) 1982 ALLEN-BRADLEY 10160-I 23-9...
Page 361 Chapter 23 If the processor is in the Program mode, you can enter a message by executing the following steps: These lines appear in the lower left hand corner of the screen. RECORD CHANNEL C: 9600 BAUD; INPUT = ON; HANDSHAKE = ON RECORD The previous messages disappear.
Page 362 Chapter 23 Manually Initiated Report Generation You can display messages manually on the T3 terminal or the peripheral device by executing a key sequence each time a message is desired. You can display a message manually by executing the following steps: These lines appear in the lower left hand corner of the screen.
Page 363 Chapter 23 The word SEARCH appears in the lower left hand corner of the screen. The words AUTOMATIC REPORT GENERATION appear across the top of the screen and appear in the lower left hand corner of the screen. The word SEARCH changes to SEARCH 40. CHANNEL C: 9600 BAUD;...
Page 364 Chapter 23 Important: Automatic report generation can also be activated automatically upon initialization of the industrial terminal if you move parity switches 4 and 5 to the up position on the industrial terminal’s main logic board (Figure 23.2). To find these switches, turn power off and remove the keyboard.
Page 365 Chapter 23 You can display any of the six messages when the corresponding bit 10-15 of word 027 is latched on. An example program to display one of the messages 1-6 is shown in Figure 23.4. Three programming rungs are required to display each stored message.
Page 366 Chapter 23 You define the control word addresses that correspond to the control word number. The last three digits of the message request bit address are coded to represent a particular message. For example, message number 312 indicates the 12th bit of the 3rd control word. The message request bit address (follow the arrows in the figure above) is then 203/12.
Page 367: Graphic Programming
Chapter 23 Figure 23.7 Example Program to Display Any of the Remaining 64 Messages ATTENTION: Do not use message control words for any other purpose. This warning is especially critical for output image table locations when output or block transfer modules are placed in corresponding slots.
Page 368 Chapter 23 You can access graphic capability by executing the following keystrokes: These lines appear in the lower left hand corner of the screen. RECORD CHANNEL C: 9600 BAUD; INPUT = ON; HANDSHAKE = ON RECORD The previous messages disappear. The following messages appear in the upper left hand corner of the screen.
Page 369 Chapter 23 Table 23.D Alphanumeric/Graphic Key Definitions Function 23-18...
Page 370 Chapter 23 Table 23.E Industrial Terminal Control Codes Control Code Function Key Sequence Key Sequence Attribute In addition, standard ASCII control codes can be used with the industrial terminal (Table 23.F). These codes, although not displayed, can be interpreted and acted on by a peripheral device connected to channel C. 23-19...
Page 371 Chapter 23 Table 23.F ASCII Control Codes Control Display ASCII Name Code Mnemonic 23-20...
Page 372 Chapter 23 The 1770-T3 industrial terminal screen size is 80 columns across by 24 lines down. An example sheet for graphic programs is shown in Figure 23.8 An example message using graphic and alphanumeric characters is shown in Figure 23.9. Figure 23.8 Graphic Program Planning Sheet Figure 23.9...
Page 373 Chapter 23 Use the control code, [CTRL] [P] <Column #>[;]<Line#>[A] for cursor positioning to conserve memory when possible. For example, [CTRL] [P] [3] [9] [;] [9] [A] uses 3 words of memory, storing CRTL P in one byte and remaining characters in one byte each. If the cursor had been at column 0, and line 0 and normal space, and line feed commands were used, it would have taken 24 words of memory to accomplish the same thing.
Page 374: Program Editing
Chapter Program Editing Chapter Objectives This chapter describes how to edit instructions in your program: rules for editing instructions editing relay-type instructions editing other instructions Editing a Program Changes to an existing program can be made through a variety of editing functions (Table 24.A).
Page 375 Chapter 24 Program Editing Table 24.A Editing Functions Function Key Sequence Mode Description Insert a condition [INSERT] Program Position the cursor on the instruction that will precede instruction (instruction) the instruction to be inserted. Then press the (address) key sequence. Position the cursor on the instruction that will follow the instruction to be inserted.
Page 376 Chapter 24 Program Editing Inserting an Instruction Only non-output instructions can be inserted in a rung. There are ways of doing this: First instruction of an existing rung First instruction of another rung Another location in the rung. You insert an instruction using either of the two ways by performing the following steps.
Page 377 Chapter 24 Program Editing If, at any time, the memory is full, a MEMORY FULL message is displayed and you cannot enter more instructions. Removing an Instruction Only non-output instructions can be removed from a rung. Output instructions can be removed only be removing the complete rung. Remove an instruction by performing the following steps.
Page 378 Chapter 24 Program Editing Removing a Rung Removing a rung is the only way an output instruction can be removed. You can remove any rung, except the last one containing the END statement. Remove a rung by performing the following steps. Position the cursor anywhere on the rung you want to remove.
Page 379: Online Data Change
Chapter 24 Program Editing Change the address of a word or block instruction by performing the following steps. Position the cursor on the instruction you want to change. Press [Insert]. The cursor, although not displayed, positions itself on the first data digit. Enter that digit to display the cursor.
Page 380: Search Functions
Chapter 24 Program Editing Important: When the memory write protect is activated, online data change is not be allowed for addresses above 177. If you attempt to change data above address 177, the industrial terminal displays the error message MEMORY PROTECT ENABLED. Search Functions You can use the 1770-T3 terminal to search your program for: specific instruction and specific word addresses...
Page 381 Chapter 24 Program Editing Table 24.B Search Functions Function Key Sequence Mode Description Locate first rung of Positions cursor on the first instruction of the program. [SEARCH][ ] program Locate last rung of Positions cursor on the temporary end instruction, subroutine [SEARCH][ ] program area area boundary, or the end statement depending on the cursor's...
Page 382 Chapter 24 Program Editing Searching for Specific Instructions and Specific Word Addresses You can locate any instruction in your program by using methods described in this section. You can search for a block instruction searching for the counter address or the first entered address in the block. You can locate any instruction in your program by performing the following steps.
Page 383 Chapter 24 Program Editing Searching for the First Condition or Output Instruction in a Rung When the processor is operating in the Remote Program mode, you can access the first condition instruction of a rung from anywhere in the rung by performing the following steps.
Page 384: Clearing Memory
Chapter 24 Program Editing Searching for the First and Last Rung and User Boundaries You can locate the program boundaries including the first or last rung from any point in the program. Perform the following step. Press [Search][ ] or [Search][ ]. The user program could contain a Temporary End instruction boundary and/or a subroutine area boundary.
Page 385 Chapter 24 Program Editing Table 24.C Clear Memory Functions Function Key Sequence Mode Description Data table clear [CLEAR MEMORY] Remote Prog Displays a start address and an end address field. [7][7] (Start Address) Start and end word addresses determine boundaries for data (End Address) table clearing.
Page 386: Special Programming Aids
Chapter 24 Program Editing Partial Memory Clear You can clear part of the program and the messages. Perform the following step. press [Clear Memory] [9] [9]. The user program and messages are cleared from the cursor position which can not be on the first instruction. None of the bits in the data table are cleared.
Page 387 Chapter 24 Program Editing Help Directories The 1770-T3 help directories list the functions or instructions common to a single multipurpose key such as the [Search] or [File] (Table 24.D). A master help directory is also available which lists the eight function and instruction directories for the processors and the key sequence to access them.
Page 388 ATTENTION: Assign the task of online programming only to an experienced programmer who understands the nature of Allen-Bradley programmable controllers and the machinery being controlled. Check and re-check proposed online changes for accuracy. Assess all possible sequences of machine operation resulting from the change in advance.
Page 389 Chapter 24 Program Editing The procedure for online programming in run/program mode is similar to the procedure for editing in program mode. However, the following three keys have a special purpose in online programming: [Record] [Cancel Command] [Data Init] Use the [Record] key to enter a change to your program. Once pressed, the changed program is active.
Page 390 Chapter 24 Program Editing You must enter the data to be stored at the instruction’s address and its operating parameters when programming the following instructions: Equal To Less Than Timers Counters Files Sequencers The data stored at the instruction address is divided into two sections: BCD values (bits 00-13) status bits (bits 14-17) During program execution,these bits are constantly changing to reflect...
Page 391: Programming Techniques
Chapter Programming Techniques Chapter Objectives This chapter describes several programming techniques: one-shot programming re-start cascading timers temperature conversions program control One Shot Programming The one-shot programming technique sets a bit for one program scan only. There are two types of one-shots: leading edge trailing edge Leading Edge One Shot...
Page 392 Chapter 25 Programming Technique When bit 112/04 makes a false-to-true transition, the one-shot bit (bit 253/00) is set on for one scan. The length of time bit 112/04 remains on and does not affect the one-shot bit due to the next two rungs. Bit 011/14 is latched when bit 112/04 is set or bit 011/14 is unlatched when 112/04 is reset.
Page 393 Chapter 25 Programming Technique Restart You may get into a situation that transfers the contents of the EEPROM into CMOS RAM memory. The data values (timers, counters and storage bits/words) that were present when the EEPROM was burned will also be transferred along with the ladder diagram.
Page 394 Chapter 25 Programming Technique The switch assembly on the I/O chassis determines how and when EEPROM to CMOS RAM transfer occurs. A transfer takes place if any change of CMOS RAM memory content occurs while the battery was being changed. If a transfer occurs (memory was altered), the data table contains the values programmed into the EEPROM.
Page 395 Chapter 25 Programming Technique Here is an explanation of each rung: Rung 1: Free running timer. The timer done bit (030/15) is set for every 60 seconds or 1 minute intervals. Rung 2: When AC = PR (accumulated value equals preset value) of the timer, counter 031 increments.
Page 396 Chapter 25 Programming Technique Figure 25.6 Converting Temperature Values 180.000 PR 003 AC 000 PR 999 AC 000 Suppose that you connected a thermocouple to an input module that measures Celsius temperature. A block transfer read transfers the temperature into the processor’s data table. For your ease, you would like to convert the recorded Celsius temperature in the data table to Fahrenheit values for display.
Page 397 Chapter 25 Programming Technique Here is an explanation of each rung: Rung 1: The Get instruction at address 201 multiplies the value of C by 9 and stores 900 at address 203. Rung 2: The Get instruction at address 204 divides 5 into 900 and stores the quotient, 180, in address 205.
Page 398 Chapter 25 Programming Technique Figure 25.7 Recording Temperature Values Every 5 Seconds PR 005 AC 000 SUBROUTINE AREA 180.000 Here is an explanation of each rung: Rung 1: When rung 1 is true, the timer (this is an example of a free running timer) starts.
Page 399 Chapter 25 Programming Technique Program Control This application illustrates the program control instructions, master control reset (MCR) and zone control last state (ZCL) (Figure 25.8). Figure 25.8 Program Control Master Control Reset Zone Control Last State Before you program these two instructions, you must think about how you would want outputs to react when you change the process or operation.
Page 400: Program Troubleshooting
Chapter Program Troubleshooting Chapter Objective This chapter describes special troubleshooting technique: run time errors bit monitor/manipulation contract histogram force functions temporary end instruction ERR message for an illegal opcode Run Time Errors The processor and the 1770-T3 Industrial Terminal can diagnose certain errors that occur during the execution of your program.
Page 401 Chapter 26 Program Troubleshooting Diagnosing a Run Time Error The following steps help you diagnose run time errors: Connect your industrial terminal to the processor. Turn on the industrial terminal and notice the message, PLC-2 RUN-TIME ERROR. Press [1] [1] to continue. If the industrial terminal is already connected, then your ladder diagram is replaced by the display showing the run time error message on the mode selection screen.
Page 402 Chapter 26 Program Troubleshooting Bit Monitor/Manipulation The bit monitor allows the status of all 16 bits of any data table word to be displayed. Bit manipulation allows data table bits to be selectively changed and is useful in setting initial conditions in the data of word instructions.
Page 403 Chapter 26 Program Troubleshooting Data table bits, excluding those in the processor work area can be accessed by the contact histogram command. The on/off status of the bit and the length of time the bit remained on or off (in hours, minutes and seconds) is displayed on the Industrial Terminal.
Page 404 Chapter 26 Program Troubleshooting Figure 26.1 Contact Histogram Display hr.mn.sec. OFF or ON 00:00'00.00 ON 00:00:00.00 OFF 00:00:00.00 ON 00:00:00.00 On Time On Time Off Time If the bit is changing states faster than can be printed or displayed, a buffer stores these changes.
Page 405 Chapter 26 Program Troubleshooting Using a Force Function You can use force functions in either of two ways using: bit manipulation/monitor display of an I/O word ladder diagram display of user program By pressing [Search] [5] [3] <address>, the bit status and force status of the 16 corresponding input bits or output terminals of the desired word is displayed.
Page 406 Chapter 26 Program Troubleshooting ATTENTION: When an energized output is being forced off, keep personnel away from the machine area. Accidental removal of force functions instantly energizes the output device. Injury to personnel near the machine could result. Forced Address Display The industrial terminal displays a complete lists of bit addresses that are forced on or off by pressing: [Search][Force On]...
Page 407 Chapter 26 Program Troubleshooting Second Method (Entering from the Remote Program or Program mode) Cursor to the first rung of the main program to be made inactive. Position the cursor on the first instruction in the rung. Press [Insert] [ ] [T. End]. Removing a Temporary End Instruction Remove a Temporary End instruction by performing the following steps.
Page 408: Testing Your Program
Chapter 26 Program Troubleshooting Testing Your Program This is the last phase of testing needed to help ensure proper start-up. ATTENTION: Only trained personnel should conduct this test. Have a trained person at appropriate emergency stop switches to de-energize output devices that could cause hazardous operation.
Page 409: Err Message For An Illegal Opcode
Chapter 26 Program Troubleshooting ERR Message for an An illegal opcode is an instruction code that theprocessor does not Illegal Opcode recognize. It causes a run time error. Important: The illegal opcode ERR message should not be confused with ERR messages caused when a 1770-T1 or 1770-T2 industrial terminal is connected to a processor that was using a 1770-T3 industrial terminal.
Page 410 Appendix Specifications Mini PLC 2/02 Processor Mini PLC 2/16 Processor Mini PLC 2/17 Processor Location Backplane Current Battery Back up Data Table Size Memory Size I/O Scan Program Scan I/O Capacity (Typical) Mode Selection Environmental Conditions Keying (top connector)
Page 411 Appendix A Mini PLC 2/02 Processor Mini PLC 2/16 Processor Mini PLC 2/17 Processor Input Voltage Input Voltage Range Nominal Input Power Frequency Output Current to Backplane Keying (top connector)
Page 412 Appendix Processor Comparison Chart Mini Mini Mini Mini Mini Mini PLC 2 PLC 2/15 PLC 2/05 PLC 2/02 PLC 2/16 PLC 2/17 Memory 7.75K 7.75K I/O (Typical Maximum) Keyswitch Battery EEPROM I/O Power Clock Calendar Relay TImer Counter Data Manipulation Block Transfer 3 Digit Math Program Control...
Page 413 Appendix B Processor Comparison Chart Mini Mini Mini Mini Mini Mini PLC 2 PLC 2/15 PLC 2/05 PLC 2/02 PLC 2/16 PLC 2/17 Natural Log Log(10) Log(10) Log(10) Log(10) Base 10 Log Reciprocal Sq Rt Sq Rt recip recip recip recip Square Root File Search...
Page 414 Appendix Number Systems Objectives This appendix describes the four numbering systems the processor uses: decimal octal binary hexadecimal These numbering systems differ by their number sets and place values. Decimal Numbering System Timers, counters and math operations word values use the decimal numbering system.
Page 415 Appendix C Number Systems Figure C.1 Decimal Numbering System 2 x 10 = 200 3 x 10 = 30 9 x 10 10404-I Octal Numbering System Byte word values use the octal numbering system. This is a numbering system made up eight digits: the numbers 0 through 7 (Table C.A). All octal numbers are composed of theses digits.
Page 416 Appendix C Number Systems Binary Numbering System Binary numbering is used in all digital systems to store and manipulate data. This is a numbering system made up of two numbers: 0 and 1 (Table C.A). All binary numbers are composed of these digits. Information in memory is stored as an arrangement of 1 and 0.
Page 417 Appendix C Number Systems Figure C.4 Binary Coded Decimal 0 x 2 0 x 2 1 x 2 0 x 2 0 x 2 0 x 2 1 x 2 1 x 2 1 x 2 0 x 2 0 x 2 1 x 2 10407-I...
Page 418 Appendix C Number Systems Binary Coded Octal System The binary coded octal (BCO) format expresses an octal value as an arrangement of binary digits (eight bits or one byte). The 8 bits are broken down into three groups: 2 bits, 3 bits, and 3 bits. The first group of binary digits is used to represent an octal number from 0 to 3;...
Page 419 Appendix C Number Systems Figure C.6 Hexadecimal to Decimal Conversion 0 x 16 1 x 16 = 256 10 x 16 = 160 __7___ 7 x 16 = 01A7 10409 I...
Page 420 Allen-Bradley processor system components and functions. Each term in this glossary is concisely defined. These definitions provide a basis for understanding Allen-Bradley processors. In cases where a term may have more than one meaning, we give only those definitions directly related to our products.
Page 421 Appendix D Glossary Analog Output Module A module that outputs a signal proportional to a number transferred to the module from the processor. Arithmetic Capability The ability to do addition, subtraction, multiplication, division, and other advanced math functions with the processor. ASCII American Standards Code for Information Interchange.
Page 422 Appendix D Glossary Binary Coded Decimal (BCD) A numbering system used to express individual decimal digits (0-9) in 4-bit binary notation. Binary Word A related group of ones and zeros that has meaning assigned by position, or by numerical value in the binary system of numbers. Bit (Binary digit) The smallest unit of information in the binary numbering system.
Page 423 Appendix D Glossary Burn-In The operation of a unit, at elevated temperatures, prior to its application with the objective of stabilizing its characteristics and detecting early failures. (1) One or more conductors considered as a single identity that interconnect various parts of a system. For example, a data bus or address bus.
Page 424 Appendix D Glossary CMOS Complementary Metal Oxide Semiconductor circuitry. See MOS. Command A function initiated by a user action. Communication Rate See Baud Compatibility (1) The ability of various specified units to replace one another, with little or no reduction in capability. (2) The ability of units to be interconnected and used without modification.
Page 425 Appendix D Glossary CRT Terminal A terminal containing a cathode ray tub that displays user programs and information. Cursor (1) The intensified or blinking element in the user program or file display. (2) A means for indicating on a CRT screen where data entry or editing occurs.
Page 426 Appendix D Glossary Diagnostic Program A user program designed to help isolate hardware malfunctions in the programmable controller and application equipment. Diagnostics Pertains to the detection and isolation of an error malfunction. Digital Information presented in a discrete number of codes. Display The image which appears on a CRT screen or on other image projection systems.
Page 427 Appendix D Glossary Environment In a systems context, the environment is anything that is not a part of the system itself. Knowledge about the environment is important because of the effect it can have on the system or because of possible interactions between the system and the environment.
Page 428 Appendix D Glossary File (1) One or more data table words used to store related data. See File Organization. (2) A collection of related records treated as a unit. The records are organized or ordered on the basis of some common factor called a key.
Page 429 Appendix D Glossary Hardware The mechanical, electrical, and electronic devices which compose a programmable controller and its application Header Rung The first level of a ladder diagram program. It is a requirement when programming PLC-2 family processors or on the Data Highway. Hexadecimal Numbering System A base-16 numbering system that uses the symbols 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, and A, B, C, D, E, F.
Page 430 Appendix D Glossary Interlock A device actuated by the operation of some other device to which it is associated, to govern the succeeding operation of the same or allied devices. Input/Output I/O Channel A data transmission link between a processor scanner module and an I/O adapter module.
Page 431 Appendix D Glossary Ladder Diagram An industry standard for representing control systems. Ladder Diagram Programming A method of writing a user program in a format similar to a relay ladder diagram. Language A set of symbols and rules used for representing and communicating information.
Page 432 However, it may still be mounted in a separate enclosure. See Remote I/O Processor. Location A storage position in memory. Uniquely specified in Allen-Bradley processors by 5-, 6-, 7-, 8-, or 9-digit address. Logic A systematic means of solving complex problems through the repeated use of the AND, OR, NOT functions (they can be either true or false).
Page 433 Appendix D Glossary Master A device used to control secondary devices. Master Control Relay (MCR) A mandatory hardwired relay that can be de-energized by any series-connected emergency stop switch. Whenever the master control relay is de-energized, its contacts open to de-energize all application I/O devices.
Page 434 Appendix D Glossary Module Addressing A method of identifying the I/O modules installed in a chassis. Module Group Adjacent I/O modules which relate 16 I/O terminals to a single 16-bit image table word. Module Slot A location for installing an I/O module. Monitor (1) A CRT display.
Page 435 Appendix D Glossary National Bureau of Standards (NBS) An organization under the United States Department of Commerce responsible for developing and disseminating federal standards in many areas. National Electrical Code (NEC) A set of regulations governing the construction and installation of electrical wiring and apparatus, established by the National Fire Protection Association and suitable for mandatory application by governing bodies exercising legal jurisdiction.
Page 436 Appendix D Glossary Octal Numbering System A numbering system that uses only the digits 0 through 7. Also called base-8. Off Line Equipment or devices that are not connected to, or do not directly communicate with, the central processing unit. On Line Equipment or devices which communicate with the device it is connected to.
Page 437 Appendix D Glossary Parallel Operation A type of information transfer where all bits, bytes, or words are handled simultaneously. Parallel Output Simultaneous availability of two or more bits, channels, or digits. Parallel Transmission The simultaneous transmission of bits which constitute a character. Parity The use of a self-checking code employing binary digits in which the total number of ones is always even or odd.
Page 438 Appendix D Glossary Program A set of instructions used to control a machine or process. Program Scan Time The time required for the processor to execute the instructions in the program. The program scan time may vary depending on the instructions and each instruction’s status during the scan.
Page 439 Appendix D Glossary Rack An addressing concept equivalent to 128 discrete I/O. Rack Fault (1) A red diagnostic indicator that lights to signal a loss of communication between the processor and any remote I/O chassis. (2) The condition which is based on the loss of communication. Read/Write Memory A memory where data can be stored (write mode) or accessed (read mode).
Page 440 Appendix D Glossary Reply Data transmitted in response to a request. Report An application data display or printout containing information in a user-designed format. Reports could include operator messages, part records, and production lists. Initially entered as messages, reports are stored in a memory area separate from the user program.
Page 441 Appendix D Glossary State The logic 0 or 1 condition in processor memory or at a circuit input or output. Storage See Memory. Storage Bit A bit in a data table word which can be set or reset, but is not associated with a physical I/O terminal point.
Page 442 Appendix D Glossary Tasks A set of instructions, data, and control information capable of being executed by a CPU to accomplish a specific purpose. Terminal Address A 5-digit number which identifies a single I/O terminal. It is also related directly to a specific image table bit address. Terminal Control System The operating system used to execute Grafix programs, and to perform other activities while the Advisor is on line and in use by an operator.
Page 443 Appendix D Glossary Upload/Download Commonly refers to the reading/writing of programs and data tables from or into processor memory. The commands to do these processes come from some supervisory device. Upper Nibble The four most significant bits of a byte. Variable A factor which can be altered, measured, or controlled.
Page 444 Appendix D Glossary ZCL Instructions A user-program fence for ZCL zones. ZCL Zones Assigned program areas which may control the same outputs through separate rungs, at different times. Each ZCL zone is bound and controlled by ZCL instructions. If all ZCL zones are disabled, the outputs would remain in their last state.
Page 445 Adjusting the Data Table ....... . . E-22 Block Transfer .
Page 449 Here is an explanation of each value: Here is an explanation of the optional conditions:...
Page 451 Important: The counter word address, XXX, is assigned to the counter accumulated areas of the data table. To determine which addresses are valid accumulated areas, the third digit from the right must be an even number. The word address displayed will be 3 or 4 digits long depending on the data table size.
Page 453 Here is an explanation of each value:...
Page 454 E-10...
Page 455 E-11...
Page 456 µ µ µ µ E-12...
Page 457 µ µ µ µ E-13...
Page 458 µ µ µ µ µ E-14...
Page 459 µ µ µ µ E-15...
Page 460 E-16...
Page 461 E-17...
Page 462 E-18...
Page 463 E-19...
Page 464 To examine memory layout: SEARCH The word SEARCH appears in the lower left hand corner of the screen. This illustrates the memory layout display for a 178 word data table. Even if there are no messages or programs in the memory, the END statement is there and it requires one word.
Page 465 E-21...
Page 466 1920 1792 3577 3968 3840 7577 7808 7680 17177 2048 3777 4096 7777 7936 17377 10349–I E-22...
Page 467 1920 1792 3577 17 3968 3840 7577 7808 7680 17177 2048 3777 17 4096 7777 7936 17377 10350–I E-23...
Page 468 E-24...
Page 469 E-25...
Page 470 All range values are unitless unless noted otherwise. E-26...
Page 471 E-27...
Page 472 E-28...
Page 473 E-29...
Page 474 E-30...
Page 475 Here is an explanation of each value: E-31...
Page 476 E-32...
Page 477 PROCESSOR MEMORY INVALID PROCESSOR MEMORY INVALID E-33...
Page 478 Important: The timer word address, XXX, is assigned to the timer accumulated areas of the data table. To determine which addresses are valid accumulated areas, the third digit from the right must be an even number. The time base 1.0, 0.1 or 0.01 second. Preset values, YYY, and accumulated values, ZZZ, can vary from 000-999.
Page 479 Diagnostic Word: Word 027 Bits in word 027 are used by the processor for internal control functions. E-35...
Page 480 Index Numbers...
Page 481 Index I–2...
Page 482 Index I–3...
Page 483 Index I–4...
Page 484 Index I–5...
Page 485 Index I–6...
Page 486 Index I–7...
Page 487 Index I–8...
Page 488 Index I–9...
Page 489 Index I–10...

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