Circuit Description - Yaesu FT-50R Technical Supplement

The FT-50 is composed of the Mother-Unit,
CNTL-Unit and the respective sub-units connect-
ed to them. The Mother-Unit contains the front-
end receiver, IF, PLL circuit, demodulation cir-
cuit, swit, c hing circuit and the VCC>Unit for gen-
eration of transmission and local signals. The
CPU, audio circuit andl LCD display are in the
CNTL-Unit, and the Key-Unit and the VR-Unit
an~
connected.
There are two types of Key-Units: the stan--
dard 16 Key Unit (FTT-11) and the optional 16
Key-Full featured Unit {FTT-12). The FfT-12 is
comprised of a DTMF and CTCSS decode IC, and
djgital voice recordin g circuitry.
Receiv, e
Antenna Duplexer
RF input enters the antenna terminal and pass-
es through the 430 MHz LPF composed of C1044,
C1045, 1046, L1008, Ll009 and. L1010, and 145
MHz input is fed to the RF amplifier through the
145 MHz LPF consisting of Cl040, C104l, C l 242,
C1043, L1006, L1007 an d L1008 as wen as the
antenna switching circuit consisting of D1006,
D1008 (RLS135) and L1004. The UHF input pass-
es through a 430 MHz LPF and 430 MHz HPF
consisting of Cl10, Cll 1, CHS and L1024, a LPF
composed of Cl 112, Cl 114 and L 1022 and the
antenna switching circuit made, up of 01016,
01018 (RLS135), Cl 118 and L1021 .
Accordingly, the 430 & 145 MHz LPF and 430
MHz HPF constitute the duplexer,, it separates
VHF and UHF signals.
VHF Reception
VHF input passes through the duplexer cir-
cuit, the antenna switching circuit, and the HPF
consisting of C1068, C1069, C107_0 and L1015. It
is then amplified by Q1023 (2SC4226-R24) of the
.IT-SOR Technical Supplement
Circuit Description
RF
amplifier and passes through the 3-stage vari-
a b]e BPF · c onsisting of C1054, C1055, C1057,
C1062, C1065, 01001, 01010, 0 ] 011 (HVU359),
LJ040, L1041 and L1042 to en t er Q ] 022
'(2,SC4226
1
-R24) of the
1st
mixer. The tuning
voI D tage of this. frequency-variable BPF is supp]ied
from the AJ>C line of the CPU through Ql 025
(TC75S51
F)
of the level shift amplifier.
Conversely, the output of the 144-VCO-Unit
(pin 7, OUT) is amphfied iby Q1007 (2SC4537)
an d added to Q1022 of the 1st mixer as the 1st
local signal by 0 1004 (DAN222) d iode switch
during reception. The received signaI D is convert-
ed to the 1st IF frequency (45.1 MHz), and after
. t he conversion,
it
enters the band change over
switch D1036 (0AN222).
UHF Reception
UHF input passes through the duplexer, an-
ten_ na switch and the variable BPF consisting of
C ~
18S, Cl 190. , D1035 fHVU35.0), L1033 and
TC1005, and is amplified by Q1044 (2SC4227)
of the RF amplifier. After amplification,
r u t pass-
es through the two-stage variable BPF made up
of C1189, D1033 (HVU350), L1032, TC1004 and
C1188, 01032 (HVU350) L1031 and TC1003 and
is amplified iby the second-stage amphfier Q1043
(2SC4227). It then passes 1 f hrough the variable
BPFconsiisting of Cl 187, D1l030 (HVU350),, Ll030
and TC1.002, and enters Q1042 (2' S C4226-R24)
of the 1st mixer. The tuning voltage of this fre-
quency variable BPF is supplied from APC line
of the CPU through the level shift amplifier
Q1025 (TC75S51 F).
Conversely, the output of the 430-VCO-Unit
(No. 7 pin, OUT) is amplified by Ql 030
(2SC4245) and added to Q1042 of 1st mixer as
the 1st local signal by Dl 014 (DAN222) diode
switch during reception. The received signal is
3-1
for free by
Rad ioAmateur. eu