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FCC PART 15, SUBPART C, SEC. 15.247 - DIRECT SEQUENCE SPREAD SPECTRUM TRANSMITTERS
PCMCIA Wireless LAN Card, Model WL-211F
TEST BACKGROUND AND PROCEDURE.
According to FCC regulations [1], a direct sequence spread spectrum system must have a processing
gain, G
of at least 10 dB. Compliance to this requirement can be shown by demonstrating a relative
p
bit-error-ratio (BER) performance improvement (and corresponding signal to noise ratio per symbol
improvement of at least 10 dB) between the case where spread spectrum processes (coding,
modulation) are engaged relative to the processes being bypassed. In some practical systems, the
spread spectrum processing cannot simply be bypassed. In these cases, the processing gain can be
indirectly measured by a jamming margin test [2]. In accordance with the new NPRM 99-231, if the
vendor has a system with less than 10 chips per symbol, the CW jamming results must be supported
by a theoretical explanation of the system processing gain.
THEORETICAL CALCULATIONS
The processing gain is related to the jamming margin as follows [2]:
S
=
+
G
p
N
output
Where BER
REFERENCE
to noise ratio per symbol, (S/N)
desired signal power), and L
The maximum allowed total system implementation loss is 2 dB.
The HFA3861A direct sequence spread spectrum baseband processor uses CCK modulation which is
a form of M-ary Orthogonal Keying. The BER performance curve is given by [5]:
" The probability of error for generalized M-ary Orthogonal signaling using coherent demodulation is
given by:
=
−
=
−
P
1
P
1
e
c
1
ULTRATECH GROUP OF LABS
3000 Bristol Circle, Oakville, Ontario, Canada L6H 6G4
Tel. #: 905-829-1570, Fax. #: 905-829-8050, Email: vhk.ultratech@sympatico.ca, Website: http://www.ultratech-labs.com
•
Assessed by ITI (UK) Competent Body, NVLAP (USA) Accreditation Body & ACA/AUSTEL (Australia)
•
Accredited by Industry Canada (Canada) under ACC-LAB (Europe/Canada MRA)
•
Recognized/Listed by FCC (USA )
•
All test results contained in this engineering test report are traceable to National Institute of Standards and Technology (NIST)
J
+
L
system
S
is the reference bit error ratio with its corresponding, theoretical output signal
, (J/S) is the jamming margin (jamming signal power relative to
output
are the system implementation losses.
system
∞
1
∫
−
2 1
(
Q z
π
2
S
01
−
N
0
M
2
E
+
b
2
)
η
FCC ID: MXF-WL211F
−
1
2
z
−
exp
dz
2
File #: GTT-013FTX
Page 31
March 17, 2000
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