Table 16: Pin Definition Of Pcm And I2C Interface - Quectel UC15 Hardware Design

The following table shows the pin definition of PCM and I2C interface which can be applied on audio
codec design.

Table 16: Pin Definition of PCM and I2C Interface

Pin Name Pin No.
PCM_DOUT 34
PCM_DIN 35
PCM_CLK 36
PCM_SYNC 37
I2C_SDA 38
I2C_SCL 39
UC15's firmware has integrated the configuration on NAU8814 application with I2C interface. The default
configuration is master mode which uses short sync data format with 2048 kHz clock. Please refer to
document [1] for details about the command AT+QDAI.
UC15_Hardware_Design
Figure 28: Auxiliary Mode Timing
I/O Description
DO PCM data output.
DI PCM data input.
IO PCM data bit clock.
PCM data frame
DO
sync signal
IO I2C serial data.
DO I2C serial clock.
Confidential / Released
UMTS/HSDPA Module Series
UC15 Hardware Design
Comment
2.6V power domain
2.6V power domain
2.6V power domain
2.6V power domain
External pull-up resistor is
required. 2.6V only.
External pull-up resistor is
required. 2.6V only.
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