Functional Description; Overview - Sandbender Technology 1PICA0001 User Manual

Can interface phat
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3 Functional Description

The CAN Interface pHAT* is designed to be fully compliant with the HAT hardware specification
published by the Raspberry Pi Foundation.
The HAT is primarily intended to enable a Raspberry PI or similar system to send and receive messages
on a CAN bus, it supports high speed communications of up to 1Mbit/s. This bus interface is isolated to
allow the breaking of ground loops and to also help prevent conducted electrical noise from propagating
into the low voltage circuits in the Raspberry Pi or other connected HATs.
The board has a Real Time Clock (RTC). This functionality is provided with an NXP PCF8523T along
with a holder for a standard lithium coin cell (CR1220).
*Note - The configuration EEPROM on the board is not programmed with a device description tree so
technically it should not be called a HAT. The EEPROM part is tested but supplied in an erased state
with the intention that the end user or integrator of a system can program this EEPROM to be specific to
its specific end use.

3.1 Overview

The key elements of the board are shown below: the following document sections cover these blocks or
'functional groups' in more detail.
Figure 2 - System Overview
The board circuitry consists of four main component groups:
CAN Controller and Bus Transceiver.
Real Time clock.
FRAM EEPROM.
HAT Configuration EEPROM.
01/06/2018
Document Number
IEMAN000001
Document Title
CAN Interface pHAT User Manual
6 of 22
Document Revision
Page
R003
6 of 22

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