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3.2.7 HAT Configuration EEPROM
To meet the HAT hardware specification the board is fitted with a I2C EEPROM IC5. The part fitted to
the board is an ON Semiconductor CAT24C32. This part has 4KB of storage (4096 bytes). It supports
standard, fast and fast-plus I2C protocols.
There is a removable write protection link fitted to JP1. When fitted this pulls pin 7 (WP) of the memory
IC down to GND, this allows the programming of the HAT with a custom device configuration tree. When
the link is not fitted the pullup R5 ensures that pin WP is high, and the part is write protected.
Capacitor C11 provides local power supply de-coupling.
Link JP1
IC5 Write Protection
Not Fitted
Write Protected
Fitted
Write Enabled
Figure 9 - HAT Configuration EEPROM
The RPi connects to IC5 over the HAT configuration I2C bus:
SCL - Serial Clock, ID_SCL (pin 28 of 40way GPIO connector).
•
SDA - Serial Clock, ID_SDA (pin 27 of 40way GPIO connector).
•
R8 and R9 pullups are required for correct I2C functionality.
01/06/2018
Document Number
IEMAN000001
Document Title
CAN Interface pHAT User Manual
14 of 22
Document Revision
Page
R003
14 of 22
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