Siemens Simatic ET 200MP Manual page 32

Parameters/address space
4.2 Address space
Set output DQ - behavior of the STS_DQ bit
The following section shows the behavior of the STS_DQ bit with the parameter assignment
"Set output DQ = between comparison value and high counting limit".
The STS_DQ bit is set to 1
when the comparison value < = counted value <= high counting limit is reached.
As an option, a hardware interrupt can be enabled in the parameter assignment. This is
generated with the parameter rising edge of the STS_DQ bit.
The following figure shows an example of the behavior of the STS_DQ bit between the
comparison value and high counting limit.
Figure 4-11
The following section shows the behavior of the STS_DQ bit with the parameter assignment
"Set output DQ = between low counting limit and comparison value".
The STS_DQ bit is set to 1
when the low counting limit < = counted value < = comparison value is reached.
As an option, a hardware interrupt can be enabled in the parameter assignment. This is
generated with the parameter rising edge of the STS_DQ bit.
32
Behavior of the STS_DQ bit and hardware interrupt
DI 32x24VDC HF digital input module (6ES7521-1BL00-0AB0)
Manual, 09/2016, A5E03485935-AF