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Philips DVD962SA/001 Service Manual page 107

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go directly to the SCART plug or the appropriate VIDEO OUT
cinch connectors.
The video output from the STi5505 is RGB, YC, and CVBS. To
get YUV output, an RGB to YUV conversion matrix (item 7504)
is necessary.
It is possible to set the SACD player in 'audio direct' mode. This
means that there is no video output from the A/V board. This is
indicated by a blue LED on the front panel, and is controlled via
the VMUTE control signal from pin 7 of IC7107.
Audio
The digital audio signals are fed to three DACs for the 6-
channel audio output:
7200 (CS4397) for the front left and right channel,
7201 (CS4392) for the centre and subwoofer,
7202 (CS4392) for the rear left and right channel.
All these DACs can accept both DSD and PCM data streams
from the SD1.1.
Front channels
Due to the gain difference between DSD and PCM in the
CS4397, an external circuit (7222, 7221 and 7203) is added to
perform hardware attenuation for PCM data. It is controlled via
the DSD_PCM control signal (pin 6 of IC7107):
When this signals is 'low' (= PCM), the voltage at pin 28 is
3.3 V, resulting in 5 dB attenuation.
When this signal is 'high' (= DSD), the voltage at pin 28 of
IC7200 is 5 V, resulting in no attenuation.
After the DAC, the signals are amplified again with 5dB
(IC7204) to compensate for the gain loss in the DAC.
Rear channels
All the rear channels have the same gain.
Centre channel
There is a control line from the STi5505, called CENTRE_ON,
which is used to switch between the centre channel and front
channels for both SACD- and DVD modes (see figure above).
Speaker setting for '6 channel DSD '
The SACD 900 will support two speaker-settings in this mode.
This is controlled via the SACD_BASSMGT control signal (pin
4 of IC7107). This will switch a 120 Hz filter 'on' or 'off', for bass
enhancement.
This setting is always 'off' when the set is playing PCM-stream.
9.4.2
Progressive Scan Board (if present)
General
The DVD962SA series offer progressive scan YUV outputs
(only for non-Europe models).
Block Diagram
Progressive Scan Board
7101
SDRAM
7100
FL1200
1002
D G TAL
DE
INPUT
YUV
INTER
FORMATTER
DATA
LACER
H SYNC
V SYNC
PLL
27M
CLOCK
CLOCK
GENERATOR
1200
2
I
C
DE INTERLACER / LINEDOUBLER
5V
+5VD
3V3
Figure 9-6
Circuit Descriptions and List of Abbreviations
PROGRESSIVE YUV
7202
G/Y
LUMA
PATTERN
OUTPUT
B/Cb
GENER
CHROMA
DAC
FOR
LPF
+DELAY
2X INTER
MATTER
R/Cr
+GAMMA
LPF
POLATION
H SYNC
SYNC
TIMING
SYNC
V SYNC
GENE
GENE
GENE
RATOR
RATOR
RATOR
CLK N
CONTROL
CONTROL
NTERFACE
INTERFACE
PROGRESSIVE ENCODER
+5VA
+3V3A
CL16532136 046 eps
+3V3D
Progressive YUV
This creates a picture signal with double the scan lines of a
conventional interlaced picture, to create a noticeably sharper
and smoother image. It offers higher picture resolution and
eliminates virtually all motion artefacts. Even on large screens,
the progressive scan lines are barely noticeable and it reduces
picture flickering significant.
This board also offers the Digital Crystal Clear feature, which
allow you to fine-tune the following parameters:
Gamma correction,
Chroma and Luma delay.
9.5
Control and Display Panel
9.5.1
Control
Slave Processor
The most important component on this board is the (slave)
microprocessor (item 7401). It works on an 8 MHz resonator
(item 1119) and has a RESET circuit (7105), which is triggered
by the +5Vstb. After the RESET pulse, the STB_CONT line will
release the reset of the host microprocessor (see circuit around
TS7452 on the Monoboard, diagram 4)
In addition, when going to Standby, the slave processor will
reset the host processor. When the slave processor receives
the correct IR (or key) code to leave the Standby mode, it
resets the host processor.
Other slave processor functions are:
generation of a scanning grid for the keys,
generation of the display grid and segment scanning,
generation of square signal to generate the filament
voltage for FTD display,
inputs for RC5/6 and P50 (P50 controller is build in).
Standby LED
Transistor 7104 drives the Standby LED. When the STBLED
signal from the slave processor is 'high', the LED is 'off'.
Key Matrix
When a key on the local keyboard is pressed, the signal at the
scanning pins of the microprocessor goes from +5 V to 0 V.
IR Receiver
The IR controller in the slave processor handles both RC5 and
RC6 signals. The logic is +5 V for 'high' and 0 V for 'low'.
P50 Interface
P50 (or Easylink) is a bi-directional serial interface for
communication between video equipment. For European sets,
this communication goes via pin 10 of the SCART connector,
while for other regions (when present), this is a cinch
connector. The slave processor controls the P50 bus.
9.5.2
Display
FTD Display
The slave processor has an internal square signal generator
(42 kHz), to generate the AC filament voltage. TS7106 and
7204
Y
7205
7109 amplify the square signal before it is applied to the
U
7207
V
display.
The necessary power supply of -32 V is derived from the -40 V
signal via voltage regulator 7400.
261101
SACD 900
9.
EN 107

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