Cypress EX-USB FX3 Programmer's Manual page 117

9.1.3.4 UART_INTR_MASK register
This register enables/disables the reporting of UART block interrupts to the ARM CPU.
Bits
0 RX_DONE
1 RX_DATA
2 RX_HALF
3 TX_DONE
4 TX_SPACE
5 TX_HALF
6 CTS_STAT
7 CTS_TOGGLE
8 BREAK
9.1.3.5 UART_EGRESS_DATA register
This register is used to put data into the UART TX FIFO when transmitting in register mode
(UART_CONFIG.DMA_MODE=0).
Bits
7:0 DATA
9.1.3.6 UART_INGRESS_DATA register
This register is used to read data from the UART RX FIFO when receiving data in register mode.
Bits
7:0 DATA
FX3 Programmers Manual, Doc. # 001-64707 Rev. *C
HW
Field Name
Access
R
R
R
R
R
R
R
R
R
HW
Field Name
Access
R
HW
Field Name
Access
RW
FX3 Serial Peripheral Register Access
SW Default
Access Value
1: Enables reporting of
RW 0
UART_INTR.RX_DONE to the CPU
1: Enables reporting of
RW 0
UART_INTR.RX_DATA to the CPU
1: Enables reporting of
RW 0
UART_INTR.RX_HALF to the CPU
1: Enables reporting of
RW 0
UART_INTR.TX_DONE to the CPU
1: Enables reporting of
RW 0
UART_INTR.TX_SPACE to the CPU
1: Enables reporting of
RW 0
UART_INTR.TX_HALF to the CPU
1: Enables reporting of
RW 0
UART_INTR.CTS_STAT to the CPU
1: Enables reporting of
RW 0
UART_INTR.CTS_TOGGLE to the CPU
1: Enables reporting of
RW 0
UART_INTR.BREAK to the CPU
SW Default
Access Value
Data byte to be written to the peripheral
W 0
in registered mode.
SW Default
Access Value
Data byte read from the peripheral when
R 0
DMA_MODE=0
Description
Description
Description
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