LG 55LX9500 Service Manual page 21

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BROAD BAND STUDIO
+3.3V_NORMAL
P200
TJC2508-4A
1
2
3
4
4 3 p a g e : B l u e t o o t h
BT_DM
4 3 p a g e : B l u e t o o t h
R o u t e I N C M b e t w e e n a s s o c i a t e d BT_DP
l e f t a n d r i g h t s i g n a l s o f s a m e c h a n n e l
T h e I N C M t r a c e e n d s a t t h e
s a m e p o i n t w h e r e t h e c o n n e c t o r
g r o u n d c o n n e c t s t o t h e b o a r d g r o u n d
( t h r u - h o l e c o n n e c t o r p i n ) .
P l a c e t e s t p o i n t s , r e s i s t o r s
n e a r a u d i o c o n n e c t o r .
C o n n e c t t h e o t h e r s i d e o f
t h e r e s i s t o r t o G N D a s c l o s e
a s p o s s i b l e t o t h e g r o u n d
c o n n e c t i o n o f t h e a s s o c i a t e d
a u d i o c o n n e c t o r .
041:B5
041:B5
0 0 2 : J 6
0 0 2 : J 6
041:B5
041:B5
0 0 2 : J 7
041:B5
041:B5
0 0 2 : J 6
0 0 9 : I 3
0 0 9 : I 3
0 0 2 : J 7
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
D23
FE_TS_DATA_CLK
C24
FE_TS_SERIAL
B26
FE_TS_SYNC
A25
B25
A26
CI_OUTDATA[0-7],CI_OUTSTART,CI_OUTVALID
045:V14
CI_A[14] G23
D25
CI_OUTDATA[0]
D24
CI_OUTDATA[1]
CI_OUTDATA[2] C25
E27
CI_OUTDATA[3]
CI_OUTDATA[4] E26
D28
CI_OUTDATA[5]
CI_OUTDATA[6] D27
D26
CI_OUTDATA[7]
CI_OUTSTART E23
E24
CI_OUTVALID
F25
C27
C26
B28
B27
A27
F24
F23
A1.2V A2.5V E25
A3.3V
C28
A28
L202
BLM18PG121SN1D
AC18
AF20
AG20
AG21
AF19
AD20
R 2 2 0 : B C M r e c o m m e n e d r e s i s t o r 5 6 2 o h m
AE20
AH22
AH20
AG19
AH21
DTV/MNT_V_OUT
M25
M24
A3.3V
A1.2V
A2.5V
L200
BLM18PG121SN1D
BT_DM
BT_DP
C201
SIDE_USB_DM
100pF
D3.3V SIDE_USB_DP
R210
120
R266
R235
2.7K
2.7K
R218
240 1K R219
EPHY_RDN
EPHY_RDP
A2.5V A1.2V
EPHY_TDN
BLM18PG121SN1D EPHY_TDP
L209
BLM18PG121SN1D
BLM18PG121SN1D
L212
C2026 C244
L210
4 . 7 u F 0 . 1 u F
16V
AE6
R204 51 C206 0 . 0 1 5 u F
REAR_AV_L_IN
R214 51 C210 0 . 0 1 5 u F AD7
REAR_AV_R_IN
AF6
REAR_AV_LR_INCM
AH4
COMP2_L_IN R215 51 C211 0 . 0 1 5 u F
AG5
R228 51 C232 0 . 0 1 5 u F
COMP2_R_IN
AG4
COMP2_LR_INCM
R229 51 C220 0 . 0 1 5 u F AG6
SC1_L_IN
AF7
R230 51 C221 0 . 0 1 5 u F
SC1_R_IN
AE7
SC1_LR_INCM
AH5
R231 51 C224 0 . 0 1 5 u F
SIDE_AV_L_IN
R232 51 C225 0 . 0 1 5 u F AG7
SIDE_AV_R_IN
AH6
SIDE_AV_LR_INCM
R233 51 C226 0 . 0 1 5 u F AD8
PC_L_IN
AF8
R234 51 C227 0 . 0 1 5 u F
PC_R_IN
AE8
PC_LR_INCM
AH7
AH8
AG8
AF5
AB9
AA10
AB10
AA11
AB11
AC8
AE5
IC100
LGE3556C (C0 VERSION)
NON_3DTV
B4
PKT0_CLK LVDS_TX_0_DATA0_P 013:E7;035:AK20
LVDS_TX_1_DATA4_N
A4
PKT0_DATA LVDS_TX_0_DATA0_N LVDS_TX_1_DATA4_P 013:E7;035:AK19
C6
PKT0_SYNC LVDS_TX_0_DATA1_P 013:E7;035:AK19
LVDS_TX_1_DATA3_N
B6
RMX0_CLK LVDS_TX_0_DATA1_N LVDS_TX_1_DATA3_P 013:E7;035:AK19
B3
RMX0_DATA LVDS_TX_0_DATA2_P 013:E7;035:AK17
LVDS_TX_1_DATA2_N
A3
RMX0_SYNC LVDS_TX_0_DATA2_N LVDS_TX_1_DATA2_P 013:E7;035:AK17
A1
LVDS_TX_0_DATA3_P LVDS_TX_1_DATA1_N 013:E7;035:AK17
A2
LVDS_TX_0_DATA3_N LVDS_TX_1_DATA1_P 013:E7;035:AK16
D5
POD2CHIP_MCLKI LVDS_TX_0_DATA4_P LVDS_TX_1_DATA0_N 013:E7;035:AK16
D6
POD2CHIP_MDI0 LVDS_TX_0_DATA4_N LVDS_TX_1_DATA0_P 013:E7;035:AK16
C5
POD2CHIP_MDI1 LVDS_TX_0_CLK_P LVDS_TX_1_CLK_N 013:E7;035:AK18
B5
POD2CHIP_MDI2 LVDS_TX_0_CLK_N LVDS_TX_1_CLK_P 013:E7;035:AK18
B1
POD2CHIP_MDI3 LVDS_TX_1_DATA0_P LVDS_TX_0_DATA4_N 013:F7;035:AK15
B2
POD2CHIP_MDI4 LVDS_TX_1_DATA0_N LVDS_TX_0_DATA4_P 013:F7;035:AK14
C2
POD2CHIP_MDI5 LVDS_TX_1_DATA1_P LVDS_TX_0_DATA3_N 013:F7;035:AK14
C3
POD2CHIP_MDI6 LVDS_TX_1_DATA1_N LVDS_TX_0_DATA3_P 013:F7;035:AK14
D1
POD2CHIP_MDI7 LVDS_TX_1_DATA2_P LVDS_TX_0_DATA2_N 013:F7;035:AK12
D2
POD2CHIP_MISTRT LVDS_TX_1_DATA2_N 013:F7;035:AK12
LVDS_TX_0_DATA2_P
E1
POD2CHIP_MIVAL LVDS_TX_1_DATA3_P LVDS_TX_0_DATA1_N 013:E7;035:AK12
E2
CHIP2POD_MCLKO LVDS_TX_1_DATA3_N 013:E7;035:AK11
LVDS_TX_0_DATA1_P
E3
CHIP2POD_MDO0 LVDS_TX_1_DATA4_P LVDS_TX_0_DATA0_N 013:E7;035:AK11
E4
CHIP2POD_MDO1 LVDS_TX_1_DATA4_N 013:E7;035:AK11
LVDS_TX_0_DATA0_P
D3
CHIP2POD_MDO2 LVDS_TX_1_CLK_P LVDS_TX_0_CLK_N 013:E7;035:AK13
D4
CHIP2POD_MDO3 LVDS_TX_1_CLK_N 013:E7;035:AK13
LVDS_TX_0_CLK_P
F5 C228 OPT
CHIP2POD_MDO4 LVDS_PLL_VREG
10uF
F1
CHIP2POD_MDO5 LVDS_TX_AVDDC1P2
F4
CHIP2POD_MDO6 LVDS_TX_AVDD2P5_1
F2
CHIP2POD_MDO7 LVDS_TX_AVDD2P5_2
C1
CHIP2POD_MOSTRT LVDS_TX_AVSS_1
F3
CHIP2POD_MOVAL LVDS_TX_AVSS_2
C4
LVDS_TX_AVSS_3
A5
LVDS_TX_AVSS_4
E5
VDAC_AVDD2P5 LVDS_TX_AVSS_5
E6
VDAC_AVDD1P2 LVDS_TX_AVSS_6
D7
VDAC_AVDD3P3_1 LVDS_TX_AVSS_7
E7
VDAC_AVDD3P3_2 LVDS_TX_AVSS_8
F7
LVDS_TX_AVSS_9
G7
LVDS_TX_AVSS_10
A1.2V
H7
VDAC_AVSS_1 LVDS_TX_AVSS_11
A2.5V
VDAC_AVSS_2
VDAC_AVSS_3
AD27
VDAC_RBIAS CLK54_AVDD1P2
AD28
VDAC_1 CLK54_AVDD2P5
AD26
VDAC_2 CLK54_AVSS
AC26
CLK54_XTAL_N 54MHz_XTAL_N
AC27
VDAC_VREG CLK54_XTAL_P 54MHz_XTAL_P
AE25
CLK54_MONITOR
Y23
PM_OVERRIDE
BSC_S_SCL
BSC_S_SDA
AA23
VCXO_AGND_1
AB24
VCXO_AGND_2
R6 AC24 L203
USB_AVSS_1 VCXO_AGND_3 BLM18PG121SN1D
T6 AF25
USB_AVSS_2 VCXO_AVDD1P2
R7 AF24
USB_AVSS_3 VCXO_PLL_AUDIO_TESTOUT
T7
USB_AVSS_4
T8
+3.3V_NORMAL
USB_AVSS_5
R3 P24
USB_AVDD1P2 RESET_OUTB
U3 F6
SYS_RESETb
USB_AVDD1P2PLL RESETB
4.7K
T4 N24
USB_AVDD2P5 NMIB
T3 J 5 R221
USB_AVDD2P5REF TMODE_0
R4 J 4 A2.5V
USB_AVDD3P3 TMODE_1
U4 J 6
L211
USB_RREF TMODE_2 BLM18PG121SN1D
V1 J 3
USB_DM1 TMODE_3
V2 V25 A1.2V
C231
USB_DP1 SPI_S_MISO
U1 AH3 10uF
USB_DM2 POR_OTP_VDD2P5
U2 AB8
USB_DP2 POR_VDD1P2
T5
USB_MONCDR
R5 H4
USB_MONPLL EJTAG_TCK
R1 H3
USB_PWRFLT_1 EJTAG_TDI
R2 H2
USB_PWRFLT_2 EJTAG_TDO
T2 H1
USB_PWRON_1 EJTAG_TMS
T1 G1 1K R249
USB_PWRON_2 EJTAG_TRSTB
H6
EJTAG_CE0
H5
EJTAG_CE1
P6
EPHY_VREF
P5 L204
EPHY_RDAC
BLM18PG121SN1D
P3 AB26
EPHY_RDN PLL_MAIN_AVDD1P2
P2 AC25
EPHY_RDP PLL_MAIN_AGND
N3 AB27 R240
EPHY_TDN PLL_MAIN_MIPS_EREF_TESTOUT
N2 M6 390 L207
EPHY_TDP PLL_RAP_AVD_TESTOUT
OPT BLM18PG121SN1D
P1 N6
EPHY_AVDD1P2 PLL_RAP_AVD_AVDD1P2
P4 N7
EPHY_AVDD2P5 PLL_RAP_AVD_AGND
N4
EPHY_PLL_VDD1P2
N1
EPHY_AGND_1
N5 AA24
EPHY_AGND_2 BYP_CPU_CLK
P7 Y24
EPHY_AGND_3 BYP_DS_CLK
AE24
1K R222
BYP_SYS216_CLK
AD25 1K R262
BYP_SYS175_CLK
AUDMX_LEFT1 T P i s N e c e s s o r y
AUDMX_RIGHT1
AUDMX_INCM1
AUDMX_LEFT2
AUDMX_RIGHT2
AUDMX_INCM2
AUDMX_LEFT3
AUDMX_RIGHT3
AUDMX_INCM3
AUDMX_LEFT4
AUDMX_RIGHT4
AUDMX_INCM4
AUDMX_LEFT5
AUDMX_RIGHT5
AUDMX_INCM5
AUDMX_LEFT6
AUDMX_RIGHT6
AUDMX_INCM6
AUDMX_AVSS_1
AUDMX_AVSS_2
AUDMX_AVSS_3
AUDMX_AVSS_4
AUDMX_AVSS_5
AUDMX_AVSS_6
AUDMX_LDO_CAP
AUDMX_AVDD2P5
A2.5V
C217
10uF
A1.2V A2.5V
VIDEO INCM
Near Q1705
Near J1500
0 0 2 : I 1
0 0 2 : I 2
Near J1603
Run Along COMP_Y_IN,COMP_Pr_IN,COMP_Pb_IN Trace
A1.2V
0 0 1 : A 6 ; 0 0 1 : B 7
Near P1600
E_TCK
+3.3V_NORMAL
E_TDI
E_TDO
E_TMS
+3.3V_NORMAL
E_TCK
OPT OPT
E_TDI
R224 R225
E_TDO
2.7K 2.7K
E_TMS
Near J1500
R226
A1.2V R227
2.7K 2.7K
A1.2V
Near J1501
PLACE NEAR Jacks
Near J1501
Near J1600
Near J1603
Near J1500
Near J1602
Near Q1704
W h e n u s d i n g F U N D M E N T A l t h e n s e r i e s R = 0 o h m a n d C L = 8 p F
54MHz X-TAL
W h e n u s d i n g D i p - t y p e X - t a l t h e n s e r i e s R = 2 2 o h m a n d C L = 1 2
22
R212
54MHz_XTAL_N
54MHz_XTAL_P
22
R211
PLACE NEAR BCM CHIP
C258 0 . 1 u F
TU_CVBS_INCM
Run Along TUNER_CVBS_IF_P Trace
003:A3
C2019 0 . 1 u F
SC1_RGB_INCM
003:A4
Run Along SC1_R,SC_G,SC_B Trace
C261 0 . 1 u F
REAR_AV_CVBS_INCM
003:A3
C262 0 . 1 u F
COMP2_VID_INCM
C2015 0 . 1 u F
R_VID_INCM
003:A5
Run Along DSUB_R Trace
C2016 0 . 1 u F
G_VID_INCM
Run Along DSUB_G Trace 003:A5
C264 0 . 1 u F
B_VID_INCM
003:A5
Run Along DSUB_B Trace
C2011 0 . 1 u F
SC1_CVBS_INCM 003:A3
Run Along SC1_CVBS_IN Trace
C2023 0 . 1 u F
SIDE_AV_CVBS_INCM 003:A3
Run Along SC2_CVBS_IN Trace
AUDIO INCM
PLACE NEAR BCM CHIP
SIDE_AV_LR_INCM
002:C6
Route Between SC2_L_IN & SC2_R_IN 0 . 1 5 u F
C2014 0 . 4 7 u F
C271
REAR_AV_LR_INCM
Route Between AV1_L_IN & AV1_R_IN
0 . 1 5 u F
C2024
0 . 4 7 u F
C2017
COMP2_LR_INCM
002:C6
Route Between COMP1_L_IN & COMP1_R_IN
0 . 1 5 u F
C2025
C265
0 . 4 7 u F
SC1_LR_INCM
002:C6
Route Between SC1_L_IN & SC1_R_IN
0 . 1 5 u F
C2022 0 . 4 7 u F
C270
PC_LR_INCM
002:C6
Route Between PC_L_IN & PC_R_IN 0 . 1 5 u F
0 . 4 7 u F
C269
C2010
TU_SIF_INCM
Route Along With TUNER_SIF_IF_N
BCM (EUROBBTV)
2 0 0 9 . 0 6 . 1 8
BCM3556 AUD_IN/LVDS 2
002:C6
003:A3