Test Instructions Display Board; Display Board; Reset; Functionality Description - Philips DVD 950 Service Manual

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GB 54
9.

9. Test instructions Display board

9.1

Display board

9.1.1
Introduction
These test instructions are written for all versions of the display
PCB 3104 123 42230.
The contents of the PCB can be split up into next blocks:
V filament
V filament
Buffer
I2C
Supply:
+5Vstby
+12V
-40V
Figure 9-1
9.1.2

Functionality description:

The essential component of the display PCB is the uP (slave).
This slave works on an 8MHz resonator and has a reset circuit
that is triggered by the +5Vstby. After the reset pulse, the
standby control line will release the reset of the host uP. This
host uP will then initialise the slave. In addition, when going to
stand-by, the slave will put the host uP in reset. When the slave
receives the right IR or key code to leave the standby mode, the
reset of the host uP will be released.
Other slave functions are:
Square signal generator to generate the filament voltage,
which is required for an AC FTD.
Generates the grid and segment scanning for the FTD.
Generates a scanning grid for the keys (separated from
display scanning).
Has inputs for RC (RC5 and RC6) and P50 (P50 controller
is built in).
9.1.3
General
Oscilloscope measurements have been carried out using a
Philips PM3392A.
Impedance of measuring-equipment should be > 1M(.
To do correct measurements we recommend to use supply
3122 427 21370, which is used in all "second generation B"
DVD-players. Make sure that the main 3.3V has a 0.7A
load.
DVD 950
Test instructions Display board
Display
Key-matrix
µProcessor
P50
I/O
RC-Eye
9.1.4

Reset

Check next reset timing with an oscilloscope at pin 10 of the
(processor.
Timing: 400msec < T1 > 700msec.
CH1: +5Vstby voltage at power on.
CH2: Voltage at pin 10.
CL 96532065_058.eps
130799
9.1.5
Display steering
Check next timing and level for all grid-lines (G1 r G14).
ch1
1. Check level A: +4V5 (10% for grid lines 1 => 11
2. Check level A: +4V0 (10% for grid lines 12 => 14
3. Check level B: -33V (10%
4. Check timing and levels of segment-lines P1 r P10:
ch1
PM3392A
ch2
ch1
T
T1
2
1
CH1 2.00 V=
CH2
2 V=
BWL MTB 100ms- 1.04dv ch2+
Figure 9-2
PM3392A
ch1:
low =-34.2 V
ch1:
high= 3.98 V
1
T
STOP
CH1 10.0 V=
MTB 200us
2324us ch1+
Figure 9-3
PM3392A
1
T
CH1 10.0 V=
BWL MTB 500us- 1.04dv ch1+
Figure 9-4
CL 96532065_073.eps
130799
A
B
CL 96532065_074.eps
130799
A
B
CL 96532065_075.eps
130799

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