VESTEL 17MB35 Service Manual
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VESTEL 17MB35 Service Manual

VESTEL 17MB35 Service Manual

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  • Page 2: Table Of Contents

    TABLE OF CONTENTS INTRODUCTION........................7 TUNER............................ 7 2.1. General description of TDTC-G101D: ............... 7 2.2. Features of TDTC-G101D: ..................7 2.3. Pinning: ........................8 AUDIO AMPLIFIER STAGE WITH MP7722..............8 3.1. General Description..................... 8 3.2. Features ........................8 3.3. Applications ........................ 9 3.4.
  • Page 3 11.2. Features ......................... 23 11.3. Electrical Specifications ..................24 11.4. Pinning ........................25 32K Smart Serial EEPROM – 24C32 ................25 12.1. General Description....................25 12.2. Features ......................... 25 11.3 Absolute Maximum Ratings and Electrical Characteristics........26 11.4 Pinning ........................27 512K CMOS Serial Flash –...
  • Page 4 15.7. AZC099-04S ......................42 15.7.1. General Description....................42 15.7.2. Features ......................... 42 15.7.3. Absolute Maximum Ratings.................. 43 15.7.4. Pinning ........................43 15.8. TDA1308....................... 43 15.8.1. General Description....................43 15.8.2. Features ......................... 43 15.8.3. Absolute Maximum Ratings.................. 44 15.8.4. Pinning ........................44 15.9.
  • Page 5 16.9. Diagnostic......................65 16.10. Product Info......................65 SOFTWARE UPDATE DESCRIPTION................65 16.1 17MB35 Analog Part Software Update With Bootloader Procedure ...... 65 16.2 17MB30 HDCP key upload procedure..............68 16.3 17MB35 Digital Software Update From SCART ............. 69 16.4 17MB35 Digital Software Update From USB ............

  • Page 7: Introduction

    1. INTRODUCTION 17MB35 Main Board consists of MSTAR concept. This IC is capable of handling Audio processing, video processing, Scaling-Display processing, 3D comb filter, OSD and text processing, 8 bit dual LVDS transmitter. TV supports PAL, SECAM, NTSC colour standards and multiple transmission standards as B/G, D/K, I/I’, and L/L’...

  • Page 8: Pinning

    3. AUDIO AMPLIFIER STAGE WITH MP7722 3.1. General Description 17MB35 uses a 20W Class D Stereo Single Ended Audio Amplifer for audio. ier. It is one of MPS’ second generation of MP7722 is a stereo 20W Class D Audio Amplif...

  • Page 9: Applications

     Low Noise (190µV Typical)  Switching Frequency Up to 1MHz  9.5V to 24V Operation from a Single Supply  Integrated Startup and Shutdown Pop Elimination Circuit  Thermal and Short Circuit Protection  Integrated 180mΩ Switches  Mute/Standby Modes (Sleep) ...

  • Page 10: Operating Specifications

    3.4.2. Operating Specifications 3.5. Pinning...

  • Page 11: Power Stage

    4. POWER STAGE The DC voltages required at various parts of the chassis and inverters are provided by a main power supply unit. The power supply generates 33V, 24V, 12V, 5V, 3,3V and 5V, 3,3V stand by mode DC voltages. Power stage which is on-chasis generates 1,26V stand by voltage and 8V, 2,6V, 1,8V and 1V supplies for other different parts of the chassis.
  • Page 12  8 configurable CVBS & Y/C S-video inputs  Supports Teletext level-1.5, WSS, VPS, Closed-caption, and V-chip  Macrovision detection  CVBS video output Video IF for Multi-Standard Analog TV  Digital low IF architecture  Stepped-gain PGA with 26 dB tuning range and 1 dB tuning resolution ...

  • Page 13: Sil9185 3:1 Hdmi 1.3 Switch

    6. SIL9185 3:1 HDMI 1.3 Switch 6.1. General Desription The SiI9185A is the first generation of TMDS switch device supporting Revision 1.3 of the HDMI Specification (HDMI Consortium; June 2006). With three HDMI inputs and a single output, the SiI9185A provides a low-cost method of adding additional HDMI ports to the latest Digital TVs.

  • Page 14: Pinning

    6.4. Pinning...

  • Page 15: Qam Demodulator - Stv0297E

    7. QAM DEMODULATOR – STV0297E 7.1. General Desription The STV0297E is a complete single-chip QAM (quadrature amplitude modulation) demodulation and FEC (forward error correction) solution that performs sampled IF to transport stream (MPEG-2 or MPEG-4) block processing of QAM signals. It is intended for the digital transmission of compressed television, sound, and data services over cable.

  • Page 16: Features

    Japanese DBS systems require a transport stream multiplex frame (TSMF) layer to carry digital signals over cable systems. When the recovered transport stream is a multiplex frame, the STV0297E post-processes it to extract a single transport stream. Automatic detection of the TSMF layer is provided. The chip integrates an analog-to- digital converter that delivers the required performance to handle up to 256-QAM signals in a direct IF sampling architecture, thus eliminating the need for external downconversion.

  • Page 17: Pinning

    7.4. Pinning 8. HY5DV281622DT-5 DDR SDRAM 128M 8.1. General Description The Hynix HY5DV281622 is a 134,217,728-bit CMOS Double Data Rate(DDR) Synchronous DRAM, ideally suited for the point-to-point applications which requires high bandwidth. The Hynix 8Mx16 DDR SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock.

  • Page 18: Features

    8.2. Features  3.3V for VDD and 2.5V for VDDQ power supply  All inputs and outputs are compatible with SSTL_2 interface  JEDEC standard 400mil 66pin TSOP-II with 0.65mm pin pitch  Fully differential clock inputs (CK, /CK) operation ...

  • Page 19: Pinning

    8.4. Pinning 9. IS42S16100C1 SDRAM 9.1. General Description ISSI’s 16Mb Synchronous DRAM IS42S16100C1 is organized as a 524,288-word x 16- bit x 2-bank for improved performance. The synchronous DRAMs achieve high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input.

  • Page 20: Pinning

     Dual internal bank controlled by A11 (bank select)  Single 3.3V power supply  LVTTL interface  Programmable burst length (1, 2, 4, 8, full page)  Programmable burst sequence:Sequential/Interleave  4096 refresh cycles every 64 ms  Random column address every clock cycle ...

  • Page 21: Pin Configuration

    10.1.3. Pin configuration: 1 Input 2 Switching input 3 Chip carrier - ground 4 Output 5 Output 10.1.4. Frequency response:...

  • Page 22: If Filter For Video Applications - Epcos K3958M

    10.2. IF Filter for Video Applications – Epcos K3958M 10.2.1. Standart:     L/L’ 10.2.2. Features:  TV IF filter with Nyquist slopes at 33.90 MHz and 38.90 MHz  Constant group delay Pin configuration: 1 Input 2 Input - ground 3 Chip - carrier ground 4 Output 5 Output...

  • Page 23: 48-Bits Serial Eeprom - 24Lc02

    11. 2048-Bits Serial EEPROM – 24LC02 11.1. General Description The 24LC01/02 is a 1K/2K-bit serial read/write non-volatile memory device using the CMOS floating gate process. Its 1024/2048 bits of memory are organized into 128/256 words and each word is 8 bits. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential.

  • Page 24: Electrical Specifications

     40-year data retention  106 erase/write cycles per word  8-pin DIP/SOP package  8-pin TSSOP (HT24LC02 only)  Commerical temperature range (0°C to +70°C) 11.3. Electrical Specifications...

  • Page 25: Pinning

    11.4. Pinning 12. 32K Smart Serial EEPROM – 24C32 12.1. General Description The Microchip Technology Inc. 24C32 is a 4K x 8 (32K bit) Serial Electrically Erasable PROM. This device has been developed for advanced, low power applications such as personal communications or data acquisition.

  • Page 26: Absolute Maximum Ratings And Electrical Characteristics

     Self-timed write cycle (including auto-erase)  Power on/off data protection circuitry  Endurance: 10,000,000 Erase/Write cycles guaranteed for High Endurance Block, 1,000,000 E/W cycles guaranteed for Standard Endurance Block  8 byte page, or byte modes available  1 page x 8 line input cache (64 bytes) for fast write loads ...

  • Page 27: Pinning

    11.4 Pinning...

  • Page 28: Cmos Serial Flash - Mx25L512

    13. 512K CMOS Serial Flash – MX25L512 13.1. General Description The MX25L512 is a CMOS 524,288 bit serial Flash memory, which is configured as 65,536 x 8 internally. The MX25L512 feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO).

  • Page 29: Absolute Maximum Ratings

    SOFTWARE FEATURES  Input Data Format  1-byte Command code  Block Lock protection  The BP0~BP1 status bit defines the size of the area to be software protected against Program and Erase instructions.  Auto Erase and Auto Program Algorithm ...

  • Page 30: Integrated Dvb-T Receiver

    14. Integrated DVB-T Receiver 13.1 General Description CT216T is a highly integrated single chip for DVB-T compliant STB solution. Compared with Cheertek's previous generations of STB receiver devices. CT216T further interates COFDM demodulator USB 2.0 HS host controller, memory card reader, 1/2-bit SPIFlash interface, audio DAC, PWM in/out and SAR-ADC functions.

  • Page 31: Features

    flickering, HW JPEG decoding, flesh tone and black-white extensions, and improvement of small video quality. CT216T includes COFDM demodulator transport stream de-multiplexer, DVB-CSA compliant de-scrambler, RISC MPUs, MPEG-1/2/4 AV decoder, digital T\/ encoder, audio DACs, USB 2.0 HS host controller, memory card reader, smart card reader, CI controller and other peripherals.
  • Page 32  DVB-CSA de-scramblers Video Decoding and Processing  MPEG-2 MP@ML  MPEG-4 SP&ASP  PAL/NTSC format conversion  3:2 pull down  Zoom in/out from 1/16X to 16X  HW JPEG decode  4/8/16-bit OSD with anti-flickering  On chip NTSC/PAL TV encoder ...

  • Page 33: Absolute Maximum Rating And Electrical Characteristics

    High Speed I/O  USB 2.0 HS host controller  Memory card reader with SD, MMC, and MS interfaces  Compliant with SD spec. 1.1 and MMC spec. 4.0 with 1-bit & 4-bit modes.  Compliant with Memory Stick Pro format spec. 1.02 and Memory stick format spec 1.43 with 1-bit and 4-bit modes.

  • Page 35: Ic Descriptions

    15. IC DESCRIPTIONS 15.1. LM1117 15.1.1. General Description The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA of load current. It has the same pin-out as National Semiconductor’s industry standard LM317. The LM1117 is available in an adjustable version, which can set the output voltage from 1.25V to 13.8V with only two external resistors.

  • Page 36: Pinning

    15.1.5. Pinning 15.2. 74HCT4053 15.2.1. General Description The 74HC4053; 74HCT4053 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4053B. It is specified in compliance with JEDEC standard no. 7A. The 74HC4053; 74HCT4053 is triple 2-channel analog multiplexer/demultiplexer with a common enable input (E).

  • Page 37: Absolute Maximum Ratings

    15.2.4. Absolute Maximum Ratings 15.2.5. Pinning 15.3. NUP4004M5 15.3.1. General Description This 5-Pin bi-directional transient suppressor array is designed for applications requiring transient overvoltage protection capability. It is intended for use in transient voltage and...

  • Page 38: Features

    ESD sensitive equipment such as computers, printers, cell phones, medical equipment, and other applications. Its integrated design provides bi-directional protection for four separate lines using a single TSOP-5 package. This device is ideal for situations where board space is a premium. 15.3.2.

  • Page 39: Fdn336P

    15.4. FDN336P 15.4.1. General Description The ST24LC21 is a 1K bit electrically erasable programmable memory (EEPROM), organized by 8 bits.This device can operate in two modes: Transmit Only mode and I2C bidirectional mode. When powered, the device is in Transmit Only mode with EEPROM data clocked out from the rising edge of the signal applied on VCLK.

  • Page 40: Tl062

    15.5. TL062 - 15.5.1. General Description Low-power JFET-input operational amplifier 15.5.2. Features  Very Low Power Consumption  Typical Supply Current . . . 200 µA (Per Amplifier)  Wide Common-Mode and Differential Voltage Ranges  Low Input Bias and Offset Currents ...

  • Page 41: Pinning

    15.5.4. Pinning 15.6. PI5V330 15.6.1. General Description Pericom Semiconductor.s PI5V series of mixed signal video circuits are produced in the Company.s advanced CMOS low-power technology, achieving industry leading performance. PI5V330 true bidirectional Quad 2-channel multiplexer/demultiplexer that is recommended for both RGB and composite video switching applications.

  • Page 42: Pinning

    15.6.4. Pinning 15.7. AZC099-04S 15.7.1. General Description AZC099-04S is a high performance and low cost design which includes surge rated diode arrays to protect high speed data interfaces. The AZC099-04S family has been specifically designed to protect sensitive components, which are connected to data and transmission lines, from over-voltage caused by Electrostatic Discharging (ESD), Electrical Fast Transients (EFT), and Lightning.

  • Page 43: Absolute Maximum Ratings

    15.7.3. Absolute Maximum Ratings 15.7.4. Pinning 15.8. TDA1308 15.8.1. General Description The TDA1308; TDA1308A is an integrated class-AB stereo headphone driver contained in an SO8, DIP8 or a TSSOP8 plastic package. The TDA1308AUK is available in an 8 bump wafer level chip-size package (WLCSP8). The device is fabricated in a 1 mm Complementary Metal Oxide Semiconductor (CMOS) process and has been primarily developed for portable digital audio applications.

  • Page 44: Absolute Maximum Ratings

     High slew rate  Low distortion  Large output voltage swing 15.8.3. Absolute Maximum Ratings 15.8.4. Pinning 15.9. ST3222 15.9.1. General Description The ST3222 is a 3V powered EIA/TIA-232 and V.28/V.24 communications interface with low power requirements and high data-rate capabilities. ST3222 has a proprietary low dropout transmitter output stage providing true RS-232 performance from 3 to 3.6V power supplies.

  • Page 45: Absolute Maximum Ratings

    15.9.3. Absolute Maximum Ratings 15.9.4. Pinning 15.10. LM358D 15.10.1. General Description The LM158 series consists of two independent, high gain, internally frequency compensated operational amplifiers which were designed specifically to operate from a...

  • Page 46: Features

    single power supply over a wide range of voltages. Operation from split power supplies is also possible and the low power supply current drain is independent of the magnitude of the power supply voltage. Application areas include transducer amplifiers, dc gain blocks and all the conventional op amp circuits which now can be more easily implemented in single power supply systems.

  • Page 47: Pinning

    15.10.4. Pinning 15.11. 74LCX244 15.11.1. General Description The LCX244 contains eight non-inverting buffers with 3-STATE outputs. The device may be employed as a memory address driver, clock driver and bus-oriented transmitter/receiver. The LCX244 is designed for low voltage (2.5V or 3.3V) VCC applications with capability of interfacing to a 5V signal environment.

  • Page 48: Pinning

    15.11.4. Pinning 15.12. 74LCX245 15.12.1. General Description The LCX245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The device is designed for low voltage (2.5V and 3.3V) VCC applications with capability of interfacing to a 5V signal environment. The T/R input determines the direction of data flow through the device.

  • Page 49: Absolute Maximum Ratings

    15.12.3. Absolute Maximum Ratings 15.12.4. Pinning 15.13. FSA3157 15.13.1. General Description The NC7SB3157 / FSA3157 is a high-performance, single- pole / double-throw (SPDT) analog switch or 2:1 multiplexer/ de-multiplexer bus switch. The device is fabricated with advanced sub-micron CMOS technology to achieve high-speed enable and disable times and low on resistance.

  • Page 50: Features

    The control input tolerates voltages up to 5.5V, independent of the VCC operating range. 15.13.2. Features  Useful in both analog and digital applications  Space-saving, SC70 6-lead surface mount package  Ultra-small, MicroPak™ Pb-free leadless package  Low On Resistance: <10Ω on typical at 3.3V VCC ...

  • Page 51: Fms6145

    15.14. FMS6145 15.14.1. General Description The FMS6145 Low-Cost Video Filter (LCVF) is intended to replace passive LC fi lters and drivers with a low-cost integrated device. Five 4th-order fi lters provide improved image quality compared to typical 2nd or 3rd-order passive solutions. The FMS6145 may be directly driven by a DC-coupled DAC output or an AC-coupled signal.

  • Page 52: Mt48Lc4M16A2Tg8E

    15.15. MT48LC4M16A2TG8E 15.15.1. General Description The 64Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 67,108,864 bits. It is internally configured as a quad-bank DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the x4’s 16,777,216-bit banks is organized as 4,096 rows by 1,024 columns by 4 bits.

  • Page 53: Pinning

    15.15.4. Pinning 15.16. MP1583 15.16.1. General Description The MP1583 is a step-down regulator with a built in internal Power MOSFET. It achieves 3A continuous output current over a wide input supply range with excellent load and line regulation. Current mode operation provides fast transient response and eases loop stabilization. Fault condition protection includes cycle-by-cycle current limiting and thermal shutdown.

  • Page 54: Features

    15.16.2. Features  3A Output Current  Programmable Soft-Start  100mΩ Internal Power MOSFET Switch  Stable with Low ESR Output Ceramic Capacitors  Up to 95% Efficiency  20µA Shutdown Mode  Fixed 385KHz frequency  Thermal Shutdown  Cycle-by-Cycle Over Current Protection ...

  • Page 55: Mp2112

    15.17. MP2112 15.17.1. General Description The MP2112 is a 1MHz constant frequency, current mode, PWM step-down converter. The device integrates a main switch and a synchronous rectifier for high efficiency without an external Schottky diode. It is ideal for powering portable equipment that powered by a single cell Lithium-Ion (Li+) battery.

  • Page 56: Stlite49M

    15.18. STLITE49M 15.18.1. General Description The ST7LITE49M is a member of the ST7 microcontroller family. All ST7 devices are based on a common industry-standard 8-bit core, featuring an enhanced instruction set. The ST7LITE49M features FLASH memory with byte-by-byte In-Circuit Programming (ICP) and In-Application Programming (IAP) capability.

  • Page 57: Pinning

    15.18.4. Pinning...

  • Page 58: Max809Ltr

    15.19. MAX809LTR 15.19.1. General Description The MAX809 and MAX810 are cost-effective system supervisor circuits designed to monitor VCC in digital systems and provide a reset signal to the host processor when necessary. No external components are required. The reset output is driven active within 10 _sec of VCC falling through the reset voltage threshold.

  • Page 59: Pinning

    15.19.4. Pinning 16. SERVICE MENU SETTINGS In order to reach service menu, First Press “MENU” Then press the remote control code, which is “4725”. In DTV mode, first press “MENU” and select “TV SETUP”. Then, press “4725”. 16.1. Video Setup Panel Info <........>...
  • Page 60 New Zelland Australia DK<..> I<..> L<..> Equalizer <..> If “Yes” selected, “Equalizer” item is seen in “Sound” menu. Headphone <..> If “Yes” selected, “Headphone” item is seen in “Sound” menu. Power On/Off Melody <..> If “Yes” selected, when power on/off conditions, the power on/off melody can be heard.

  • Page 61: Service Scan/Tuning Setup

    An. USB Prescale <..> Value between 0 to 255 Dig. USB Prescale <..> Value between 0 to 255 Clipping Levels ( AVL On) FM Clipping <..> Value between 0 to 255 AM Clipping <..> Value between 0 to 255 NICAM Clipping <..> Value between 0 to 255 SCART Clipping <..>...

  • Page 62: Options

    16.4. Options Options-1 Power Up Standby Last state TV Open Mode Source 1st TV Last Tv First APS <..> If “Yes” selected, first time TV opens by asking APS. APS Volume <..> Value between 0 to +63 Burn In Mode <..> If “Yes”...
  • Page 63 Teletext Options TXT Darkness <..> Value between 0 to +63 TXT Type <..> Fasttext&Toptext Default Fastext Toptext TXT Language <..> Menu West East Cyrillic Turk/Gre Arabic Persian Auto No Txt Warning <..> If “Yes” selected, “No Txt Transmission” warning appears on the screen when pressing txt button from RC.

  • Page 64: External Source Settings

    PIP Options Pip <..> AV PIP No PIP PC PIP Hotel Options <..> Hotel TV <..> If “Yes” selected, “Hotel TV” feature is active. IR Smartloader <..> If “Yes” selected, “IR Smartloader” feature is active. 16.5. External Source Settings TV <..> DTV <..>...

  • Page 65: Diagnostic

    16.10. Product Info 17. SOFTWARE UPDATE DESCRIPTION 16.1 17MB35 Analog Part Software Update With Bootloader Procedure 1.1 The File Types Used By The Bootloader All file types that used by the bootloader software are listed below: 1. The Binary File : It has “.bin” extension and it is the tv application. Its size is 1920 2.
  • Page 66 Parity: None Stop bits: 1 Flow control: None In this case the bootloader sofware puts “C” character to uart. After repeating “C” characters are seen in the hyperterminal user can send any file to chassis by selecting Transfer -> Send File menu item and choosing “1K Xmodem” from protocol section. Figure 1.
  • Page 67 Figure 2. The Programming Service Menu After then you must see Xmodem menu in the hyperterminal.To download hdcp key press k or to download eeprom content press w. Figure 3. Xmodem Menu If the repeated “C” characters are seen you can transfer file content via select Transfer- >Send File and choose “Xmodem”...

  • Page 68: 17Mb30 Hdcp Key Upload Procedure

    Figure 4. The Starting To Send 16.2 17MB30 HDCP key upload procedure. 1) Turn on TV set. 2) Open a COM connection using fallowing parameters and select ISP COM Port Baud Rate: 9600 bps Data Bits: 8 Stop Bits: 1 Parity: None Flow Control: None 3) Enter service menu by pressing “4”...

  • Page 69: 17Mb35 Digital Software Update From Scart

    16.3 17MB35 Digital Software Update From SCART Adjusting DTV Download Mode: 1. Power on the TV. 2. Exit the Stby Mode. 3. Enter the “Tv Menu”. 4. Enter “4725” for jumping to “Service Settings”. 5. Select “8. Programming” step. 6. Change “6. DTV Download” to “On”.
  • Page 70 Software Updating Procedure 1. In the HyperTerminal Menu, click the “Connect” button. 2. Exit the Stby Mode. 3. The “Space” button on the keyboard must be pressed, when the following window can be seen. Selection Window 4. Press the “2” button on the keyboard for choosing “2. Upgrade Application with Xmodem”.
  • Page 71 6. Click the “Send” button on the HyperTerminal 7. Select the “Filename xxxx_slot1.img” using “Browse”. 8. Choose the “1K Xmodem” from “Protocol” option. Selection of File File and Protocol Selection Window Note: In the Software updating Procedure section, when the first “C” character is seen, the filename selection process must be finished before 10 seconds.
  • Page 72 Capture of Receving Data Failing 9. When sending the file the following window must be seen. Capture of Sending Process 10. After the sending process the following HyperTerminal window must be seen.
  • Page 73 Capture of End of The Sending Process 11. For sending second program file, the Software Updating Procedure must be repeated from the step X. Select the “Filename xxxx_slot2.img” using “Browse”. 12. After sending the second program file, the Software Updating Procedure will be succesful.

  • Page 74: 17Mb35 Digital Software Update From Usb

    3. Choose the “Configuration” option. 4. For controlling new software, check the “Receiver Upgrade” option. 16.4 17MB35 Digital Software Update From USB Software upgrade is possible via USB disk by folowing the steps below. 1. Copy the bin file, including higher version than the software loaded in flash, into the USB flash memory root directory.

  • Page 76: Power Management

    18.2. Power Management...

  • Page 77: Integrated Dvb-T Receiver Block Diagram

    18.3. Integrated DVB-T Receiver Block Diagram...

  • Page 78: Mstar Block Diagram

    18.4. MSTAR Block Diagram...
  • Page 79 C510 K3958M 100N OUT2 T_AGC VIFP WARNING!!! This part must be close to chip V-1 e gecerken yapilan updateler 17MB35-1 PROJECT NAME : Video SAW filitre cikislari caprazland SCH NAME : ANALOG IF SHEET: DRAWN BY : ÖNDER GENÇ 4-16-2008_14:01...
  • Page 80 S192 600R 330R 100N SC2_AUD_R_IN 600R C487 SPDIF OUTPUT INTERFACE F201 R214 C483 SC2_AUD_R_OUT 100R LINE OUTPUT 17MB35-1 600R PROJECT NAME : C485 SUBWOOFER OUTPUT SCH NAME : A/V INTERFACE SHEET: SCART2 INPUT DRAWN BY : GORKEMKGO 4-16-2008_14:01 AX M...
  • Page 81 AUDIO OUTPUT FILTERS R416 Q155 R754 R790 R625 2N7002 Q154 SC_1_R R753 GAIN_SW2 100R SC2/LINE_OUT_R SUBW_R 2N7002 17MB35-1 PROJECT NAME : GAIN_SW1 C328 R791 SC1_L SCH NAME : A/V INTERFACE SHEET: 100R SC2/LINE_OUT_L DRAWN BY : GORKEMKGO 4-16-2008_14:01 AX M...
  • Page 82 SIDE_HDMI_1- DDCDB_SDA SIDE_HDMI_0+ R630 Q123 HDMIB_SCL DDCDB_SCL BC848B SIDE_HDMI_0- SIDE_HDMI_C+ SIDE_HDMI_C- R496 R495 SIDE_HDMI_SCL N.C. SIDE_HDMI_SDA SIDE_HDMI_5V HDMIA_SCL SIDE_HDMI_HPD HDMIA_SDA HDMIA_HPD 3V3_HDMI 17MB35-1 PROJECT NAME : R497 SCH NAME : HDMI&USB SHEET: DRAWN BY : S.SEBNEM TAS 4-16-2008_14:01 AX M...
  • Page 83 R355 TX/SDA_SC C529 HC4052 DISABLE 100R RX/SCL UART0_TXD0 HC4052 ENABLE R234 Q127 220P SW_UPDATE_SELECT BC848B SW_UPDATE_SELECT C531 17MB35-1 DVB_SW_UPDATE PROJECT NAME : 5V_STBY MEGA_DCR ANALOG_SW_UPDATE R284 220P SCH NAME : CONTROLLER SHEET: DRAWN BY : ÖNDER GENÇ 4-16-2008_14:01 AX M...
  • Page 84 C203 C462 C189 C210 C204 C186 C190 MADR_6 100N 220U 100N 100N 100N 100N 100N MADR_2 MADR_5 MADR_3 MADR_4 17MB35-1 PROJECT NAME : VDD_DMC VDD2 GND1 SCH NAME : MEMORY INTERFACE SHEET: DRAWN BY : ÖNDER GENÇ 4-16-2008_14:01 AX M...
  • Page 85 IN2+ R549 AMP_EN C561 D123 390P C592 1N4148 C590 C345 MAIN_L R548 S204 VDD_AUDIO C528 S206 FEEDBACK_L 12V_AUDIO D142 S207 24V_VCC VDD_AUDIO SS33 17MB35-1 PROJECT NAME : SCH NAME : AUDIO SHEET: DRAWN BY : S.SEBNEM TAS 4-16-2008_14:01 AX M...
  • Page 86 * opt:without Cable C391 CI_TS_OUT_VALID QAM_TS_VALID MPEG_TS_IN_SYNC CI_TS_OUT_SYNC * opt:without Cable R136 MPEG_TS_IN_CLK MPEG_TS_IN_CLK MPEG_TS_IN_VALID CI_TS_OUT_VALID MPEG_TS_OUT_VALID CI_TS_IN_VALID 17MB35-1 NC (Close to CT216T) PROJECT NAME : R170 R176 C390 CI_TS_OUT_CLK QAM_TS_CLK MPEG_TS_IN_CLK CI_TS_OUT_CLK MPEG_TS_OUT_SYNC CI_TS_IN_SYNC R173 R178 SCH NAME : DVB QAM &...
  • Page 87 R788 MX25L512 R190 F142 3V3_VCC SF_CS F141 RESET_DVB 3V3_VCC R787 330R SF_DO HOLD# R191 1V8_VCC 17MB35-1 330R PROJECT NAME : R182 DVB_RESET SCLK SF_CLK F140 MPEG DEC TS OUTPUT R185 SF_DIO 3V3_VCC 330R R192 SCH NAME : DVB MPEG DECODER & SDRAM...
  • Page 88 R563 Q136 24V_VCC R707 B C848B PANEL SUPPLY SWITCH 12V_AUDIO R709 R575 Q139 PANEL_VCC_ON/OFF BC848B C309 100N 17MB35-1 R765 PROJECT NAME : Q156 STBY_ON/OFF BC848B C603 SCH NAME : MB34 POWER SHEET: 100N DRAWN BY : GORKEMKGO 4-16-2008_14:01 AX M...
  • Page 89 1V0_VCC 1V0_VCC_PIX 100N 100N 100N 100N C321 C320 C319 C318 pin5,pin9,pin95,pin91 pin17,pin21,pin31,pin39 pin43,pin59 pin67,pin71,pin79,pin83 2V6_VCC_PIX 17MB35-1 PROJECT NAME : 100N 100N 100N 100N C325 C324 C323 C322 SCH NAME : LVDS INTERFACE SHEET: DRAWN BY : GORKEMKGO 4-16-2008_14:01...
  • Page 90 KEYBOARD_STBY_OUT PA2/PWM0 VSSD R768 100N C604 C613 R769 3V3_LPW 100n R770 3V3_LPW S202 IR_MAIN IR_IN S203 KEYBOARD_STBY KEYBOARD_STBY_OUT IC altina yerlestirilebilinir 17MB35-1 PROJECT NAME : SCH NAME : STBY UCONTROLLER SHEET: DRAWN BY : MB35 HW GROUP 4-16-2008_14:01 AX M...
  • Page 91 F216 C112 C359 R127 C587 R126 C586 TH101 R638 C442 R682 S104 C365 U123 R683 C441 R637 C111 R482 R247 C532 JK101 R624 JK104 F159 C591 F158 C600 R245 F215 no comp R704 E:\1\MB35\17mb35-1\pcb\pcb.pcb - Page 1 of 2 pages.

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