VESTEL MB37 Service Manual
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VESTEL MB37 Service Manual

VESTEL MB37 Service Manual

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  • Page 2: Table Of Contents

    TABLE OF CONTENTS INTRODUCTION........................6 TUNER............................7 2.1. General description of TDTC-G101D: ................7 2.2. Features of TDTC-G101D: .................... 7 2.3. Pinning: .......................... 7 AUDIO AMPLIFIER STAGE WITH MAX9736(8-10WATT)..........8 3.1. General Description......................8 3.2. Features .......................... 8 3.3. Applications ........................8 3.4.
  • Page 3 12.1 IF Filter for Audio Applications – Epcos K9656M ............. 41 12.1.1 Standart: ........................41 12.1.2 Features: ........................41 12.1.3 Pin configuration: ..................... 42 12.1.4 Frequency response: ....................42 12.2 IF Filter for Video Applications – Epcos K3958M............43 12.2.1 Standart: ........................
  • Page 4 16.5.3 Absolute Maximum Ratings..................58 16.5.4 Pinning ........................59 16.6 PI5V330 ........................59 16.6.1 General Description....................59 16.6.2 Features ........................59 16.6.3 Absolute Maximum Ratings..................59 16.6.4 Pinning ........................60 16.7 AZC099-04S ........................ 60 16.7.1 General Description....................60 16.7.2 Features ........................60 16.7.3 Absolute Maximum Ratings..................
  • Page 5 16.15.2 Features ........................ 71 16.15.3 Absolute Maximum Ratings................. 71 16.15.4 Pinning ......................... 72 16.16 MP2112 ........................72 16.16.1 General Description....................72 16.16.2 Features ........................ 72 16.16.3 Absolute Maximum Ratings................. 73 16.16.4 Pinning ......................... 73 16.17 MAX809LTR ......................73 16.17.1 General Description....................73 16.17.2 Features ........................

  • Page 6: Introduction

    1. INTRODUCTION 17MB37 Main Board consists of MSTAR concept.(Up to 32”) This IC is capable of handling Video processing, Audio processing, Scaling-Display processing, 3D comb filter, OSD and text processing, 8 bit dual LVDS transmitter. TV supports PAL, SECAM, NTSC colour standards and multiple transmission standards as B/G, D/K, I/I’, and L/L’...

  • Page 7: Tuner

    2. TUNER A horizontal mounted and Digital Half-Nim tuner is used in the product, which covers 3 Bands(From 48MHz to 862MHz for COFDM, from 45.25MHz to 863.25MHz for CCIR CH). The tuning is available through the digitally controlled I2C bus (PLL). Below you will find info about the tuner.

  • Page 8: Audio Amplifier Stage With Max9736(8-10Watt)

    3. AUDIO AMPLIFIER STAGE WITH MAX9736(8-10WATT) 3.1. General Description The MAX9736A/B Class D amplifiers provide high-performance,thermally efficient amplifier solutions. The MAX9736A delivers 2 x 15W into 8Ω loads, or 1 x 30W into a 4Ω load. The MAX9736B delivers 2 x 6W into 8Ω loads or 1 x 12W into a 4Ω load. These devices are pinfor pin compatible, allowing a single audio design to work across a broad range of platforms, simplifying design efforts, and reducing PCB inventory.

  • Page 9: Absolute Ratings

    3.4. Absolute Ratings 3.4.1. Electrical Characteristics...

  • Page 11: Operating Specifications

    3.4.2. Operating Specifications...

  • Page 12: Pinning

    3.5. Pinning AUDIO AMPLIFIER STAGE WITH PT2333(2.5 WATT) The PT2333 is a Class-D power amplifier designed for audio equipments, maximum output power can reach up to 2.5W (VDD=5V, RL=4Ω, THD=10%). The PT2333 composed of exclusively designed Class-D circuitry (patented) by PTC, along with the most advanced semi-conductor technology.

  • Page 13: Block Diagram

    Features CMOS technology Operating voltage range from 2.7V up to 5.5V Differential analog input Maximum output power 2.5W(4Ω) @ THD=10% Output low-pass LC filter is not required. Voltage gain determinate by the external resister Contains shutdown function POP noises free in shutdown and power ON/OFF period Built-in short circuit protection Built-in overheat protection...

  • Page 14: Power Stage

    4. POWER STAGE The DC voltages required at various parts of the chassis and inverters are provided by a main power supply unit. The power supply generates 33V, 24V, 12V, 5V, 3,3V and 5V, 3,3V stand by mode DC voltages. Power stage which is on-chasis generates 1,26V stand by voltage and 8V, 2.5V, 2,6V, 1,8V and 1V supplies for other different parts of the chassis.

  • Page 15: Microcontroller (Mstar)

    5. MICROCONTROLLER (MSTAR) Genaral Description The MST6WB7GQ-3 is a high performance and fully integrated IC for multi-function LCD monitor/TV with resolutions up to full HD (1920x1080). It is configured with an integrated triple-ADC/PLL, an integrated DVI/HDCP/HDMI receiver, a multi-standard TV video and audio decoder, two video de-interlacers, two scaling engines, the MStarACE-3 color engine, an on-screen display controller, an 8-bit MCU and a built-in output panel interface.

  • Page 16: Mpeg-2/Mpeg-4 Dvb Decoder (Sti7101)

    Video IF for Multi-Standard Analog TV  Digital low IF architecture  Stepped-gain PGA with 26 dB tuning range and 1 dB tuning resolution  Maximum IF analog gain of 37dB in addition to digital gain  Programmable TOP to accommodate different tuner gain to optimize noise and linearity performance Multi-Standard TV Sound Decoder ...
  • Page 17 client high-definition set-top boxes, compliant with ATSC, DVB, DIRECTV, DCII, OpenCable and ARIB BS4 specifications. It includes all processing for DVD applications. The STx7101 demultiplexes, decrypts and decodes HD or SD video streams with associated multi-channel audio. Video is output to two independently formatted displays: a full resolution display intended for a TV monitor, and a downsampled display intended for a VCR or DVD-R.

  • Page 18: Features

    The figure below shows the architecture of the Sti7101. Features The STx7101 is a single-chip, high definition video decoder including: _ H.264 support _ Linux® and OS21 compatible ST40 CPU core: 266 MHz _ transport filtering and descrambling _ video decoder: H.264 (MPEG-4 part 10) and MPEG-2 _ SVP compliant _ graphics engine and dual display: standard and highdefinition _ audio decoder...
  • Page 19 Processor subsystem _ ST40 32-bit superscaler RISC CPU _ 266 MHz, 2-way set associative 16-Kbyte ICache, 32-Kbyte DCache, MMU _ 5-stage pipeline, delayed branch support _ floating point unit, matrix operation support _ debug port, interrupt controller Transport subsystem _ TS merger/router _ 2 serial/parallel inputs _ 1 bidirectional interface _ merging of 3 external transport streams...
  • Page 20 _ motion and detail adaptive deinterlacer _ linear resizing and format conversions _ horizontal and vertical filtering _ Copy protection _ HDMI /HDCP copy protection hardware _ SVP compliant _ Macrovision® copy protection for 480I, 480P, 576I, 576P outputs _ DTCP-IP _ AWG-based DCS analog copy protection Audio subsystem _ Digital audio decoder...

  • Page 21: Absolute Maximum Ratings

    _ UHF remote receiver input interface _ interrupt level controller and external interrupts, 3.3 V tolerant _ low power/RTC/watchdog controller _ integrated VCXO _ DiSEqC 2.0 interface _ PWM capture/compare functions _ Flexible multi-channel DMA Services and package _ JTAG/TAP interface, ST40 toolset support, ST231 toolset support _ Package _ 35 x 35 PBGA, 580 + 100 balls (standard version) Absolute Maximum Ratings...
  • Page 22 I/O specifications 2.5 volt pads...

  • Page 23: Dvb-T Demodulator - Stv0362

    7 DVB-T DEMODULATOR – STV0362 8.1 General Description The STv0362 is a single-chip demodulator using coded orthogonal frequency division multiplexing (COFDM) and is intended for digital terrestrial receivers using compressed video, sound and data services. It converts IF or baseband differential signals to MPEG-2 format by processing OFDM carriers.
  • Page 24 The STv0362 features the full DVB-T and DVB-H standards framing structure, channel coding and modulation. The symbol, timing and carrier recovery loops are fully digital and sized with regard to the state-of-the-art RF down-converting devices. The STv0362 is compatible with direct conversion tuners featuring two differential ADC for I and Q channels.

  • Page 25: Features

    8.2 Features  Compatible with direct conversion (ZIF) and IF tuners o Wide range carrier tracking loop for offset recovery o Dual analog to digital conversion for IQ baseband interface o Signal strength indicator dedicated ADC o Dual ΣΔ digital split AGC for RF and BB o Flexible clock generation to operate with 4 MHz to 27 MHz external reference ...

  • Page 26: Absolute Maximum Rating

     Data to transport decoder o DVB common interface compliant o 12-bit parallel and 5-bit serial data interface with data on D7 (packet error private line) o Automatic regulation of the transport bit o rate with regard to transport clock o Up to 33 Mbit/s payload data rate ...

  • Page 28: Pinning

    8.4 Pinning...

  • Page 29: Dvb-C Demodulator - Stv0297E

    8 DVB-C DEMODULATOR – STV0297E General Desription The STV0297E is a complete single-chip QAM (quadrature amplitude modulation) demodulation and FEC (forward error correction) solution that performs sampled IF to transport stream (MPEG-2 or MPEG-4) block processing of QAM signals. It is intended for the digital transmission of compressed television, sound, and data services over cable.

  • Page 30: Absolute Maximum Ratings

    Absolute Maximum Ratings Pinning...

  • Page 31: Hy5Dv281622Dt-5 Ddr Sdram 128M

    9 HY5DV281622DT-5 DDR SDRAM 128M General Description The Hynix HY5DV281622 is a 134,217,728-bit CMOS Double Data Rate(DDR) Synchronous DRAM, ideally suited for the point-to-point applications which requires high bandwidth. The Hynix 8Mx16 DDR SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the /CK), Data,Data strobes and Write data masks inputs are sampled on both rising and falling edges of it.

  • Page 32: Absolute Maximum Ratings

    Absolute Maximum Ratings Pinning...

  • Page 33: Hy5Du561622Etp-5 Ddr Sdram 256M

    10 HY5DU561622ETP-5 DDR SDRAM 256M 11.1 General Description The Hynix HY5DU561622DTP is a 268,435,456-bit CMOS Double Data Rate(DDR) Synchronous DRAM, ideally suited for the point-to-point applications which requires high bandwidth. The Hynix 16Mx16 DDR SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the /CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it.

  • Page 34: Absolute Maximum Ratings

    11.3 Absolute Maximum Ratings...

  • Page 35: Pinning

    11.4 Pinning...

  • Page 36: Ste100P Ethernet Phy

    11 STE100P Ethernet PHY 11.1 General Description The STE100P, also referred to as STEPHY1, is a high performance Fast Ethernet physical layer interface for 10Base-T and 100Base-TX applications. It was designed with advanced CMOS technology to provide a Media Independent Interface (MII) for easy attachment to 10/100 Media Access Controllers (MAC) and a physical media interface for 100Base-TX of IEEE802.3u and 10Base-T of IEEE802.3.

  • Page 37: Absolute Maximum Ratings

    - Provides Full-duplex operation on both 100Mbps and 10Mbps modes - Provides Auto-negotiation(NWAY) function of full/half duplex operation for both 10 and 100 Mbps - Provides MLT-3 transceiver with DC restoration for Base-line wander compensation - Provides transmit wave-shaper, receive filters, and adaptive equalizer - Provides loop-back modes for diagnostic - Builds in Stream Cipher Scrambler/ De-scrambler and 4B/5B encoder/decoder - Supports external transmit transformer with turn ratio 1:1...

  • Page 38: Pinning

    12.4 Pinning...

  • Page 41: Saw Filter

    12SAW FILTER 12.1 IF Filter for Audio Applications – Epcos K9656M 12.1.1 Standart:     L/L’ 12.1.2 Features:  TV IF audio filter with two channels  Channel 1 (L’) with one pass band for sound carriers at 40,40 MHz (L’) and 39,75 MHz (L’- NICAM)

  • Page 42: Pin Configuration

     Channel 2 (B/G,D/K,L,I) with one pass band for sound carriers between 32,35 MHz and 33,40 MHz 12.1.3 Pin configuration: 1 Input 2 Switching input 3 Chip carrier - ground 4 Output 5 Output 12.1.4 Frequency response:...

  • Page 43: If Filter For Video Applications - Epcos K3958M

    12.2 IF Filter for Video Applications – Epcos K3958M 12.2.1 Standart:     L/L’ 12.2.2 Features:  TV IF filter with Nyquist slopes at 33.90 MHz and 38.90 MHz  Constant group delay Pin configuration: 1 Input 2 Input - ground 3 Chip - carrier ground 4 Output 5 Output...

  • Page 44: Frequency Response

    12.2.3 Frequency response:...

  • Page 45: 2048-Bits Serial Eeprom - 24Lc02

    132048-Bits Serial EEPROM – 24LC02 13.1 General Description The 24LC01/02 is a 1K/2K-bit serial read/write non-volatile memory device using the CMOS floating gate process. Its 1024/2048 bits of memory are organized into 128/256 words and each word is 8 bits. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential.

  • Page 46: Electrical Specifications

    13.3 Electrical Specifications...

  • Page 47: Pinning

    13.4 Pinning 1432K Smart Serial EEPROM – 24C32 14.1 General Description The Microchip Technology Inc. 24C32 is a 4K x 8 (32K bit) Serial Electrically Erasable PROM. This device has been developed for advanced, low power applications such as personal communications or data acquisition. The 24C32 features an input cache for fast write loads with a capacity of eight 8-byte pages, or 64 bytes.

  • Page 48: Absolute Maximum Ratings And Electrical Characteristics

     Schmitt trigger, filtered inputs for noise suppression  Output slope control to eliminate ground bounce  2 ms typical write cycle time, byte or page  Up to 8 chips may be connected to the same bus for up to 256K bits total memory ...

  • Page 49: Pinning

    11.4 Pinning...

  • Page 50: Cmos Serial Flash - Mx25L512

    15512K CMOS Serial Flash – MX25L512 15.1 General Description The MX25L512 is a CMOS 524,288 bit serial Flash memory, which is configured as 65,536 x 8 internally. The MX25L512 feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO).

  • Page 51: Absolute Maximum Ratings

     Input Data Format  1-byte Command code  Block Lock protection  The BP0~BP1 status bit defines the size of the area to be software protected against Program and Erase instructions.  Auto Erase and Auto Program Algorithm  Automatically erases and verifies data at selected sector ...

  • Page 53: Ic Descriptions

    16IC DESCRIPTIONS 16.1 LM1117 16.1.1 General Description The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA of load current. It has the same pin-out as National Semiconductor’s industry standard LM317. The LM1117 is available in an adjustable version, which can set the output voltage from 1.25V to 13.8V with only two external resistors.

  • Page 54: Pinning

    16.1.5 Pinning 16.2 74HCT4053 16.2.1 General Description The 74HC4053; 74HCT4053 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4053B. It is specified in compliance with JEDEC standard no. 7A. The 74HC4053; 74HCT4053 is triple 2-channel analog multiplexer/demultiplexer with a common enable input (E).

  • Page 55: Absolute Maximum Ratings

    16.2.4 Absolute Maximum Ratings 16.2.5 Pinning 16.3 NUP4004M5 16.3.1 General Description This 5-Pin bi-directional transient suppressor array is designed for applications requiring transient overvoltage protection capability. It is intended for use in transient voltage and...

  • Page 56: Features

    ESD sensitive equipment such as computers, printers, cell phones, medical equipment, and other applications. Its integrated design provides bi-directional protection for four separate lines using a single TSOP-5 package. This device is ideal for situations where board space is a premium. 16.3.2 Features ...

  • Page 57: Fdn336P

    16.4 FDN336P 16.4.1 General Description The ST24LC21 is a 1K bit electrically erasable programmable memory (EEPROM), organized by 8 bits.This device can operate in two modes: Transmit Only mode and I2C bidirectional mode. When powered, the device is in Transmit Only mode with EEPROM data clocked out from the rising edge of the signal applied on VCLK.

  • Page 58: General Description

    16.5 TL062 - 16.5.1 General Description Low-power JFET-input operational amplifier 16.5.2 Features  Very Low Power Consumption  Typical Supply Current . . . 200 µA (Per Amplifier)  Wide Common-Mode and Differential Voltage Ranges  Low Input Bias and Offset Currents ...

  • Page 59: Pinning

    16.5.4 Pinning 16.6 PI5V330 16.6.1 General Description Pericom Semiconductor.s PI5V series of mixed signal video circuits are produced in the Company.s advanced CMOS low-power technology, achieving industry leading performance. PI5V330 true bidirectional Quad 2-channel multiplexer/demultiplexer that is recommended for both RGB and composite video switching applications.

  • Page 60: Pinning

    16.6.4 Pinning 16.7 AZC099-04S 16.7.1 General Description AZC099-04S is a high performance and low cost design which includes surge rated diode arrays to protect high speed data interfaces. The AZC099-04S family has been specifically designed to protect sensitive components, which are connected to data and transmission lines, from over-voltage caused by Electrostatic Discharging (ESD), Electrical Fast Transients (EFT), and Lightning.

  • Page 61: Absolute Maximum Ratings

    16.7.3 Absolute Maximum Ratings 16.7.4 Pinning 16.8 TDA1308 16.8.1 General Description The TDA1308; TDA1308A is an integrated class-AB stereo headphone driver contained in an SO8, DIP8 or a TSSOP8 plastic package. The TDA1308AUK is available in an 8 bump wafer level chip-size package (WLCSP8). The device is fabricated in a 1 mm Complementary Metal Oxide Semiconductor (CMOS) process and has been primarily developed for portable digital audio applications.

  • Page 62: Absolute Maximum Ratings

     High slew rate  Low distortion  Large output voltage swing 16.8.3 Absolute Maximum Ratings 16.8.4 Pinning 16.9 LM358D 16.9.1 General Description The LM158 series consists of two independent, high gain, internally frequency compensated operational amplifiers which were designed specifically to operate from a single power supply over a wide range of voltages.

  • Page 63: Absolute Maximum Ratings

     Low supply current drain (500 µA)—essentially independent of supply voltage  Low input offset voltage: 2 mV  Input common-mode voltage range includes ground  Differential input voltage range equal to the power supply voltage  Large output voltage swing 16.9.3 Absolute Maximum Ratings 16.9.4...

  • Page 64: Features

    transmitter/receiver. The LCX244 is designed for low voltage (2.5V or 3.3V) VCC applications with capability of interfacing to a 5V signal environment. The LCX244 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation. 16.10.2 Features ...

  • Page 65: Pinning

    16.10.4 Pinning 16.11 74LCX245 16.11.1 General Description The LCX245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The device is designed for low voltage (2.5V and 3.3V) VCC applications with capability of interfacing to a 5V signal environment. The T/R input determines the direction of data flow through the device.

  • Page 66: Absolute Maximum Ratings

    16.11.3 Absolute Maximum Ratings 16.11.4 Pinning 16.12 FSA3157 16.12.1 General Description The NC7SB3157 / FSA3157 is a high-performance, single- pole / double-throw (SPDT) analog switch or 2:1 multiplexer/ de-multiplexer bus switch. The device is fabricated with advanced sub-micron CMOS technology to achieve high-speed enable and disable times and low on resistance.

  • Page 67: Features

    switching. The device is specified to operate over the 1.65 to 5.5V VCC operating range. The control input tolerates voltages up to 5.5V, independent of the VCC operating range. 16.12.2 Features  Useful in both analog and digital applications  Space-saving, SC70 6-lead surface mount package ...

  • Page 68: Tsh343

    16.13 TSH343 16.13.1 General Description The TSH343 is a triple single-supply video buffer featuring an internal gain of 6dB and a large bandwidth of 280MHz. The main advantage of this circuit is that its input DC level shifter allows for video signals on 75Ω video lines without damage to the synchronization tip of the video signal, while using a single 5V power supply with no input capacitor.

  • Page 69: Pinning

    16.13.4 Pinning 16.14 MT48LC4M16A2TG8E 16.14.1 General Description The 64Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 67,108,864 bits. It is internally configured as a quad-bank DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the x4’s 16,777,216-bit banks is organized as 4,096 rows by 1,024 columns by 4 bits.

  • Page 70: Absolute Maximum Ratings

    16.14.3 Absolute Maximum Ratings 16.14.4 Pinning...

  • Page 71: Mp1583

    16.15 MP1583 16.15.1 General Description The MP1583 is a step-down regulator with a built in internal Power MOSFET. It achieves 3A continuous output current over a wide input supply range with excellent load and line regulation. Current mode operation provides fast transient response and eases loop stabilization. Fault condition protection includes cycle-by-cycle current limiting and thermal shutdown.

  • Page 72: Pinning

    16.15.4 Pinning 16.16 MP2112 16.16.1 General Description The MP2112 is a 1MHz constant frequency, current mode, PWM step-down converter. The device integrates a main switch and a synchronous rectifier for high efficiency without an external Schottky diode. It is ideal for powering portable equipment that powered by a single cell Lithium-Ion (Li+) battery.

  • Page 73: Absolute Maximum Ratings

    16.16.3 Absolute Maximum Ratings 16.16.4 Pinning 16.17 MAX809LTR 16.17.1 General Description The MAX809 and MAX810 are cost-effective system supervisor circuits designed to monitor VCC in digital systems and provide a reset signal to the host processor when necessary. No external components are required. The reset output is driven active within ~200msec of VCC falling through the reset voltage threshold.

  • Page 74: Absolute Maximum Ratings

    16.17.3 Absolute Maximum Ratings 16.17.4 Pinning...

  • Page 75: Service Menu Settings

    17SERVICE MENU SETTINGS In order to reach service menu, First Press “MENU” Then press the remote control code, which is “4725”. In DTV mode, first press “MENU” and select “TV SETUP”. Then, press “4725”. 17.1 Video Setup Panel Info <........> 32_LC_SAC1 Blue Background <..>...
  • Page 76 Carrier mute<..> Value between 0 to 28 Headphone Sound Select <..> Always Active Select Always Inactive Select Menu Always Main Menu Always PIP/PAP Window Sound Mode Detect Time <..> Value between 0 to 255 Noise Reduction Threshold <..> Value between 0 to 255 Noise Reduction Time <..>...

  • Page 77: Service Scan/Tuning Setup

    SCART Clipping <..> Value between 0 to 255 FAV Clipping <..> Value between 0 to 255 DTV Clipping <..> Value between 0 to 255 HDMI Clipping <..> Value between 0 to 255 YPbPr/PC Clipping <..> Value between 0 to 255 An.
  • Page 78 Autostore <..> If “Yes” selected, Channel is automatically stored. Unicode Enabled <..> If “Yes” selected,Unicode characters can be read in the USB Files. Options-2 Source List menu <..> If “Yes” selected, Sorce List Menu appears on the screen when press “source” button. RC Select <..>...

  • Page 79: External Source Settings

    If “Yes” selected, “No Txt Transmission” warning appears on the screen when pressing txt button from RC. Txt Subtitle <..> If “Yes” selected, Teletext subtitles can be seen. Optional Features Default Zoom <..> Menu 16:9 Panaromic 14:9 Zoom Menu Timeout <..> Menu 15 Sec 30 Sec...

  • Page 80: Preset

    S-Video <..> HDMI 1 <..> HDMI 2 <..> HDMI 3 <..> HDMI 4 <..> YPbPr <..> PC <..> 17.6 Preset User Ad.j ADC Adj. Service Adj. All Adj. Init Factory Channels. 17.7 NVM Edit NVM-edit addr. (hex) NVM-edit data (hex) NVM-data dec 17.8 Programming HDMI DDC Update Mode <..>...

  • Page 81: Software Update Description

    18 SOFTWARE UPDATE DESCRIPTION 16.1 17MB37 Analog Part Software Update With Bootloader Procedure 1.1 The File Types Used By The Bootloader All file types that used by the bootloader software are listed below: 1. The Binary File : It has “.bin” extension and it is the tv application. Its size is 1920 Kb. 2.
  • Page 82 Figure 1. The Sample Output Before Sending The File 2. EEProm update To Update eeprom content via uart scart,dsub9 or i2c with Mstar tool can used. Serial connection settings are listed below: Bit per second: 9600 Data bits: 8 Parity: None Stop bits: 1 Flow control: None Programming menu item is choosed in the service menu and switch “HDCP Key Update...
  • Page 83 Figure 2. The Programming Service Menu After then you must see Xmodem menu in the hyperterminal.To download hdcp key press k or to download eeprom content press w. Figure 3. Xmodem Menu If the repeated “C” characters are seen you can transfer file content via select Transfer- >Send File and choose “Xmodem”...

  • Page 84: 17Mb37 Hdcp Key Upload Procedure

    Figure 4. The Starting To Send 16.2 17MB37 HDCP key upload procedure. 1) Turn on TV set. 2) Open a COM connection using fallowing parameters and select ISP COM Port No Baud Rate: 9600 bps Data Bits: 8 Stop Bits: 1 Parity: None Flow Control: None 3) Enter service menu by pressing “4”...

  • Page 85: 17Mb37 Digital Software Update From Scart

    6. Change “6. DTV Download” to “On”. 7. Switch to the Stby mode. Adjusting HyperTerminal: 1. Connect the “MB37 SCART Interface” to SCART1 (bottom SCART plug). 2. Also connect the “MB37 SCART Interface” to PC. 3. Open “HyperTerminal”. 4. Determine the “COM” settings listed and showed below.
  • Page 86 6. Click “OK”. Software Updating Procedure 1. In the HyperTerminal Menu, click the “Connect” button. 2. Exit the Stby Mode. 3. The “Space” button on the keyboard must be pressed, when the following window can be seen. Selection Window 4. Press the “2” button on the keyboard for choosing “2. Upgrade Application with Xmodem”.
  • Page 87 The Sample Output Before Sending The File 6. Click the “Send” button on the HyperTerminal 7. Select the “Filename xxxx_slot1.img” using “Browse”. 8. Choose the “1K Xmodem” from “Protocol” option. Selection of File File and Protocol Selection Window Note: In the Software updating Procedure section, when the first “C” character is seen, the filename selection process must be finished before 10 seconds.
  • Page 88 Capture of Receving Data Failing 9. When sending the file the following window must be seen. Capture of Sending Process 10. After the sending process the following HyperTerminal window must be seen.
  • Page 89 Capture of End of The Sending Process 11. For sending second program file, the Software Updating Procedure must be repeated from the step X. Select the “Filename xxxx_slot2.img” using “Browse”. 12. After sending the second program file, the Software Updating Procedure will be succesful.

  • Page 90: 17Mb37 Digital Software Update From Usb

    Checking Of The New Software 1. Turn off and on the TV. 2. Enter the “Setup” submenu in the “DTV Menu”. 3. Choose the “Configuration” option. 4. For controlling new software, check the “Receiver Upgrade” option. 16.4 17MB37 Digital Software Update From USB Software upgrade is possible via USB disk by folowing the steps below.

  • Page 91: Block Diagrams

    +24V EDID +12V HDMI1 E2PROM POWER 4 Layer PCB PI5V330 24C02 TMDS DATA/CLOCK 2 MODULE RGB Switch +5V_STBY VESTEL ELECTRONICS R&D GROUP IR ON/OFF Connector HDMI_1 17MB37 BLOCK DIAGRAM HDMI_2 +3V3_STBY DATE:03.03.2009 +3V3 DVD Power DRAWN BY: SADIK ŞEHİT +12V...
  • Page 92 K3958M 100n 2 IN2 OUT2 T_AGC VIFP WARNING!!! This part must be close to chip V-1 e gecerken yapilan updateler VESTEL PROJECT NAME : 17mb37 Video SAW filitre cikislari caprazlandý SCH NAME : ANALOG IF SHEET: SADIK SEHIT DRAWN BY :...

  • Page 93: Power Management

    C1118 R1328 R1229 C1141 R1287 IPOD_C_IN DVD_AUD_R_IN S278 COAXIAL SPDIF OUTPUT R1325 R1228 S281 SW_C_IN YPBPR/PC LINE INPUT 5V_VCC VESTEL SW_R_IN PROJECT NAME : 17mb37 R1231 R1233 C1120 C1142 R1284 SCH NAME : A/V INTERFACE SHEET: IPOD_R S282 SADIK SEHIT...

  • Page 94: Mstar Block Diagram

    R830 DSP_CH4_R 100R LINE_OUT_R DSP_CH3_R 100R SC_1_R VGA_R RIN1P C551 AUDIO OUTPUT FILTERS R416 R413 VESTEL PROJECT NAME : 17mb37 Q154 R753 2N7002 SCH NAME : <DRAWING NAME HERE> SHEET: GAIN_SW1 <YOUR NAME HERE> DRAWN BY : 14-10-2009_09:10 A X M...
  • Page 95 HDMIA_1+ HDMIA_5V HDMIA_1- TP411 C1069 100n HDMIA_0+ 1 A0 HDMIA_0- U193 HDMI_WP2 24LC02 HDMIA_C+ HDMIA_SCL HDMIA_C- HDMIA_SDA HDMIA_SCL HDMIA_SDA HDMIA_5V HDMIA_HPD VESTEL PROJECT NAME : 17mb37 SCH NAME : HDMI&USB SHEET: SADIK SEHIT DRAWN BY : 14-10-2009_09:10 A X M...
  • Page 96 PROG_EN R355 TX/SDA_SC 100R HC4052 DISABLE RX/SCL C529 UART_TXD HC4052 ENABLE R234 Q127 SW_UPDATE_SELECT BC848B 220p SW_UPDATE_SELECT VESTEL C531 PROJECT NAME : DVB_SW_UPDATE 17mb37-1 5V_STBY MEGA_DCR ANALOG_SW_UPDATE R284 SCH NAME : CONTROLLER SHEET: 220p SADIK SEHIT DRAWN BY : 14-10-2009_16:25...
  • Page 97 C1076 C1045 C1065 C1063 C1062 C1064 220u 100n 100n 100n 100n 100n WARNING!!!DON'T USE VIA FOR MCLK AND DATA SIGNALS VESTEL PROJECT NAME : 17mb37 SCH NAME : MEMORY INTERFACE SHEET: ÖNDER GENÇ DRAWN BY : 14-10-2009_09:10 A X M...
  • Page 98 AGND1 PGND1 AGND2 PVDD1 OUTR+2 R_OUT_P R_AUDIO_P 5V_VDD_AUDIO OUTR+1 R_AUDIO_N L_AUDIO_P L_AUDIO_N BC848B MAIN_R R1318 R_OUT_N 100n 150k MAIN_R_AUDIO MAIN_R_AUDIO VESTEL PROJECT NAME : 17mb37 5V_VDD_AUDIO SCH NAME : AUDIO SHEET: SADIK SEHIT DRAWN BY : 15-10-2009_16:06 A X M...
  • Page 99 1V_QAM 2V5_QAM 330R 330R C1160 C725 C721 C283 C221 C217 C216 C215 C214 C220 VESTEL PROJECT NAME : 17mb37 100n 100n 100n 100n 100n 100n 100n 100n SCH NAME : DVB COFDM & QAM SHEET: place this cap close to pin#56...
  • Page 100 100n 100n 100n S_LMI_DQS1 V_LMI_DQS3 S_LDQS[1] V_LDQS[3] S_LMI_DQM1 V_LMI_DQM3 S_LDQM[1] V_LDQM[3] S_LMI_DQM3 V_LMI_DQM1 VDD_S_LMI_2V6 S_LDQM[3] V_LDQM[1] VESTEL PROJECT NAME : 17mb37 S_LMI_DQS3 V_LMI_DQS1 S_LDQS[3] V_LDQS[1] C249 C289 R435 R1114 100n C248 SCH NAME : DDR RAM FOR STi7101 SHEET: 100n HUSEYIN E.
  • Page 101 100n PANEL SUPPLY SWITCH D191 L125 3V3_STBY SS33 C1099 12V_PSU R1276 C1100 JK109 Q181 MOSFET_CONTROL 7A/32VDC BC848B C1055 VESTEL PROJECT NAME : 17mb37 100n 12V_INV SCH NAME : POWER SHEET: 7A/32VDC SADIK SEHIT DRAWN BY : 15-10-2009_15:59 A X M...
  • Page 102 R1255 Q162 1V0_FE R913 BC848B R564 Q151 24V_VCC BC858B Q136 R563 1V0_ST S228 LOWER_SUP BC848B LOWER SUPPLY SHORT CCT PROTECTION VESTEL PROJECT NAME : 17mb37 SCH NAME : LVDS INTERFACE SHEET: SADIK SEHIT DRAWN BY : 14-10-2009_09:09 A X M...
  • Page 103 USB_DP_1 DEFAULT USB CN132 F249 USB_PWR_2 330R USB_DN_2 USB_DP_2 R1058 F251 USB_DM_A USB_PWR_A 1 IO1 330R U167 SERVICE USB AZ099-04S R1057 USB_DP_A VESTEL PROJECT NAME : 17mb37 SCH NAME : SHEET: SADIK SEHIT DRAWN BY : 14-10-2009_09:09 A X M...
  • Page 104 EMI_NBAA U161 CI_WE 74LCX244 FLASH_NOTWE 3V3_CI CI_OE R1050 CI_OE 3V3_CI 3V3_CI CI_WE FLASH_NOTOE 3V3_CI CI_IOWR 3V3_CI CI_IORD VESTEL PROJECT NAME : 17mb37 SCH NAME : STi7101 NOR FLASH & CI SHEET: ERTUG BAL DRAWN BY : 14-10-2009_09:10 A X M...
  • Page 105 NAND_R_NOT 74LVC32 R907 FLASH_RDNOTWR FLASH_ADDR2 F_ADDR4_INV R906 NAND_OR_OUT_1 3V3_CI NAND_OR_OUT_2 R905 FLASH_ADDR1 NAND_W_NOT R904 3V3_CI R923 FLASH_NOTCSA 3V3_CI VESTEL PROJECT NAME : 17mb37 SCH NAME : STi7101 FLASH & EEPROM SHEET: ERTUG BAL DRAWN BY : 14-10-2009_09:10 A X M...
  • Page 106 X106 RXD_CON R375 C921 C922 3V3_VCC R185 30MHz DVB_RESET RESET_DVB C923 C924 UART DEBUG TXD_CON C251 VESTEL PROJECT NAME : CLOCKS RESET 17mb37 100n S238 TP365 UART_TXD SCH NAME : STi7101 LMI, MISC SHEET: HUSEYIN E. CETIN DRAWN BY :...
  • Page 107 TSIN0BYTECLKVALID TSIN2BYTECLKVALID TSVALID_3 S265 S244 DVB_CVBS R1103 C752 L119 FL_DATA6 FLASH_DATA6 Q172 VID_OUT_CVBS FL_DATA14 FLASH_DATA14 VESTEL BC857B PROJECT NAME : 17mb37 FL_DATA7 FLASH_DATA7 C994 C995 150p 150p FL_DATA15 FLASH_DATA15 SCH NAME : STi7101 A/V, PIO, EMI, TS SHEET: HUSEYIN E. CETIN...
  • Page 108 3V3_CI TP255 TP236 TP197 VDD_AF_2V5 3V3D_USB 5V_VCC F242 F241 TP252 TP241 VDD_ANA_2V5 5V_CI 3V3_VCC VDD_3V3 TP256 VDD_SATA_OSC_2V5 TP274 5V_SPDIF VESTEL PROJECT NAME : 330R 17mb37 C788 TP258 USB_VDD_2V5 TP233 5V_AV C1155 C772 C706 C771 C705 C774 220u TP277 TP158 100n...
  • Page 109 Ethernet lines must be 100ohm differential pairs 3V3_ETH 3V3_ETH_A R1188 CFG0 VCCA4 R1191 3V3_ETH R1192 3V3_ETH_A R1145 F278 3V3_ETH_A 3V3_VCC 25MHz C1016 C1017 F271 3V3_ETH 3V3_VCC VESTEL PROJECT NAME : 17mb37 SCH NAME : ETHERNET SHEET: ERTUG BAL DRAWN BY : 14-10-2009_09:10 A X M...
  • Page 110 R1250 R1033 C1061 S245 R970 C1060 C1059 Q115 C440 R639 C478 F194 C477 F198 S306 S120 R164 R682 D104 R637 Q117 C365 C442 C116 C174 F188 R167 Q102 C359 CN114 R504 CN130 F215 M:\17-Tft\MB37\17mb37-2\pcb\17mb37-2.pcb - Page 1 of 1 pages.
  • Page 111 TP11 TP291 TP16 TP290 TP197 TP15 TP282 TP16 TP274 TP282 TP290 TP18 TP18 TP274 CN145 TP151 TP151 TP300 TP301 TP284 TP302 TP292 TP289 TP300 TP301 TP284 TP299 TP302 TP292 TP289 TP383 TP299 TP383 M:\17-Tft\MB37\17mb37-2\pcb\17mb37-2.pcb - Page 1 of 1 pages.

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